A Novel Crossover Operator in Evolutionary Algorithm for Logic Circuit Design

Since the scalability of logic circuits is becoming larger and more complex, the auto-design is becoming more and more difficult. In order to improve automatic design and performance evaluation of logic circuits in efficiency and capability of optimization, multiobjective simulated annealing (MSA) based increasable evolution approach is designed to evolve logic circuits automatically with an extended matrix encoding method, which can be able to reflect the potential performance of a circuit and reduce the risk of deleting a circuit with a good developing potential during evolution is devised. In the process of evolution, each individual is renewedly associated to a corresponding objective in terms of a novel adaptive evaluation method at each generation. In experiments, complicated arithmetic circuits are designed to assess the performance of MSA against other algorithms. Results indicate that the proposed method could design logic circuits efficiently.

Evolvable hardware (EHW) refers to self-reconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). One of the main difficulties in using EHW to solve real-world problems is scalability, which limits the size of the circuit that may be evolved. This paper outlines a new type of decomposition strategy for EHW, the "generalized disjunction decomposition" (GDD), which allows the evolution of large circuits. The proposed method has been extensively tested, not only with multipliers and parity bit problems traditionally used in the EHW community, but also with logic circuits taken from the Microelectronics Center of North Carolina (MCNC) benchmark library and randomly generated circuits. In order to achieve statistically relevant results, each analyzed logic circuit has been evolved 100 times, and the average of these results is presented and compared with other EHW techniques. This approach is necessary because of the probabilistic nature of EA; the same logic circuit may not be solved in the same way if tested several times. The proposed method has been examined in an extrinsic EHW system using the (1 + lambda) evolution strategy. The results obtained demonstrate that GDD significantly improves the evolution of logic circuits in terms of the number of generations, reduces computational time as it is able to reduce the required time for a single iteration of the EA, and enables the evolution of larger circuits never before evolved. In addition to the proposed method, a short overview of EHW systems together with the most recent applications in electrical circuit design is provided.

Evolutionary algorithms (EAs), as global search methods, are proved to be more robust than their counterpart local heuristics for detecting protein complexes in protein-protein interaction (PPI) networks. Typically, the source of robustness of these EAs comes from their components and parameters. These components are solution representation, selection, crossover, and mutation. Unfortunately, almost all EA based complex detection methods suggested in the literature were designed with only canonical or traditional components. Further, topological structure of the protein network is the main information that is used in the design of almost all such components. The main contribution of this paper is to formulate a more robust EA with more biological consistency. For this purpose, a new crossover operator is suggested where biological information in terms of both gene semantic similarity and protein functional similarity is fed into its design. To reflect the heuristic roles of both semantic and functional similarities, this paper introduces two gene ontology (GO) aware crossover operators. These are direct annotation-aware and inherited annotation-aware crossover operators. The first strategy is handled with the direct gene ontology annotation of the proteins, while the second strategy is handled with the directed acyclic graph (DAG) of each gene ontology term in the gene product. To conduct our experiments, the proposed EAs with GO-aware crossover operators are compared against the state-of-the-art heuristic, canonical EAs with the traditional crossover operator, and GO-based EAs. Simulation results are evaluated in terms of recall, precision, and F measure at both complex level and protein level. The results prove that the new EA design encourages a more reliable treatment of exploration and exploitation and, thus, improves the detection ability for more accurate protein complex structures.

Evolutionary algorithms (EAs) are population-based search algorithms that have been successfully applied to solve hard optimization problems in many application domains. Since the early 1990's researchers have begun to apply evolutionary algorithms to synthesize electronic circuits. Nowadays it is evident that the evolutionary design approach can automatically create efficient electronic circuits in many domains. In this tutorial, fundamental concepts of evolutionary design of digital circuits are presented. In particular, the tutorial deals with Cartesian Genetic Programming (CGP) — a method of genetic programming that in many cases outperforms conventional synthesis tools in terms of achievable circuit size reduction. Innovative designs will be presented in domains of small combinational circuits (where the goal is to minimize the number of gates), middle-size circuits (such as image filters intended for FPGAs where the goal is to obtain the quality of filtering of conventional methods for a significantly lower cost on a chip) and large circuits (such as benchmark circuits for comparison of testability analysis methods), covering thus circuit complexity from a few gates to millions of gates. For example, one of evolved image filters is now protected by utility model in the Czech Republic (patent pending). Evolved circuits will be compared with the best-known conventional designs. We will also show how to deal with the so-called scalability problems of evolutionary design which have been identified as the most important problems from the point of view of practical applications. In summary, tutorial participants will become familiar with the state of the art methods in the area of digital circuit evolution. They will learn how to apply CGP, construct the fitness function and run experiments.

In the design of logic circuits, it is not always true that the circuit constructed by the designer is the optimal one. From such a viewpoint, this paper proposes a method in which the first designed circuit is expanded backwardly, i.e., from the output back to the input, and more than one equivalent circuit of the same function is resynthesized and the one best satisfying the requirements is determined and adopted.In the proposed method, a fuzzy reasoning is introduced in the decision process. In this scheme, such requirements as the delay time, power consumption and the chip area are handled by the fuzzy reasoning. A selectability index known as “selection criterion value” is given to each generated circuit, and the objective logic circuit is selected according to this index.Such requirements as delay, etc., have different units and are often in a trade‐off relation. Therefore, these requirements are represented as relative values and are considered as circuit selection parameters in the fuzzy reasoning. Such parameterization enables easy understanding of the features of each circuit. It is easy also to decide which of the parameters of the trade‐off relation is to be emphasized in the selection process.

In this paper a state of the art, main problems and future trends concerning evolutionary design of combinational digital circuits are presented. Several evolutionary algorithms for design and optimization of combinational digital circuits are also shortly described. In evolutionary design methods the main problem is related to "combinatorial explosion" existing in those methods. Because evolutionary design methods are based on "generate and test" model, therefore together with growing of digital circuit input number, the number of potential combinations which must be tested are growing exponentially. This problem is a "bottle-neck" of those methods, and therefore it is discussed in details in this paper. To solve this problem it becomes important to elaborate efficient decomposition techniques of the designed circuits to some less complex sub-circuits, and then to design each of them independently. Also, it is important to create novel genetic operators (as mutation and crossover) which will always lead to acceptable solutions (solutions which satisfy the truth table). Due to such kind of operators, any repair mechanisms need not necessarily be used, and therefore the "generate and test" model will be simplified only to generation of new solutions, and therefore evolutionary design methods will become more effective.

In this dissertation, three different evolutionary algorithms are proposed by hybridizing the Taguchi method, chaos disturbance method, multilevel immune algorithm (MIA), clonal selection algorithm (CLONALG), and artificial bee colony algorithm (ABC). Including multi-level immune algorithm and clonal selection algorithm is derived by the immune algorithm. These algorithms are thus called HTCMIABC, HTCABC, and HCABC. The HTCMIABC comprises two main different phases. We use the MIA as the recognition phase to balance local and global search and accelerate the search speed to enhance the evolutionary phase. Second, the evolutionary phase is built on the ABC and chaos disturbance operation to have the capabilities of exploration and exploitation. Moreover, the Taguchi method and crossover operation are inserted between the recognition phase and evolutionary phase for the recombination and diversification of several antibodies to improve the searching ability. In the HTCABC, the chaos search algorithm and adaptive bound method are adopted to improve the ABC performance. Then, the Taguchi method and crossover operation are incorporated into the chaos artificial bee colony (CABC) to accelerate the search capacity. Moreover, the natural phenomenon of the elite strategy is adopted and the recruitment of new scout bees is used for HTCABC, which can maintain the diversity of the population, and escape from local optima. Additionally, there is no complex parameter setting in the algorithm design. In the HCABC, the mutation mechanism of the CLONALG by using the advantages of ABC can improve the capabilities of exploration and exploitation. Finally, the HTCMIABC algorithm is examined by parameter identification of nonlinear chaotic system. Simulation results show that the HTCMIABC is more efficient than some typical existing algorithms. The HTCABC algorithm is examined by using a set of benchmarks and the proposed approach is also applied to solve the parameter identification of a chaotic system. Simulation results show that the HTCABC is more efficient than some existing algorithms reported in the literature. In addition, the simulation results also demonstrate that HCABC can effectively achieve the best PID-like fuzzy controller structure and parameters.

This chapter presents an evolutionary approach for solving the traveling salesman problem (TSP) and the TSP with backhauls (TSPB). We propose two evolutionary algorithms for solving the difficult TSPs. Our focus is on developing evolutionary operators based on conventional heuristics. We rely on a set of detailed computational experiments and statistical tests for developing an effective algorithm.The chapter starts with a careful survey of the algorithms for the TSP and the TSPB, with a special emphasis on crossover and mutation operators and applications on benchmark test instances. The second part addresses our first evolutionary algorithm. We explore the use of two tour construction heuristics, nearest neighbor and greedy, in developing new crossover operators.We focus on preserving the edges in the union graph constructed by edges of the parent tours.We let the heuristics exploit the building blocks found in this graph. This way, new solutions can inherit good blocks from both parents. We also combine the two crossover operators together in generating offspring to explore the potential gain due to synergy. In addition, we make use of 2-edge exchange moves as the mutation operator to incorporate more problem specific information in the evolution process. Our reproduction strategy is based on the generational approach. Experimental results indicate that our operators are promising in terms of both solution quality and computation time.In the third part of the chapter, we present the second evolutionary algorithm developed. This part can be thought of as an enhancement of the first algorithm. A common practice with such algorithms is to generate one child or two children from two parents. In the second implementation, we investigate the preservation of good edges available in more than two parents and generate multiple children.We use the steady-state evolution as a reproduction strategy this time and test the replacement of the worst parent or the worst population member to find the better replacement strategy. Our two mutation operators try to eliminate the longest and randomly selected edges and a third operator makes use of the cheapest insertion heuristic. The algorithm is finalized after conducting a set of experiments for best parameter settings and testing on larger TSPLIB instances. The second evolutionary algorithm is also implemented for solving randomly generated instances of the TSPB. Our experiments reveal that the algorithm is significantly better than the competitors in the literature. The last part concludes the chapter.KeywordsNetworks-GraphsTraveling Salesman ProblemsEvolutionary AlgorithmsCrossover OperatorMutation OperatorHeuristics

The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

A hybrid search mode-based differential evolution algorithm for auto design of the interval type-2 fuzzy logic system

With the progress of high‐density information handling technology, multiple‐valued logic is considered interesting. Studies have been made on the applications to the high‐density VLSI and the optimally multiple‐valued information processing systems. This paper considers the use of a CMOS multiple‐valued output gate, and proposes an implementation of the multiple‐valued logic circuit, which is suited to the integration from the viewpoints of the integration density and the power consumption. The CMOS multiple‐valued output gate produces a multiple‐valued output from the predetermined number (n ‐ 1 for n‐valued case) of binary inputs. Compared with similar multiple‐level output circuits proposed up to now, the gate has the feature of simple structure and easy correspondence to arbitrary n‐valued function. In the design of the multiple‐valued logic circuit by the proposed method, the inputs to the multiple‐valued output gate are determined first from the required multiple‐valued output. Then the logic circuit satisfying the inputs is constructed from the literal circuit with multiple‐valued inputs and binary logic circuits. Design examples by the proposed method are presented. It is shown especially for the arbitrary n‐valued case that the design is simplified since the inputs to the multiple‐valued output gate can be represented in the general form. Several rules for deriving the general form are described. Finally, it is made possible to implement the multiple‐valued logic circuit, which is simple and suited to integration.

In this scientific paper, a software library for Ternary logic gates will be built based on VHDL language to be used in the implementation of combinational Ternary logic circuits. The VHDL language had been designed to be used to automate and design Binary electronic logic systems. Therefore, several problems have been arised in adapting the VHDL language to be used with Ternary electronic logic systems. However, these problems have been solved and the result were encouragement to continue the study with the other Ternary components, so that a complete software library based on VHDL language for different Ternary components will be used as a tool in the design and simulation of Ternary electronic logic circuits and systems. 
 Keywords: Ternary logic, Ternary logic gates, VHDL language.

The objective of the paper is to introduce a new approach to the evolutionary design of polymorphic digital circuits conducted directly at transistor level. A discrete event-driven simulator was utilized to achieve reasonable trade-off between performance and precision. The proposed approach was evaluated on a set of polymorphic logic circuits controlled by switching the power rails. It was demonstrated that the proposed method is able to produce valid solutions. A lot of polymorphic gates based on ambipolar transistors were designed, which provide transistor savings compared to existing circuits. A new class of polymorphic gates was discovered thanks to the proposed system - gates based on conventional MOS transistors whose functions are changed by switching the power rails. They seem to have the best parameters among currently known polymorphic gates based on conventional transistors.

This paper presents the design of a logic circuit, whose topology is defined through an optimization process carried out by a genetic algorithm with the aim of obtaining an optimal tic-tac-toe player. To achieve this objective, the optimization process is performed by a simple genetic algorithm, and the problem is framed as a maximization problem. Given a logic circuit and a set of Boolean weights on its vertices, the goal is to optimize the performance of the logic circuit as a tic-tac-toe player by optimizing the weights that define its topology, where each set of weights defines a unique configuration and, therefore, a unique circuit. The genetic algorithm treats these sets of weights as individuals in its population. The design of the genetic algorithm involves evaluating various configurations of logic circuits, objective functions, and training models. The presented results showcase an optimal set of these configurations, as well as an analysis of the best player obtained.

Quantum-dot Cellular Automata (QCA) is a newly developed paradigm for digital design. It explains how computation can be performed using nano sized quantum dots. One of the trending application of QCA is the design of reversible logic circuits and gates. Reversible logic is a dissipation less digital logic. According to this logic digital circuitry with almost zero power dissipation can be designed. The most important application of reversible logic is quantum computing. Quantum Computation cannot be performed without the use of reversible circuits. A number of reversible gates have been designed and used in quantum computing. The best way to derive the maximum out of reversible computation is to design those gates and circuits using systems which are inherently reversible. This is true for the quantum mechanical systems. For this quantum level designing Quantum-dot Cellular Automata stands as the appropriate choice. It's a nano level based archetype. Performing multiple functions using single circuits has always been the aim of the digital industry researchers. In reversible logic the approach is developing towards designing multifunction gates that can perform a number of functions using a same circuit with some adjustments. This development has however not yet been explored much in QCA. In this paper the majority logic equations for the outputs of a multifunction reversible logic gate are derived and the novel Quantum-dot Cellular Automata design is proposed. Some of the functions of multifunction reversible logic gate are discussed and simulated results using QCA Designer 2.0.3 are shown in the figure.