A switched-capacitor PWM generator for LCD backlight brightness control

The first fully integrated GaN pulse width modulation (PWM) generator for power conversion applications is presented in this paper. The solution is implemented in a 0.5-μm technology, avoiding additional pins and external capacitors for sawtooth signal generation while providing high accuracy. Indeed, the large GaN process spreads are addressed through an innovative dynamic offset compensation approach whose clock signal takes advantage of the PWM signal itself. The proposed PWM generator adopts a 6-V power supply and includes a 25 digital divider to set the PWM frequency at 500 kHz and the minimum and maximum duty cycles at 6% and 94%, respectively. Experimental results on integrated prototypes validated the correct circuit functionality over the temperature range from -40°C to 120°C. As a main achievement, this work demonstrates effective all-GaN integration of complex mixed analog and digital circuits, thus representing a significant advancement in the approaches to overcome the main limitations of GaN devices and enable fully integrated signal processing implementation.

This paper presents a simple and novel generalized pulse width modulation (GPWM) algorithm for voltage source inverter fed induction motor drives. The classical space vector approach requires angle and sector information for the calculation of switching times, which increases the complexity of the PWM algorithm. Hence, to reduce the complexity, the proposed GPWM algorithm generates the modulating signals by using the instantaneous phase voltages only. In the proposed algorithm, a unique zero sequence signal is added to the instantaneous phase voltages in order to generate the modulating waveforms. By varying a constant in the zero sequence signal from 0 to 1, various PWM algorithms such as space vector PWM (SVPWM) and discontinuous PWM (DPWM) algorithms are generated. Moreover, a simple overmodulation algorithm is also presented in this paper. Thus, the proposed GPWM algorithm generates all possible PWM algorithms in the entire modulation region. To validate the proposed algorithm, several simulation and experimental results are presented and compared. The results show the best agreement with the published work.

Brushless DC motors (BLDC) are becoming increasingly attractive in a large number of applications due to performance advantages such as reduced size and cost, reduced torque ripples, increased torque-current ratio, low noises high efficiency, reduced maintenance and good control characteristics over a wide range in torque–speed plan and precise speed control. This paper focuses on the design and implementation of a BLDC motor speed control system using a microcontroller. The microcontroller generates Pulse Width Modulation (PWM) signals to regulate motor speed, which are supplied to the motor driver to ensure smooth operation and efficient performance. Additionally, motor protection was addressed using temperature sensors, and fire sensors were implemented for safety. This paper involves controlling a BLDC motor's speed using a potentiometer, Raspberry Pi Pico, and a motor driver. The Raspberry Pi Pico generates a Pulse Width Modulation (PWM) signal based on potentiometer input. That signal is given to the motor driver; the motor driver provides a variable voltage to the BLDC motor depending on the PWM duty cycle. The motor's speed increases/decreases based on the potentiometer's position. The temperature sensor is used for monitoring of overheating in the motor driver and motor.

A maximum power point tracking (MPPT) scheme based on a general pulse width modulation (PWM) modulator is presented. The purpose of the scheme is that switching converter behaves as a resistor seen by the photovoltaic module, it also regulates the input voltage to a desired value. The MPPT scheme is applied to a noncascading converter topology, which has the characteristic of processing a fraction of the total power generated.

A scalable pulsewidth control approach with 7-bit resolution for thermal control of optical ring resonator switch matrices in 0.16- $\mu\text{m}$ Bipolar-CMOS-DMOS (BCD) with a cell size of $79\ast 105 \mu\text{m}^2$ is introduced. One Gray counter at up to 1.2-GHz clock and pulsewidth modulation generation in each matrix cell leads to an electrical power consumption of 330 mW for all electronic control circuits of an optical 1000-switch-node matrix, resulting in a reduction of 11.1% of the power needed by a constant-voltage control approach.

The main objective of this work is to improve the performance of Multilevel Inverter by using the novel LS-PD- PWM and controlling technique instead of the existing approach. The proposed work focus on closed loop controller such as existing PI and Fuzzy Logic Controller for resistive load with Multilevel Inverter. The proposed Asymmetric fifteen level Inverter offers less THD and high frequency than the Asymmetric nine level inverter. Asymmetric multilevel inverter is used to reduce the switching losses and THD. In this work is the generation and implementation of Pulse Width Modulation (PWM) techniques using Field Programmable Gate Array (FPGA) for Multilevel Inverter. PWM can be generated via Microprocessors, Microcontroller, FPGA and DSP Processors. Higher density Programmable Logic Devices (PLD) such as FPGAs can be used to amalgamate large amounts of logic into a single Integrated. Pulse width modulation (PWM) is generally used in power converter control. To generate LS-PD- PWM by using FPGA, this occupies less memory capacity and accurate than conventional one. An efficient PWM generation technique is performed using FPGA for lower frequency applications. Simulation and synthesis is done by ModelSim6.3c and Xilinx10.1. Further, the Implementation is carried out by FPGA Spartan3 Xc3s50. Key Word: PWM, FPGA, PLD (Programmable Logic Devices), LS-PD-PWM

Pulse width modulation (PWM) techniques involving different switching sequences are used in space vector-based PWM generation for reducing line current ripple in induction motor drives. This study proposes a hybrid PWM technique employing five switching sequences. The proposed technique is a combination of continuous PWM, discontinuous PWM (DPWM) and advanced bus clamping PWM methods. Performance of the proposed PWM technique is evaluated and compared with those of the existing techniques on a constant volts per hertz induction motor drive. In terms of total harmonic distortion in the line current, the proposed method is shown to be superior to both conventional space vector PWM (CSVPWM) and DPWM over a fundamental frequency range of 32–50 Hz at a given average switching frequency. The reduction in harmonic distortion is about 42% over CSVPWM at the rated speed of the drive.

This paper presents a novel switching sequence for Space Vector Advanced Pulse Width Modulation generation for Z source inverter. The Performances of an inverter depends on what type of modulation strategies is used to switch. There exists different types of classical and advanced Pulse Width Modulation (PWM) techniques to switch the traditional Voltage Source Inverter (VSI).The advanced PWM techniques are superior to classical PWM techniques in respect of load current ripple, Total Harmonic Distortions, switching losses. The same concept of advanced PWM techniques for VSI is applicable for Z-Source Inverter. This paper proposes certain vector sequences based on advanced PWM techniques for ZSI. The proposed vector sequences are analyzed in respect of load/line current ripple based on stator flux ripple concept. The superiority of the advanced PWM techniques over classical is verified by simulation study of a ZSI in PSim9.1.1 Environment for R-L and different motor load conditions.

This paper describes the design of a SiC pulse width modulation (PWM) signal generator in the HiTSiC® CMOS process from Raytheon Systems Limited. The high-temperature applications of the circuit include motor control in heavy equipment, deep earth drilling, dc-dc voltage converters and power inverters. The results presented in this paper are for the PWM circuit operating with an input clock frequency of 100 kHz and a supply voltage range of 12 to 15 V. The building blocks for the PWM include a current-starved delay generator, a comparator and XNOR gates. The delay is controlled by a 6-bit binary input that allows the user to dynamically tune the duty cycle. Experimental results show the circuit to have a tunable duty cycle between 16.3% and 84.3% at 400°C.

The emergence of wide bandgap power devices has brought the attention back to the flying capacitor (FC) multilevel inverters with a large number of stages, in an effort to increase the power density by minimizing the passive components. The main challenge that such systems face, particularly the ones based on high-frequency Gallium-Nitride devices and small-value ceramic capacitors, relate to the stringent requirements for precise and fast capacitor balancing. Conventional <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">natural balancing</i> techniques exhibit poor settling times, while most improved natural balancing methods are not easily scalable to more than five levels. The alternative of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">active balancing</i> normally requires one isolated sensor per FC which increases the overall system cost and footprint, or a single ac-side sensor that is more compact but calls for sophisticated PWMs that again are not available for multiple levels. In this paper we introduce a generalized pulse width modulation (PWM) strategy based on the phase-shift and carrier swapping principles for an arbitrary number of levels. We provide an easy and intuitive method for the extraction of the PWM pattern, the switching states, and their sequence. Simulations were carried out in Matlab/Simulink and experimental tests were conducted on a single-phase 7-level GaN inverter prototype. Not only is the extended PWM advantageous in natural balancing, but it also provides the right zero switching states for ac-side FC sensing in active balancing.

Constant current sources are required to drive multiple color LED strings and the LED drivers that drive these LED lighting systems should provide multiple constant currents from a single dc source. In this paper, a single inductor multiple current output (SIMCO) converter that can provide N- independently controllable constant current outputs is reported. The average current in each color LED string is controlled independently by using hybrid average current mode control (HACMC). The HACMC combines the advantage of both average current mode control and charge control method. Traditional dimming approaches such as pulse width modulation and analog dimming can be incorporated in the proposed topology for color tunability and correlated color temperature control. The proposed approach uses a simple control logic, which is modular and can be scalable to N color LED lighting systems. The operation of the SIMCO converter with the HACMC is explained in detail. Simulation and experimental results with 48 V input and 12 W for N = 3 (RGB) color systems are presented.

The Flying Capacitor Multi Level Inverter (FCMLI) has a great advantage with respect to the availability of voltage redundancies. This work proposes a switching pattern for a modified inverter structure. It is used to improve the performance of chosen single phase five level H-bridge type FCMLI as compared to conventional FCMLI. The chosen multi level inverter is simulated for various multicarrier based Pulse Width Modulation(PWM) techniques for a resistive load. The PWM techniques include Phase Disposition (PD) PWM, Phase Opposition and Disposition (POD) PWM, Alternative Opposition and Disposition (APOD) PWM, Carrier Overlapping (CO) PWM, Phase Shift (PS) PWM and Variable Frequency (VF) PWM and the harmonics of the output voltages are observed for various modulation indices. The performance of chosen FCMLI is confirmed through MATLAB-SIMULINK based simulation. It is observed that sinusoidal reference with PODPWM provides output with relatively low distortion. Its also seen that COPWM strategy is found to perform better since it provides relatively higher fundamental RMS output voltage.

Multilevel current source converter has the benefits of high output capacity, low current switching stress and low harmonic or ripple content. This paper presents a new topology of three-level current-fed DC/DC converter for superconducting magnetic energy storage application. In this topology, a superconducting inductance acting as a constant current source and a shunt inductance acts as current divider ensure current flows through the power switch components equally to generate immediate level of current. A novel kind of pulse width modulation (PWM) switching strategy for the current instantaneous control of the current source converter was proposed. The modulation switching strategy proposed is able to effectively control the DC current output of the converter. Also, due to the both of proposed topology and control method are quite a simple, it can be easily realized in the practice. Simulation results prove the feasibility and validity of the proposed topology and modulation strategy

Constant current feed is preferred in long distance under-water power distribution networks due to robustness against cable impedance and faults. Multiple power converter modules connected in series along the distribution line either provide a regulated current or regulated voltage at their outputs. In this paper, an isolated parallel resonant converter based converter architecture is presented that provides wide range of regulated output voltage over wide load range using multiple transformer secondary windings and a combining circuit. Steady state analysis and design are presented to minimize component count and stress with high efficiency over the full desired operating range. A generalized design method is presented for such a converter to operate from constant dc current source to regulate its output voltage over 1:10 range with 1:10 load range for each output voltage setting. Finally, a hardware prototype has been built and tested to validate the design with 250 kHz switching frequency and a regulated output voltage that can vary between 80 V to 250 V over a load range of 50 W to 500 W. The converter is fed from a 1 A constant current source.

This work presents the comparison of hybrid carrier Pulse Width Modulation (PWM) techniques for the chosen three phase Cascaded Multi Level Inverter (CMLI). In this paper, a CMLI is controlled with Sinusoidal PWM technique with Alternative Phase Opposition and Disposition and Carrier Overlapping (APOD + CO), Alternative Phase Opposition and Disposition and Phase Shift (APOD + PS), Alternative Phase Opposition and Disposition and Variable Frequency (APOD + VF), CO + VF, CO + PS, Phase Disposition and Variable Frequency (PD + VF), PS + PD, PS + VF , APOD + PD and CO + PD and the variation of Total Harmonic Distortion (THD) in the outputs is observed for various modulation indices m a . Simulation is performed using MATLAB-SIMULINK. It is seen that sinusoidal reference with PS+PD provides output with relatively low distortion. CO+VF PWM strategy is found to perform better since it provides relatively higher fundamental RMS output voltage and relatively lower stress on the devices.