GaN Monolithic PWM Generator With Dynamic Offset Compensation

In this paper, a pulse width modulation (PWM) generator based on a switched capacitor for LCD backlight brightness control is described. The proposed scheme uses a simple RC network along with a clocked-comparator which samples the output of the ambient light sensor, and generates a PWM signal corresponding to the light level. Furthermore, by using a switched-capacitor resistor with variable clock frequency, the RC time constant is programmable and less sensitive to process variations with respect to passive resistors. In addition, it is shown that the linearity of the proposed PWM generator can be enhanced by replacing the RC network resistor with a constant current source. The operation of the PWM generator is verified through circuit level simulations, and the prototype circuit is fabricated using CMOS 0.18um technology.

This paper presents a simple and novel generalized pulse width modulation (GPWM) algorithm for voltage source inverter fed induction motor drives. The classical space vector approach requires angle and sector information for the calculation of switching times, which increases the complexity of the PWM algorithm. Hence, to reduce the complexity, the proposed GPWM algorithm generates the modulating signals by using the instantaneous phase voltages only. In the proposed algorithm, a unique zero sequence signal is added to the instantaneous phase voltages in order to generate the modulating waveforms. By varying a constant in the zero sequence signal from 0 to 1, various PWM algorithms such as space vector PWM (SVPWM) and discontinuous PWM (DPWM) algorithms are generated. Moreover, a simple overmodulation algorithm is also presented in this paper. Thus, the proposed GPWM algorithm generates all possible PWM algorithms in the entire modulation region. To validate the proposed algorithm, several simulation and experimental results are presented and compared. The results show the best agreement with the published work.

Brushless DC motors (BLDC) are becoming increasingly attractive in a large number of applications due to performance advantages such as reduced size and cost, reduced torque ripples, increased torque-current ratio, low noises high efficiency, reduced maintenance and good control characteristics over a wide range in torque–speed plan and precise speed control. This paper focuses on the design and implementation of a BLDC motor speed control system using a microcontroller. The microcontroller generates Pulse Width Modulation (PWM) signals to regulate motor speed, which are supplied to the motor driver to ensure smooth operation and efficient performance. Additionally, motor protection was addressed using temperature sensors, and fire sensors were implemented for safety. This paper involves controlling a BLDC motor's speed using a potentiometer, Raspberry Pi Pico, and a motor driver. The Raspberry Pi Pico generates a Pulse Width Modulation (PWM) signal based on potentiometer input. That signal is given to the motor driver; the motor driver provides a variable voltage to the BLDC motor depending on the PWM duty cycle. The motor's speed increases/decreases based on the potentiometer's position. The temperature sensor is used for monitoring of overheating in the motor driver and motor.

A maximum power point tracking (MPPT) scheme based on a general pulse width modulation (PWM) modulator is presented. The purpose of the scheme is that switching converter behaves as a resistor seen by the photovoltaic module, it also regulates the input voltage to a desired value. The MPPT scheme is applied to a noncascading converter topology, which has the characteristic of processing a fraction of the total power generated.

A scalable pulsewidth control approach with 7-bit resolution for thermal control of optical ring resonator switch matrices in 0.16- $\mu\text{m}$ Bipolar-CMOS-DMOS (BCD) with a cell size of $79\ast 105 \mu\text{m}^2$ is introduced. One Gray counter at up to 1.2-GHz clock and pulsewidth modulation generation in each matrix cell leads to an electrical power consumption of 330 mW for all electronic control circuits of an optical 1000-switch-node matrix, resulting in a reduction of 11.1% of the power needed by a constant-voltage control approach.

The main objective of this work is to improve the performance of Multilevel Inverter by using the novel LS-PD- PWM and controlling technique instead of the existing approach. The proposed work focus on closed loop controller such as existing PI and Fuzzy Logic Controller for resistive load with Multilevel Inverter. The proposed Asymmetric fifteen level Inverter offers less THD and high frequency than the Asymmetric nine level inverter. Asymmetric multilevel inverter is used to reduce the switching losses and THD. In this work is the generation and implementation of Pulse Width Modulation (PWM) techniques using Field Programmable Gate Array (FPGA) for Multilevel Inverter. PWM can be generated via Microprocessors, Microcontroller, FPGA and DSP Processors. Higher density Programmable Logic Devices (PLD) such as FPGAs can be used to amalgamate large amounts of logic into a single Integrated. Pulse width modulation (PWM) is generally used in power converter control. To generate LS-PD- PWM by using FPGA, this occupies less memory capacity and accurate than conventional one. An efficient PWM generation technique is performed using FPGA for lower frequency applications. Simulation and synthesis is done by ModelSim6.3c and Xilinx10.1. Further, the Implementation is carried out by FPGA Spartan3 Xc3s50. Key Word: PWM, FPGA, PLD (Programmable Logic Devices), LS-PD-PWM

Pulse width modulation (PWM) is widely used in different applications. PWM transforms the information in the amplitude of a bounded input signal into the pulse width output signal without suffering from quantization noise. The frequency of the output signal is usually constant. In this paper, the new PWM system with frequency changing (PWMFM) is described. In such PWMFM the pulse width and also the carrier frequency are changed. Therefore, two independent pieces of information can be simultaneously transmitted over one channel; hence PWM and frequency modulation (FM) are simultaneously used. But such system needs 2 demodulators, one for PWM and the second for FM. PWMFM can be used in the following applications: LED light intensity control via PWM and several LED block switching by FM PWMFM is highly useful in motor speed control applications by PWM and direction of rotation with FM. PWMFM can be used also in a class-D audio amplifier for power control, e.g. coarse by means of FM and fine by PWM. PWMFM can be used for the simultaneous transmission of two independent information between all, mutual combinations of analog and digital circuits. The analog and digital circuits for modulation and demodulation of PWMF signal are described and measuring results are presented in this work.

Pulse width modulation (PWM) techniques involving different switching sequences are used in space vector-based PWM generation for reducing line current ripple in induction motor drives. This study proposes a hybrid PWM technique employing five switching sequences. The proposed technique is a combination of continuous PWM, discontinuous PWM (DPWM) and advanced bus clamping PWM methods. Performance of the proposed PWM technique is evaluated and compared with those of the existing techniques on a constant volts per hertz induction motor drive. In terms of total harmonic distortion in the line current, the proposed method is shown to be superior to both conventional space vector PWM (CSVPWM) and DPWM over a fundamental frequency range of 32–50 Hz at a given average switching frequency. The reduction in harmonic distortion is about 42% over CSVPWM at the rated speed of the drive.

This paper presents a novel switching sequence for Space Vector Advanced Pulse Width Modulation generation for Z source inverter. The Performances of an inverter depends on what type of modulation strategies is used to switch. There exists different types of classical and advanced Pulse Width Modulation (PWM) techniques to switch the traditional Voltage Source Inverter (VSI).The advanced PWM techniques are superior to classical PWM techniques in respect of load current ripple, Total Harmonic Distortions, switching losses. The same concept of advanced PWM techniques for VSI is applicable for Z-Source Inverter. This paper proposes certain vector sequences based on advanced PWM techniques for ZSI. The proposed vector sequences are analyzed in respect of load/line current ripple based on stator flux ripple concept. The superiority of the advanced PWM techniques over classical is verified by simulation study of a ZSI in PSim9.1.1 Environment for R-L and different motor load conditions.

TDA 16888 is designed for off-line switched mode power supplies (SMPS) with optional universal input and power factor correction, for example, for PCs, monitors, CTVs and industrial applications. Combi-IC TDA 16888 includes the pulse width modulated (PWM) control for a SMPS and the control for the preconverter to improve the power factor and to reduce the harmonics of the AC input current. Both sections are internally synchronized on the same operating frequency. The preferred topology of the PFC-preconverter is boost, but flyback is also possible. The PWM section can be designed as a forward or as a flyback converter. Maximum duty cycle of the PFC is about 95%, in order to achieve minimal line current gaps. Maximum duty cycle of the PWM is limited to 50% to prevent transformer saturation. In normal operation the PFC section operates with dual loop control. A first control loop controls the shape of the line current by average current control enabling either continuous or discontinuous operation mode. The second loop controls the DC bus voltage. There is a third control loop available that enables the PFC section as an auxiliary power supply even during disabling the PWM section. In this paper the PFC preconverter, PWM converter, PFC and PWM gate drive, and oscillator and synchronisation are described.

Conventional pulse width modulated (PWM) switching power supplies are not suitable for operation at extended temperatures beyond 125/spl deg/C. In virtually all power switching applications, mechanical apparatus is always attached to the power supply because the system mandates sufficient heat removal. The attachment is usually bulky and heavy compared with integrated circuit and electronics component. For commercial applications, power supply without a heat sink means a boost of power density. For aerospace applications, reduction or elimination of the weight and volume of the cooling system is extremely desirable. In recent years, there has been an increased demand for distributed engine and flight actuator electronics control. Commercial/military airplanes, supersonic and space vehicles benefit from the use of smart sensors and remote actuators. These ruggedized electronics must operate in harsh environments where active cooling is unavailable. Furthermore, ruggedized electronics have found other uses in the petroleum industry for geothermal instruments and data logging equipment. Such opportunities even extend to the automobile industry where electronic systems will be mandatory for improved fuel economy, smart braking, emission/exhaust monitoring and control. Perhaps the most challenging task for such ruggedized electronics is power supply design. This paper describes a new PWM power supply controller, a switch-mode ASIC (SMA) that has been developed to operate over the -55/spl deg/C to +225/spl deg/C temperature range.

This paper describes the design of a SiC pulse width modulation (PWM) signal generator in the HiTSiC® CMOS process from Raytheon Systems Limited. The high-temperature applications of the circuit include motor control in heavy equipment, deep earth drilling, dc-dc voltage converters and power inverters. The results presented in this paper are for the PWM circuit operating with an input clock frequency of 100 kHz and a supply voltage range of 12 to 15 V. The building blocks for the PWM include a current-starved delay generator, a comparator and XNOR gates. The delay is controlled by a 6-bit binary input that allows the user to dynamically tune the duty cycle. Experimental results show the circuit to have a tunable duty cycle between 16.3% and 84.3% at 400°C.

The emergence of wide bandgap power devices has brought the attention back to the flying capacitor (FC) multilevel inverters with a large number of stages, in an effort to increase the power density by minimizing the passive components. The main challenge that such systems face, particularly the ones based on high-frequency Gallium-Nitride devices and small-value ceramic capacitors, relate to the stringent requirements for precise and fast capacitor balancing. Conventional <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">natural balancing</i> techniques exhibit poor settling times, while most improved natural balancing methods are not easily scalable to more than five levels. The alternative of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">active balancing</i> normally requires one isolated sensor per FC which increases the overall system cost and footprint, or a single ac-side sensor that is more compact but calls for sophisticated PWMs that again are not available for multiple levels. In this paper we introduce a generalized pulse width modulation (PWM) strategy based on the phase-shift and carrier swapping principles for an arbitrary number of levels. We provide an easy and intuitive method for the extraction of the PWM pattern, the switching states, and their sequence. Simulations were carried out in Matlab/Simulink and experimental tests were conducted on a single-phase 7-level GaN inverter prototype. Not only is the extended PWM advantageous in natural balancing, but it also provides the right zero switching states for ac-side FC sensing in active balancing.

The authors describe a method for selecting pulse width modulation (PWM) patterns and a method for designing low-pass filters in large-capacity current source PWM power converters, to suppress higher harmonics flowing into the power supply. A test carried out on a 500 kVA PWM converter, employing the proposed methods, verified that they substantially decrease higher harmonics flowing into the power supply. The test also showed highly efficient converter characteristics with a supply power factor equaling almost 1.0.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A current fed push pull converters cascaded with a buck pre-regulator is proposed. Voltage stress of the push pull switches is reduced by buck pre regulation. Pulse width modulation is done only to the switch in buck stage. Output voltage and the buck inductor current is controlled using average current mode control. The closed loop simulation of a 20W,100V,0.2A cascaded buck push pull converter with analog control circuit is done using PSIM. Closed loop simulation using digital control circuit is done by using a SIMCOUPLER module which couples power electronic circuit in PSIM and digital control circuit in MATLAB. Further, hardware implementation of digital controllers on two platforms is explained. Switching pulses are generated using digital circuit are fed to the converter switches and the converter is tested for the open loop operation.