A Vector Space Decomposition Based Space Vector PWM Algorithm for a Three-Level Seven-Phase Voltage Source Inverter

In order to improve the Direct Current (DC) bus utilization ratio and realize harmonic suppression of a five-phase induction motor, the SVPWM (Space Vector Pulse Width Modulation) algorithm was researched in depth. Based on an analysis of the present SVPWM algorithm and the volt-second balance principle, a dynamic and adjustable new pattern four-vector SVPWM algorithm was proposed. The algorithm uses the modulation index and zero vector to improve the characteristics of the inductor motor, the function relationship with real-time dynamic ratio between the action–time ratio of the space voltage vector and the modulation index was proposed to maximize DC bus utilization ratio, and the random zero-vector dynamic modulation mode was used to reduce harmonic influence, being able to spread harmonics concentrated around certain frequencies across a wider frequency band and thus produce a more continuous and uniform power spectrum. The new algorithm model was built using Matlab/Simulink, and the simulation and experimental results demonstrated that the algorithm is effective and feasible.

Pulse width modulation (PWM) strategies for the control of asymmetrical six-phase drives have been widely studied since the beginning of this century. Carrier-based and different space vector PWM algorithms have been developed and evaluated. Nevertheless, there are still some challenges that require research work in this field. This paper deals with this topic, and introduces three space vector techniques. The methods are based in a recently developed scheme that combines the nearest two medium and two large size voltage vectors to synthesise the reference vector. The schemes enable either sinusoidal or multifrequency output voltage operation modes. Theoretical derivation supported by closed-loop tests demonstrate the viability and potential of the proposal.

A modified space vector pulse width modulation (SVPWM) strategy based on vector space decomposition and its equivalent dual three-phase SVPWM realization are proposed in this paper, which is suitable for two-level six-phase voltage inverter fed asymmetrical dual stator induction machines (DSIMs). The DSIM is composed of two sets of symmetrical three-phase stator windings spatially shifted by 30 electrical degrees. The proposed SVPWM technique can reduce the torque ripple and suppress the harmonic currents flowing in stator windings. Above all, the equivalent relationship between the proposed SVPWM technique and the dual three-phase SVPWM technique has been demonstrated, which allows easy implementation for digital signal processor (DSP). Simulation and experimental results, carried out separately on a simulation system and a 3.0 kW DSIM prototype test bench, are presented and discussed.

Multilevel inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters. Among various modulation techniques for a multi-level inverter, the space vector pulse width modulation (SVPWM) is widely used. The complexity is due to the difficulty in determining the location of the reference vector, the calculation of on times, and the determination and selection of switching states.This paper proposes a general SVPWM algorithm for Multi-level inverters based on standard two-level SVPWM . To control multilevel converters, the pulse width modulation (PWM) strategies are the most effective, especially the space vector pulse width modulation (SVPWM) one, which has equally divided zero voltage vectors describing a lower total harmonic distortion (THD). In this work, a three and four-level inverter using space vector modulation strategy has been modeled and simulated with a passive R-L load. Simulation results are presented for various operation conditions to verify the system model.

The use of wireless charging technology for Electric Vehicles (EVs) is gaining increasing significance due to its ability to charge batteries safely and conveniently without the need for physical connectors. This paper presents the design and implementation of the transmitter-side power conversion system for a wireless EV charging station. The proposed system architecture integrates a front-end Power Factor Correction (PFC) rectifier, an Interleaved Resonant DC-DC converter, and a three-level Neutral Point Clamped (NPC) inverter, providing a highly efficient and stable power transmission path for battery charging. The Interleaved Resonant DC-DC converter, designed with a Zero Voltage Switching (ZVS) mechanism, minimizes switching losses and enhances overall efficiency. Its operation under Constant Current (CC) and Constant Voltage (CV) control modes ensures smooth and reliable mode transition through an auxiliary controller incorporated alongside a conventional PI controller. The inverter stage adopts a Modified Space Vector Pulse Width Modulation (MSVPWM) strategy that significantly reduces Total Harmonic Distortion (THD) in both voltage and current waveforms, thereby maintaining compliance with power quality standards. The complete system's performance has been evaluated through both simulation and experimental validation. MATLAB/Simulink-based analysis demonstrates stable converter dynamics with a regulated output voltage of 325 V and negligible transient disturbances during mode transitions. A 0.2 kW laboratory prototype was developed to confirm the simulation results using PIC24F16KA102 and FPGA-SPARTAN-7 controllers for power and switching signal generation, respectively. Experimental measurements indicate that the proposed Interleaved Resonant DC-DC converter achieved an efficiency of approximately 95.35% at rated load, which aligns closely with theoretical predictions. The three-level NPC inverter produced a 320 V output with voltage and current THD levels of 4.8% and 5.6%, respectively. A 2:1 air-core transformer designed for high-frequency operation (100-200 kHz) effectively transfers power to the EV receiver side. The influence of coupling coefficient and air-gap variation on transfer efficiency was systematically investigated, revealing an optimal separation distance of 10-20 mm. The overall results confirm the efficacy of the proposed design for high-efficiency wireless EV charging. Future work will concentrate on optimizing the receiver-side converters to further enhance system efficiency and dynamic performance.

An analytical evaluation method for output waveform quality of space vector pulse width modulation (PWM) strategies applied in neutral-point-clamped three-level converter (3L-NPC) is proposed in this paper. Low frequency error caused by neutral point voltage ripple and high frequency error introduced by space vector synthesis were both taken into account, and the unified error model of output current ripple was established. By taking continuous and discontinuous modulation strategies as examples, the unified error model was validated through Fourier analysis of the experimental results. The proposed evaluation method will be helpful for the switching sequence optimization and the modulation strategy selection.

This article proposes an optimized space vector pulsewidth modulation (SVPWM) strategy with minimum common-mode voltage (CMV). Compared with earlier SVPWM methods, the proposed optimized strategy is implemented in the 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> coordinates. Locating the sector triangle, calculating the duty cycles, and determining the switching sequences require only basic arithmetic operations, which greatly reduces the computational complexity. The switching state with minimum CMV corresponding to the space vector can be calculated directly. The proposed optimized modulation strategy effectively solves the problem that the traditional SVPWM is difficult to be implemented as the number of levels increases. It can be easily extended to any level converters without additional computational burden. Based on the proposed optimized SVPWM strategy with minimum CMV, the SVPWM strategy for eliminating CMV is proposed. The proposed SVPWM strategy for eliminating CMV improves the utilization of the redundant cells and reduces the total harmonic distortion of phase voltages without increasing the difficulty of implementing the SVPWM algorithm. Finally, the proposed two SVPWM strategies are verified with extensive simulations and experiments.

Permanent magnet synchronous motor (PMSM) is the most widely used motor in electric vehicles (EV) due to its high power density and high efficiency. Conventional direct torque control (DTC) is developed to improve the performance of speed response of the PMSM drive but it suffers from higher torque ripples. Therefore a space vector modulation (SVM) based DTC has been developed to enhance the speed response. Due to the use of flux comparator and torque comparator conventional DTC has disadvantages such as higher torque and current ripples at steady state. To improve the performance of PMSM drive a space vector pulse width modulation is used with 3 level NPCI. To improve the performance of 2 level inverter in the PMSM drive is replaced with a neutral point clamped inverter (NPCI). Also, the switching selection strategy of SVM is modified using nearest three space vector pulse width modulation to reduce the total harmonic distortion (THD) in the inverter output. The simulation outcome proves that the SVM technique implementation in DTC for 3 level NPCI yields good performance for PMSM.KeywordsElectric vehicles (EV),voltage source inverter (VSI)Direct torque control (DTC)Neutral point clamped inverter (NPCI)Permanent magnet synchronous motor (PMSM)Space vector modulation (SVM)Total harmonic distortion (THD)

This article presents an enhanced space vector pulse width modulation (SVPWM) strategy based on vector space decomposition (VSD) for the dual three-phase machines fed by two dc-source voltage source inverters (VSIs). Compared with existing methods that only account for balanced dc-link voltages, the proposed method considers unbalanced dc-link voltages in both the α-β and z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> -z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> planes. Two categories of medium voltage vectors are first defined in this article. An enhanced 12-sector SVPWM strategy that toggles two categories of medium voltage vectors in each fixed 30° sector is proposed. Moreover, the performance of the proposed method, including the modulation depth, the range of the dc-link voltage ratio, and the toggling point of the medium vector is analyzed. The proposed method can reduce the computational burden of the complicated sector classifications and it easily chooses suitable vectors to track the reference voltage with changes in the dc-link voltage ratio. The experimental results of the proposed SVPWM techniques are verified in a dual three-phase permanent magnet synchronous machine (PMSM) fed by two dc-source VSIs.

In order to solve the problem that the third harmonic current of Five phase Permanent Magnet Synchronous Motor (FPMSM) cannot be closed-loop controlled in the single-plane vector control of the five-phase permanent magnet synchronous motor, the two-plane vector Space Vector Pulse Width Modulation algorithm (SVPWM) algorithm is studied in this paper. The first to establish the mathematical model of dual dq plane, expand Park &#x0026; Clark transformation, changed the traditional SVPWM, the asymmetry problem of the double dq plane treated by the normalization method. The SVPWM control is simplified, then set i<inf>q3</inf> = ki<inf>q1</inf> and the Speed&#x0026;Current double closed-loop experiment is conducted to verify the correctness of the algorithm. Finally, through the Fast Fourier Transform (FFT) of the output current, amplitude and effective value of the current after the injection of the thirdharmonic are within the allowable range, the output torque pulsation is stable, it constitutes the dual dq plane drive control system of FPMSM.

Purpose This paper aims to present a modified space vector pulse width modulation (SVPWM) technique for six-phase induction motor drive based on common-mode voltage (CMV) and current losses which are two important issues affecting drive system behavior and quality. Design/methodology/approach It is shown that the presence of z-component currents and the presence of CMV in six-phase drive system are two major limiting factors in space vector selection. The behavior of several space vector selections in a two-level inverter considering minimum CMV and z-components is investigated. Then, the space vectors in a three-level inverter is analyzed and tried to explore an SVM technique with better behavior. Findings The analyses show that all the problems cannot be solved in a six-phase drive system with two-level inverter despite having 64 space vectors; this study tried to overcome the limitations by exploring space vectors in a three-level inverter. Originality/value The proposed pulse width modulation (PWM) strategy leads to minimum current distortion and undesired current components with zero CMV and modest torque ripple.

Dual three-phase permanent-magnet synchronous machines (DTP-PMSM) connected with a single neutral point provide a loop for zero-sequence current (ZSC). This paper proposes a novel space vector pulse width modulation (SVPWM) strategy to suppress the ZSC. Five vectors are selected as basic voltage vectors in one switching period. The fundamental and harmonic planes and the zero-sequence plane are taken into consideration to synthesis the reference voltage vector. To suppress the ZSC, a non-zero zero-sequence voltage (ZSV) is generated to compensate the third harmonic back-EMF. Rather than triangular carrier modulation, the sawtooth carrier modulation strategy is used to generate asymmetric PWM signals. The modulation range is investigated to explore the variation of modulation range caused by considering the zero-sequence plane. With the proposed method, the ZSC can be considerably reduced. The simulated and experimental results are presented to validate the effectiveness of the proposed modulation strategy.

Multilevel inverters are increasingly being used in high-power medium voltage industrial drive applications due to their superior performance compared to conventional two-level inverters. Thre are a number of Pulse width modulation (PWM) techniques applied in recent years. The most widely applied PWM techniques are Sine Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM). SPWM is the most simple modulation technique that can realize easily in analog circuit. However, it has some drawbacks such as higher total harmonic distortion (THD), lower effective DC utilization and lower switching frequency. Space vector pulse width modulation (SVPWM) is widely used because of their easier digital realization and better DC bus utilization and lower THD. The complexity is due to the difficulty in determining the reference vector location, on times calculation, and switching states selection. This paper presents a simple SVPWM algorithm for diode clamped three level inverters based on standard two-level SVPWM which can easily determine the location of reference vector, calculate the on-times, the selection of switching states. Three level diode clamped inverter (3LDCI) using space vector modulation technique has been modeled and simulated using MATLAB/SIMULINK and Origin 6.1 with a passive R-L load that can be extended to any level. Simulation results are presented to verify the proposed SVPWM control in terms of THD. The results are compared with conventional sinusoidal pulse width modulation (SPWM) where SVPWM shows better performance than SPWM in terms of THD. DOI: http://dx.doi.org/10.11591/ijpeds.v5i1.6038

This paper investigates the design and validation of a new space vector pulse width modulation (SVPWM) algorithm for thermal protection of T-type three-level inverters. Thermal overheating is the main cause of shortened-lifetime and open-circuit faults of power devices. Power devices are subjected to thermal overheating due to degradation of power devices due to continuous overloading and power cycling, and degradation and faults in cooling systems. When a thermal overheating is detected in one of the switching devices, the proposed algorithm is applied to protect the thermally-overheated switch from being short/open-circuited and hence preventing the total system from malfunction. The lifetime and the reliability of the inverter have been enhanced considerably by a simple modification of the conventional SVPWM algorithm and without adding any additional hardware or complex calculations. In addition to that, the proposed algorithm does not deteriorate the inverter's output current. The proposed thermal protection SVPWM algorithm has been designed, simulated, and experimentally validated at different operating conditions.

A multiaverage random switching frequency space vector pulsewidth modulation (MARSF-SVPWM) strategy is proposed in this article, in order to further disperse the high-order harmonics concentrated at the switching frequency and its integer multiplies in the output voltage of the inverter. The proposed strategy divides the fundamental period equally, with different stages corresponding to different average switching frequencies and spread-spectrum ranges, in contrast with the conventional random switching frequency space vector pulsewidth modulation (RSF-SVPWM), under the premise of maintaining the same overall average switching frequency and spread-spectrum range. The simulation and experimental results demonstrate that, even in the case of a narrow spread-spectrum range, the proposed MARSF-SVPWM strategy can obtain a better effect of high-order harmonic dispersion.