Multifrequency space vector pulse width modulation for asymmetrical six-phase drives

Multilevel inverters are increasingly being used in high-power medium voltage industrial drive applications due to their superior performance compared to conventional two-level inverters. Thre are a number of Pulse width modulation (PWM) techniques applied in recent years. The most widely applied PWM techniques are Sine Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM). SPWM is the most simple modulation technique that can realize easily in analog circuit. However, it has some drawbacks such as higher total harmonic distortion (THD), lower effective DC utilization and lower switching frequency. Space vector pulse width modulation (SVPWM) is widely used because of their easier digital realization and better DC bus utilization and lower THD. The complexity is due to the difficulty in determining the reference vector location, on times calculation, and switching states selection. This paper presents a simple SVPWM algorithm for diode clamped three level inverters based on standard two-level SVPWM which can easily determine the location of reference vector, calculate the on-times, the selection of switching states. Three level diode clamped inverter (3LDCI) using space vector modulation technique has been modeled and simulated using MATLAB/SIMULINK and Origin 6.1 with a passive R-L load that can be extended to any level. Simulation results are presented to verify the proposed SVPWM control in terms of THD. The results are compared with conventional sinusoidal pulse width modulation (SPWM) where SVPWM shows better performance than SPWM in terms of THD. DOI: http://dx.doi.org/10.11591/ijpeds.v5i1.6038

In order to improve the Direct Current (DC) bus utilization ratio and realize harmonic suppression of a five-phase induction motor, the SVPWM (Space Vector Pulse Width Modulation) algorithm was researched in depth. Based on an analysis of the present SVPWM algorithm and the volt-second balance principle, a dynamic and adjustable new pattern four-vector SVPWM algorithm was proposed. The algorithm uses the modulation index and zero vector to improve the characteristics of the inductor motor, the function relationship with real-time dynamic ratio between the action–time ratio of the space voltage vector and the modulation index was proposed to maximize DC bus utilization ratio, and the random zero-vector dynamic modulation mode was used to reduce harmonic influence, being able to spread harmonics concentrated around certain frequencies across a wider frequency band and thus produce a more continuous and uniform power spectrum. The new algorithm model was built using Matlab/Simulink, and the simulation and experimental results demonstrated that the algorithm is effective and feasible.

Multilevel inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters. Among various modulation techniques for a multi-level inverter, the space vector pulse width modulation (SVPWM) is widely used. The complexity is due to the difficulty in determining the location of the reference vector, the calculation of on times, and the determination and selection of switching states.This paper proposes a general SVPWM algorithm for Multi-level inverters based on standard two-level SVPWM . To control multilevel converters, the pulse width modulation (PWM) strategies are the most effective, especially the space vector pulse width modulation (SVPWM) one, which has equally divided zero voltage vectors describing a lower total harmonic distortion (THD). In this work, a three and four-level inverter using space vector modulation strategy has been modeled and simulated with a passive R-L load. Simulation results are presented for various operation conditions to verify the system model.

The latest trend in modern industrial application is the use of variable voltage supply to the AC drives from a three phase voltage source inverter (VSI). Different types of Pulse Width Modulation (PWM) scheme are used to modulate output voltage of VSI. The most commonly used PWM schemes for three-phase VSI are carrier-based sinusoidal PWM and Hybrid Space Vector PWM (HSVPWM). Researchers adequately prefer the use of HSVPWM because of their easier digital realization and better dc bus utilization. The advantages of HSVPWM are reduction of total harmonic distortion, improvement in output voltage and reduction of torque ripple in induction motor drives. This paper provides a comprehensive literature review on different topologies of HSVPWM. These includes Advanced Bus Clamped SVPWM (ABCSVPWM), Neutral Point Clamped SVPWM (NPCSVPWM) and Diode Clamped SVPWM (DCSVPWM).

A novel space vector pulse width modulation (PWM) scheme based on the employment of medium magnitude space vectors for six-phase voltage source inverter has been developed. The proposed PWM scheme allows generating the six-phase voltage with the reduced level of low order harmonics. It is suitable for inverters driving six-phase AC induction motors with sinusoidal distribution of windings, with a single neutral point. DOI: http://dx.doi.org/10.5755/j01.eee.20.9.8712

The aim of this paper is to obtain the AC voltage from DC source with the help of Space vector based Inverter. In a space-vector PWM (Pulse Width Modulation) inverter, which is widely used, the voltage utilization factor can be increased to 0.906, normalized to that of the six step operation. Three phase voltage-source pulse width modulation inverters have been widely used for dc/ac power conversion since they can produce a variable voltage and variable frequency power. However, they require a dead time to avoid the arm-short and snubber circuits to suppress the switching spike. Apart from these ancillary aspects, the PWM inverters have an essential problem that they cannot produce voltages as large as the six-step inverters can. That is, the dc bus voltage cannot be utilized to the maximum. To increase the voltage utilization of the sinusoidal PWM inverter, a method of the addition of the third harmonics to the reference voltage was proposed by which the fundamental component can be increased by 15.5%. In a space-vector PWM inverter, which is widely used, the voltage utilization factor can be increased to 0.906, normalized to that of the sixstep operation. On the other hand, different discontinuous PWM strategies were analyzed, where the modulation waveform of a phase has at least one segment of 60 which is clamped to the positive and/or negative dc bus for, at most, a total of 120 in a fundamental period during which no switching in either inverter arm occurs. Recently, it is shown that discontinuous PWM schemes and the space-vector PWM can be obtained by properly adding a zero-sequence voltage to the original modulation waveform.

In this paper, a novel approach to realize the carrier-based pulse width modulation (CBPWM) method for indirect matrix converter (IMC) is presented. The advantage of the proposed CBPWM method is that only one triangular carrier signal with constant gradient falling and rising edges is used to generate the PWM to the power switches in both the rectifier and the inverter stages of IMC. The analysis of the proposed CBPWM method is based on the space vector approach and the relationship between CBPWM and space vector pulse width modulation (SVPWM) methods is provided. In this paper, four CBPWM methods called: sinusoidal PWM, third harmonic injection PWM, symmetrical PWM and discontinuous PWM are presented. These different CBPWM schemes are established according to the distribution of zero vectors and the switching pattern of the SVPWM method. The comparison of output voltage performance with different CBPWM schemes are investigated. Compared to the conventional method the calculation time of the proposed method is reduced around 50%. Concretely, the calculation time of the SVPWM method is 45 μs, while the calculation time of the proposed method is 22 μs. The experiments have been carried out to show the effectiveness of the proposed method.

This paper is to present a new space vector pulse width modulation (PWM) algorithm for four switch three phase inverter (FSTPI) fed induction motor under DC-link voltage imbalance. By using reasonable mathematical transform, space vector PWM (SVPWM) technique for FSTPI under DC-link voltage imbalance or ripples have been solved, which is based on the establishment of basic space vectors and modulation technique in similarity with six-switch three-phase inverters. This approach has a very important sense to solve hard problems for FSTPI under DC-link voltage imbalance, for example ensuring the required voltage for undermodulation mode and overmodulation mode 1 and 2, extended to six-step mode. Matlab/Simulink is used for the simulation of the proposed SVPWM algorithm for undermodulation, overmodulation mode 1 and 2. This SVPWM approach is also validated experimentally using DSP TMS320LF2407a in FSTPI-IM system.

Purpose This paper aims to present a modified space vector pulse width modulation (SVPWM) technique for six-phase induction motor drive based on common-mode voltage (CMV) and current losses which are two important issues affecting drive system behavior and quality. Design/methodology/approach It is shown that the presence of z-component currents and the presence of CMV in six-phase drive system are two major limiting factors in space vector selection. The behavior of several space vector selections in a two-level inverter considering minimum CMV and z-components is investigated. Then, the space vectors in a three-level inverter is analyzed and tried to explore an SVM technique with better behavior. Findings The analyses show that all the problems cannot be solved in a six-phase drive system with two-level inverter despite having 64 space vectors; this study tried to overcome the limitations by exploring space vectors in a three-level inverter. Originality/value The proposed pulse width modulation (PWM) strategy leads to minimum current distortion and undesired current components with zero CMV and modest torque ripple.

An analytical evaluation method for output waveform quality of space vector pulse width modulation (PWM) strategies applied in neutral-point-clamped three-level converter (3L-NPC) is proposed in this paper. Low frequency error caused by neutral point voltage ripple and high frequency error introduced by space vector synthesis were both taken into account, and the unified error model of output current ripple was established. By taking continuous and discontinuous modulation strategies as examples, the unified error model was validated through Fourier analysis of the experimental results. The proposed evaluation method will be helpful for the switching sequence optimization and the modulation strategy selection.

This paper presents a novel modulation strategy for a seven-phase three-level inverter, aimed at variable-speed drive applications. Developed space vector pulsewidth modulation (SVPWM) strategy is based on vector space decomposition (VSD) approach and an analysis of multidimensional space vector projections in mutually orthogonal planes. The algorithm represents an extension of a recently developed five-phase three-level SVPWM algorithm and is considerably more complex, due to the existence of three mutually orthogonal planes in a seven-phase system. The difficulties of generalization of space vector strategies, which stem from the nature of the multiphase systems, are highlighted. Increasing the number of phases from five to seven increases the number of switching states from 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> = 243 to 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> = 2187 and the number of orthogonal planes from two to three. This considerably affects the complexity of the offline calculations. However, the final implementation of the algorithm is simple. Developed SVPWM algorithm is compared to an equivalent carrier-based strategy and it is shown that they yield identical performance. The complexity of the algorithms for real-time implementation is compared. Simulation and experimental results, obtained using neutral-point clamped inverter, verify the theoretical developments.

This thesis presents design and implementation of a 20 kVA division-summation (D-Σ) digital controlled three-phase four-wire multi-function inverter system. The in-verter can be operated in grid-connected or stand-alone mode to act as a renewa-ble-energy ac power-supply system. In the stand-alone mode, the control of this in-verter uses the D-Σ digital control law for voltage tracking which includes load im-pedance estimation and repetitive control, causing the inverter can stabilize sinusoidal output voltage for unbalanced load and nonlinear load. For the grid-connected mode, in order to achieve a specific PF and stabilize grid voltage and frequency, the control is the D-Σ digital control law for current tracking which supplemented by a droop control based linear P-Q compensation. Moreover, the D-Σ digital control law in this research is based on Two-Phase Modulation (TPM) scheme and associated with the switching sequence transformed from space vector pulse width modulation (SVPWM) scheme, and thus, the inductance variation can be taken into account, reducing core size significantly. Finally, the control laws are verified with measured results from a 20 kVA three-phase four-wire inverter system.

The space vector pulsewidth modulation (SVPWM) techniques enhance the performance of multilevel multiphase inverters. With multilevel (three-phase) inverters and with (two-level) multiphase inverters, it is widely accepted that the typical SVPWM strategies have an equivalent carrier-based pulsewidth modulation (CBPWM) counterpart, which produces identical results. However, the conclusions reached in the articles that show these cannot be applied, nor even extended, to SVPWM techniques with more than two levels and three phases. This article shows that the most widely accepted multilevel multiphase SVPWM techniques have a fully equivalent CBPWM counterpart, which consists of a phase disposition pulsewidth modulation with an appropriate zero-sequence injection scheme. Closed-form expressions to calculate the zero sequences are provided. The proposed modulation techniques are simulated and then implemented in a field-programmable gate array, showing that the equivalent CBPWM techniques produce identical results as the original SVPWM ones, but with a significant reduction of hardware requirements. The proposed methodology can be generalized to other multilevel multiphase SVPWM techniques.

This paper presents a nine-switch inverter using a level-shift carrier-based space vector pulse width modulation (SVPWM) scheme, controlling the two paralleled ac loads for constant frequency mode (CF-mode) and variable frequency mode (VF-mode) without the short-through in the inverter leg. The dual output voltages and phase currents can be kept out of the distorted attribute, which is produced by the crossover of the modulating signals. The mathematical models are proposed by the SVPWM scheme and based on the zero-sequence injection principle. The shifted levels of the SVPWM modulating signals with the offset control decrement are then designed by the relationship of the modulation indices. The proposed modulation performance has been verified by the simulated implementation that is effectively carried out on the applicability of the proposed algorithm, the high modulation index is needed.

In order to solve the problem that the third harmonic current of Five phase Permanent Magnet Synchronous Motor (FPMSM) cannot be closed-loop controlled in the single-plane vector control of the five-phase permanent magnet synchronous motor, the two-plane vector Space Vector Pulse Width Modulation algorithm (SVPWM) algorithm is studied in this paper. The first to establish the mathematical model of dual dq plane, expand Park &#x0026; Clark transformation, changed the traditional SVPWM, the asymmetry problem of the double dq plane treated by the normalization method. The SVPWM control is simplified, then set i<inf>q3</inf> = ki<inf>q1</inf> and the Speed&#x0026;Current double closed-loop experiment is conducted to verify the correctness of the algorithm. Finally, through the Fast Fourier Transform (FFT) of the output current, amplitude and effective value of the current after the injection of the thirdharmonic are within the allowable range, the output torque pulsation is stable, it constitutes the dual dq plane drive control system of FPMSM.