Analysis and Implementation of Image Steganography by Using AES Algorithm

File-sharing activities become a bridge for communication in the form of data between one party and another party. File sharing allows users to share data with other users, by uploading data to the server computer and other users can download data from the server computer. A document security system is indispensable to keep document data safe until its destination. File Web Sharing will transmit data with cryptographic methodologies. The algorithm used is Advanced Encryption Standard (AES), Data Encryption Standard (DES), and Blowfish. This study aims to compare the performance of AES, DES, and Blowfish algorithms when implemented to secure file sharing. Performance research results show that the DES algorithm is on average 8.35% faster than AES and the Blowfish algorithm is 7.11% faster than AES. Memory usage capacity testing shows that the AES algorithm requires 4.82% greater memory capacity than Blowfish, and the DES requires 2.41% greater memory capacity than the Blowfish algorithm. Kegiatan file sharing menjadi jembatan komunikasi data antara satu pihak dengan pihak lainnya. File sharing memberikan pengguna kemampuan untuk berbagi data dengan pengguna lain, dengan cara mengunggah data ke komputer server dan pengguna lain dapat mengunduh data dari komputer server. Sistem keamanan terhadap dokumen sangat diperlukan untuk menjaga data dokumen tetap aman sampai tujuannya. Web File Sharing akan mengirimkan data dengan metodologi kriptografi. Algoritma yang digunakan adalah Advanced Encryption Standard (AES), Data Encryption Standard (DES), dan Blowfish. Penelitian ini bertujuan untuk membandingkan kinerja algoritma AES, DES dan Blowfish saat diimplementasikan untuk mengamankan file sharing. Hasil pengujian kinerja menunjukkan bahwa algoritma DES rata-rata 8,35% lebih cepat dibandingkan AES sedangkan Blowfish 7,11% lebih cepat dibandingkan AES. Berdasarkan pengujian kapasitas penggunaan memori terlihat bahwa AES membutuhkan kapasitas memori 4,82% lebih besar dibandingkan Blowfish dan DES membutuhkan kapasitas memori 2,41% lebih besar dari Blowfish.

The Consultative Committee for Space Data Systems (CCSDS) recommends AES algorithm as a cryptographic algorithm to maintain confidentiality and data security between spacecraft and ground systems. In implementation, there are several AES algorithm operating modes including Cipher-Block Chaining (CBC), Electronic Codebook (EBC), Cipher Feedback (CFB), Output Feedback (OFB), and counter mode (CTR). One of the operating modes of AES algorithm recommended by CCSDS is CTR because it has advantages in terms of efficiency of implementation and offers a high level of data security. LAPAN-A4 as the next generation of LAPAN satellites also uses CCSDS standard in terms of data exchange between satellites and ground stations including telemetry and telecommand (TTC) data and satellite payload data. In order to protect LAPAN-A4 satellite data, especially TTC data, in this paper AES algorithm was implemented in CTR operating mode on the FPGA which will then be implemented on LAPAN-A4 satellite onboard data handling (OBDH) as one of LAPAN-A4 satellite data security systems. To overcome the limited resource of FPGA, optimization is also done using basic iterative AES hardware reused method, which is to reuse hardware that has been designed n times for same operation for AES algorithm. From the results of implementation and optimization, efficiency of logic gates used is increasing almost a quarter less than the previous research.

This study discusses the effectiveness of using AES (Advanced Encryption Standard) and RC4 (Rivest Chipper 4) as digital data security algorithms to prevent and protect transaction data from irresponsible parties. This needs to be done because the development of sales transactions or other services has used digital technology a lot. This situation causes the need to secure digital data from existing transactions, so that transaction data can be stored safely. Transaction data security is carried out by changing data into ciphers or codes that are difficult to read using the AES (Advanced Encryption Standard) and RC4 (Rivest Cipher 4) algorithms. This research begins by collecting existing transaction data and then transforming it into ASCII code. The results of the transformation will be used to perform calculations using the AES algorithm. After completing the calculation process using the AES algorithm, then do the calculations using RC4. These results will be stored in the database so that the transaction data that has turned into these codes cannot be known by other parties. The combination of the AES and RC4 algorithms is carried out to strengthen data encryption because there are more and more rotation systems and double security is carried out so that digital data is not easily read and misused. With the presence of this research, it can be shown that the AES and RC4 algorithms are capable of encrypting existing transaction data with multiple levels of security.

The National Institute of Standards and Technology (NIST) of US announced Rijndael algorithm as the advanced encryption standard (AES) in October 2000, Despite AES surpassing in security the data encryption standard (DES), it is still rare to be implemented in smart cards, due to the reason of deficient AES coprocessors. Here a chip operation system (COS) called NexCard, which derived from Microsoft's Windows COS, is used as the AES implementation platform. After a suitable COS architecture design for AES and methodology of efficient memory usage, the simulation result shows that direct embedding AES encryption attains 0.56 ms at system clock 15 MHz on the INFINEON SLE66CX322P chip without existence of coprocessor. Corresponding to the development needs in smart card cryptographic algorithm implementations, and different level of the security design specifications, a concept to conjoin numbers of algorithms into single smart card called cipher system on demand (CSOD) method is accomplished in this study concurrently. This is a method utilizing the multiapplication capability of NexCard v2.0 to execute the same AES algorithm as an on-card applet. Although the performance of CSOD is not as good as AES embedded method, CSOD can provide the same result in the situation of adaptability and extendibility.

The meaning of security is to protect something important from not authorized peoples. Cryptography is one of the security systems. Many applications could be used in the security systems like military applications, email, banking, information technology of database. The proposed system uses advanced encryption standard(AES) with secure hash algorithms(SHA-1) to produce a strong ciphertext. Moreover, this paper make the combination of (SHA-1) which is a one way encryption, as a key with (AES) algorithm which is a two way encryption as a ciphering generator to obtain confidentiality and integrity, In this paper presented implementation of Advanced Encryption Standard (AES) and Secure Hash (SHA-1) Algorithm by the use of FPGA Hardware card, However implementation of the AES algorithm and SHA-1 using LABVIEW environment with MATLAB system generator to generate stream data to FPGA hardware target. The output of the hash function is used as an input key for AES in order to improve data security, From the algorithms result of AES and SHA-1 obtained in FPGA, the system obtained how it is simple in modeling hashing and AES algorithms, generating hash codes and plain texts in (small and capital letters), symbols and numbers. The FPGA card used in this system (Spartan 3AN)with frequency (50%), the complete system take (1,147)size from the available space of (11,776) and accuracy (90%),the system work properly.

Mobile ad hoc network (MANET) is a group of mobile nodes that communicates with each other without any supporting infrastructure. These networks have some unique features such as dynamic mobility, open nature, lack of infrastructure, limited physical security and they are vulnerable to several security threats. Malicious node can drop all or partial received packets instead of forwarding them to the next hop through the path. In order to find the malicious nodes, an initial transmission is made between the source and destination nodes. Using fuzzy rules, the trust value of each node is computed and it varies from 0 to 1. A common threshold value is set for each node and by using this threshold value, every node in the network can be identified as either a malicious node or a regular node. After identifying the malicious nodes, these nodes are eliminated by muting the power to off state. As the malicious nodes are eliminated between source and destination nodes, source node can select another trusted path to its destination
 node. For security and authentication of routing information, hybrid cryptography is employed, using advanced encryption standard (AES) and elliptic curve cryptography (ECC) algorithms. AES algorithm is used as symmetric algorithm to encrypt the routing information and ECC algorithm is used as asymmetric algorithm to encrypt the public key. During encryption, the original plain text is converted into cipher text with encrypted public key and similarly during decryption cipher text is converted into original plain text with decrypted private keys. So the proposed method involves both AES and ECC algorithms which provides security mechanism as efficient and sufficient one. The experimental simulations are carried for the proposed model using network simulator 2 (NS-2) for Throughput, Delay, Packet delivery ratio, Packet overhead and Packet drop.

An efficient AES implementation using FPGA with enhanced security features

The throughput of WPAN (Wireless Personal Area Network) based on Bluetooth was decided by the interference of Bluetooth piconets in the network. The interference was decided by the hamming correlation of Bluetooth FH (Frequency Hopping) selected sequence. In order to improve the WPAN throughput, the WPAN model and data packet collision model were built and the relations about WPAN throughput, the maximum hamming correlation of FH selected sequence, the numbers of Bluetooth piconets and the SNR of channel were analyzed. The functions of WPAN throughput were deduced. After analyzing the performance of Bluetooth FH selected sequence, the original algorithm was replaced by the AES (Advanced Encryption Standard) algorithm. The theoretical analysis proved that the AES FH sequences selected algorithm could improve the WPAN throughput. The simulation results proved the theoretical analysis. The test result with ARM926EJs SoC (System on Chip) + RF (Radio Frequency) chip nRF2401 and CSR's Bluecore4 Bluetooth module got the same conclusion. All of these could prove that the AES algorithm can improve the WPAN throughput efficiently.

Data encryption has become a vital need for protecting the user data in most of communication areas. Advanced Encryption Standard (AES) algorithm has become the optimum choice for various security services in numerous applications due to its reliability and flexibility. The AES algorithm faces two main challenges which included in both encryption/decryption speed, and the consumed implementation area. This paper presents an optimized implementation of the AES algorithm with respect to the consumed implementation area by combining both data and key expansion approaches. The optimized implementation of AES increases its applicability in the small sized devices such as mobile phones and smart cards. The experimental outcomes prove the superiority of the proposed optimization approach compared to the available approaches in the literature with acceptable frequency and throughput for low throughput applications.

With the rapid development of internet technology and the increasing popularity of e-commerce, data encryption technology plays a very important role in data security. Information security has two aspects: security protocol and cryptographic algorithm and the latter is the foundation and core technology of information security. Advanced Encryption Standard (AES) encryption algorithm is one of the most commonly used algorithms in symmetric encryption algorithms. Such algorithms face issues when used in the context of key management and security functions. This paper focuses on the systematic analysis of these issues and summarizes AES algorithm implementation, comprehensive application and algorithm comparison with other existing methods. To analyze the performance of the proposed algorithm and to make full use of the advantages of AES encryption algorithm, one needs to reduce round key and improve the key schedule, as well as organically integrate with RSA algorithm. Java language is used to implement the algorithm due to its large library, then to show the efficiency of the proposed method we compare different parameters, such as encryption/decryption speed, entropies and memory consumption...) with a classic algorithm. Based on the results of the comparison between AES and the hybrid AES algorithm, the proposed algorithm shows good performance and high security. It therefore can be used for key management and security functions, particularly for sharing sensitive files through insecure channel. This analysis provides a reference useful for selecting different encryption algorithms according to different business needs.

Data security is the focus of information security. As a primary method, file encryption is adopted for ensuring data security. Encryption algorithms created to meet the Data Encryption Standard (DES) and the Advanced Encryption Standard (AES) are widely used in a variety of systems. These algorithms are computationally highly complex, thus, the efficiency of encrypting or decrypting large files can be drastically reduced. To this end, we propose an optimized algorithm that efficiently encrypts and decrypts large files by parallelizing processing tasks on a single heterogeneous many-core processor in the Sunway TaihuLight computer system. Firstly, we convert the serial DES and AES programs to our experimental platform. Then we implement a task assignment strategy to test the converted algorithms. Finally, in order to optimize parallelized algorithms and improve data transmission performance, we apply the master-slave communication optimization, the three-stage parallel pipeline, and vectorization. Extensive experiments demonstrate that our optimized algorithm is faster than the state-of-the-art open-source implementations of DES and AES. Compared with the serial processing algorithms, our parallelized DES and AES perform nearly 40 times and 72 times faster, respectively. The work described in this paper leverages existing methods and provides a sound basis for the direction of future research in data encryption.

The rapid The main problem in the misuse of data used in crime is the result of a lack of file security. This study proposes a data security method to protect document files using the Advanced Encryption Standard (AES) algorithm combined with the Vigenere Cipher. This research carried out 2 processes, namely the encryption process and the decryption process. The encryption process will be carried out by the AES algorithm and then encrypted again with the Vigenere Cipher algorithm. The experiments show that the proposed method can encrypt files properly, where there are changes in the value of the document file and the encrypted file cannot be opened and the description results do not cause changes to the original file. The results of this study are that the system is able to work properly so as to produce file encryption and decryption using the AES method combined with the Vigenere Cipher. In document files, the largest difference in encryption and decryption time is 8 seconds, while in image files the difference in encryption and decryption time is 17 seconds. This longest time difference is generated by large files.

Arithmetic coding technique is very much effective and flexible and it is evident in most of the circumstances while on the other hand AES is advanced encryption standard process which deals with changeover and permutation of data for proper security. The paper presents the security and compression of data by Arithmetic coding with AES (Advanced Encryption Standard) algorithm. Basic research is to arithmetically encode the data first, followed by encryption by using AES algorithm and then transmits the code. At the receiving end the data is decrypted and decoded to produce the user data. The paper has an advantage of encoding/decoding and compression of data both at the same time. The input data size is of 128 bits or 256 bits in AES, so the idea is to compress the data before encryption by digital arithmetic coding. The arithmetic coding and Huffman coding are very much alike in their working as they both achieve the task of compression by plummeting the average number of bits required to represent each and every symbol.

Video steganography, a technique for embedding secret information within video sequences, has gained prominence in the domain of covert communication. By exploiting the inherent redundancy and high capacity of video data, this approach enables secure data transmission without raising suspicion. This paper delves into the intricacies of AES-based video steganography, with a particular focus on the integration of the Advanced Encryption Standard (AES) algorithm. The AES algorithm, renowned for its robust encryption capabilities, serves as a cornerstone of this steganographic approach. By encrypting the secret data prior to embedding it within the video frames, an additional layer of security is introduced, safeguarding the confidentiality of the hidden information

Advanced Encryption Standard (AES), which is approved and published by Federal Information Processing Standard (FIPS), is a cryptographic algorithm that can be used to protect electronic data. The AES algorithm can be programmed in software or hardware. This paper presents encryption time comparison of the AES algorithm on FPGA and computer. In the study, Verilog HDL and C programming language is used on the FPGA and computer, respectively. The AES algorithm with 128-bit input and key length 128-bit (AES-128) was simulated on Xilinx ISE Design Suite 13.3. It was observed that, the AES algorithm runs on the FPGA faster than on a computer. We measured the time of encryption on FPGA and computer. Encryption time is 390ns of AES on FPGA and 11 μs of AES on a computer.