Applying Cuckoo Search for analysis of LFSR based cryptosystem

Spraying system

Maximum power point tracking (MPPT) control is one of the essential requirements in harnessing wind power of wind energy conversion systems (WECS). The more precise the maximum power point (MPP) is determined, the more optimal the WECS is operated. Amongst MPPT algorithms, a hill-climb search (HCS) algorithm is preferred because of its simplicity however it also has few drawbacks such as the difficulty of selecting an appropriate step size, the premature convergence phenomenon and the speed-efficiency trade-off. A cuckoo search (CS) algorithm is proposed in this paper for finding out a MPP of a WECS driven by a doubly-fed induction generator (DFIG) under various wind speeds which mostly overcomes the above disadvantages. Then, the DFIG-WECS is controlled to track the MPP. This ensures that the DFIG-WECS is always operated at MPPs regardless of various wind speeds. It is realized that the proposed CS algorithm is also a population-based algorithm inspired from the breeding behavior of cuckoos but it is quite simple, powerful and especially requires less parameters to define optimal solutions than a genetic algorithm (GA) and a particle swarm optimization (PSO) algorithm. Though numerical results, the CS algorithm shows its effectiveness in finding out MPPs in the DFIG-WECS. Furthermore, the obtained results using the CS algorithm are also compared with those using the HCS and PSO algorithms. The comparison demonstrates that the convergence value and speed of the CS algorithm are always better than those of the HCS and PSO algorithms in the MPPT application in the DFIG-WECS.

The cuckoo search (CS) algorithm, which is a new meta-heuristic optimization algorithm, is an efficient approach to solve continuous function optimization problems. Normally, the parameters of the CS are fixed constants. This may result in affecting the algorithm efficiency. To cope with this issue, we properly tune the parameters of the CS and propose an adaptive cuckoo search (ACS) algorithm to enhance the convergence rate and accuracy of the CS. Then, we validate the proposed ACS against test functions and compare its performance with those of particle swarm optimization (PSO), improved cuckoo search algorithm (ICS) and CS by simulation. The simulation results demonstrate that the ACS obtains some solutions better than those obtained by PSO, ICS and CS.

In this paper, a 4-bit Linear Feedback Shift Register (LFSR) is implemented based on a well-designed architecture combining using Pass-Transistor (PT) and Clock Complementary Metal Oxide Semiconductor (C2MOS) logic techniques. The D-flip flop registers and the XOR gates are the main parts of the propose LFSR. Number of transistors along with the speed of LFSR were positively enhanced since the exploited logic design techniques tends to blend the flavor of NMOS and PMOS devices. The PSpice and Field Programmable Gate Array (FPGA) based on Hardware Description Language (HDL) are the two different LFSR implementation environments. It has been observed that LFSR performance was effectively improved in terms of size and speed. Therefore, paper’s main aim refers to decreasing in number of transistors as well as speeding up LFSR circuit. A minimum clock time of 5ns was recorded under clearly correct LFSR output patterns. The LFSR circuit Based CMOS techniques can reduce the exploited transistors up to 43% of the conventional C2MOS logic. Besides, the number of transistors being reduced reflects the achieved circuit’s size reduction. It was concluded that paying attention to the design of the main LFSR circuit parts contributes mainly in the enhancement of the whole circuit performance.

To obtain satisfactory fault coverage for testing a logic circuit, linear feedback shift registers (LFSRs) have been used to generate not only the pseudorandom, but also the deterministic patterns in the scan-based built-in self-test environment. However, like other scan-based methods, the LFSR based pattern generation schemes take a long test application time to feed deterministic patterns from the LFSR into a scan chain. In this paper we derive a general relationship between the bits in the scan chain and the states of the LFSR and show that any bit to be generated by an LFSR in any future clock cycle can be pre-generated by a linear function of the current LFSR state. With this relationship, we can divide a scan chain into multiple sub-chains and use one LFSR-based multiple sequence generator to simultaneously generate all the subsequences required by the sub-chains, hence can greatly reduce the test application time for deterministic patterns. Moreover, due to the scan time reduction, test power wasted during the scan operation can also be significantly reduced.

Many Built-in Self Test (BIST) pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs of patterns for delay faults testing with LFSRs. A new synthesis procedure for a n-size LFSR is given and guarantees that a deterministic set of n precomputed test pairs is embedded in the maximal length pseudo-random test sequence of the LFSR. Sufficient and necessary conditions for the synthesis of this pseudo-deterministic LFSR are provided and show that at-speed delay faults testing becomes a reality without any additional cost for the LFSR. Moreover, since the theoretical properties of LFSRs are preserved, our method could be beneficially used in conjunction with any other technique proposed so far.

The circuit design of the CMOS based analog part of a mixed-signal integrated circuit (IC) needs a large fraction of the overall design cycle time. The automatic design of an analog circuit is inevitable, seeing recently development of System-on-Chip (SOC) design. This brings about the need to develop computer aided design (CAD) tools for automatic design of CMOS based analog circuits. In this article, a Cuckoo Search (CS) algorithm is presented for automatic design of a CMOS Miller Operational Transconductance Amplifier (OTA). The source code of the CS algorithm is developed using the C language. The Ngspice circuit simulator has been used as a fitness function creator and evaluator. A script file is written to provide an interface between the CS algorithm and the Ngspice simulator. BSIM3v3 MOSFET models with 0.18 µm and 0.35 µm CMOS technology have been used to simulate this circuit. The simulation results of this work are presented and compared with previous works reported in the literature. The experimental simulation results obtained by the CS algorithm satisfy all desired specifications for this circuit.

Linear feedback shift register (LFSR) is an important part of sequence cipher. In this paper, we introduce a kind of reconfigurable LFSR design. According to need, it can be configured to be a random LFSR to run over GF (2), GF (2^8) ,GF (2^16)or GF (2^32) in a certain length range. The prototype of the reconfigurable LFSR has been implemented in Altera's EP2S60F1020C5 FPGA and its highest run clock is 100MHZ. It is proved by experiment that the reconfigurable LFSR design uses few hardware resources and its performance is stable.

A cuckoo search algorithm with scale-free population topology

In recent years, radio frequency identification technology has moved into the mainstream applications that help to speed up handling of manufactured goods and materials. RFID tags are divided into two classes: active and passive. Active tag requires a power source that's why its cost is more than passive tags. However, the low-cost RFID tags are facing new challenges to security and privacy. Some solutions utilize expensive cryptographic primitives such as hash or encryption functions, and some lightweight approaches have been reported to be not secure. This paper describes a lightweight Mutual authentication and ownership transfer protocol utilizing minimalistic cryptography using Physically Unclonable Functions (PUF) and Linear Feedback Shift Registers (LFSR). PUFs and LFSRs are very efficient in hardware and particularly suitable for the low-cost RFID tags. To functioning security in low cost RFID tag minimum gate requirement is 2000 gates. To implement security protocols using PUF and LFSR functions need only approx 800 gates. In this paper it is explained how we can authenticate and transfer ownership of low cost RFID tag securely using LFSR and PUF as compared to existing solutions based on hash functions.

Linear feedback shift register (LFSR) is an important component of the cyclic redundancy check (CRC) operations and BCH encoders. The contribution of this paper is two fold. First, this paper presents a mathematical proof of existence of a linear transformation to transform LFSR circuits into equivalent state space formulations. This transformation achieves a full speed-up compared to the serial architecture at the cost of an increase in hardware overhead. This method applies to all generator polynomials used in CRC operations and BCH encoders. Second, a new formulation is proposed to modify the LFSR into the form of an infinite impulse response (IIR) filter. We propose a novel high speed parallel LFSR architecture based on parallel IIR filter design, pipelining and retiming algorithms. The advantage of the proposed approach over the previous architectures is that it has both feedforward and feedback paths. We further propose to apply combined parallel and pipelining techniques to eliminate the fanout effect in long generator polynomials. The proposed scheme can be applied to any generator polynomial, i.e., any LFSR in general. The proposed parallel architecture achieves better area-time product compared to the previous designs.

Four Dimensional (4D) Playfair cipher fused with Linear Feedback Shift Register (LFSR) has the capability of providing confidentiality to any type of data. The main aim of this research is to compare this cipher with the standard ciphers AES-256 and RSA-2048. The comparisons are done on the basis of encryption and decryption times, plain data size versus cipher data size, possible number of keys and types of data supported. It is found from the comparison analysis that the AES-256 is efficient in terms of time, memory and bandwidth consumption when compared to the other two ciphers. For AES-256, data size has to be a multiple of 16 bytes or padded values shouldn’t be a part of original data values in order to be unambiguous while the other two ciphers are always unambiguous. Also, AES-256 is weak against brute force attack when compared to other two ciphers. Among RSA-2048 and 4D Playfair cipher fused with LFSR, latter is highly efficient in terms of time, memory and bandwidth. Therefore, applications wanting to secure all sorts of data efficiently and unambiguously irrespective of data size can use 4D Playfair cipher fused with LFSR. Keywords: Data security; Cryptography; AES; RSA; 4D Playfair cipher

Communication security that depends on chaos can be considered as a new approach which provides protection and security of communications and maintains confidentiality because Chaos theory can be implemented in cryptosystem successfully. A stream cipher, on the other hand, is a type of symmetric cryptosystem in which the plaintext is divided into small entities known as characters. The key in stream cipher is typically generated by a random bit generator. Many key stream generators employ linear feedback shift registers (LFSRs). LFSR systems are made up of a group of LFSR units and a combining function (CF) unit. The plaintext is encrypted one bit at a time. The key is fed into a random bit generator, which produces a long series of binary signals. This "key-stream" k is then combined with plaintext m, typically via a bit-wise XOR (Exclusive-OR modulo 2 addition), to produce the ciphertext stream, which employs the same random bit generator and seed. In this paper we will introduce a new stream cipher keygenerator which using a hybrid between chaotic and combination of Linear Feedback Shift Registers (LFSR's). The proposed generator can be used to protect different types of data files (text, image, audio and video). Many kinds of tests are applied to specifying the goodness of the proposed keygenerator. The results of testing prove the efficiency of the suggested system.

stream ciphers encrypt the data bit by bit. In this research a new model of stream cipher SNOW 2.0 has been proposed i.e. Non linear modified SNOW 2.0 using one Linear Feedback Shift Register (LFSR) with the embedding of non linear function in the model. The analysis of Guess and Determined (GD) attack has been done to check its security with respect to previous versions. The proposed model contains one Linear Feedback Shift Register (LFSR) along with the non linear function which increases the strength of the stream cipher, to make the static nature of modified SNOW 2.0 dynamic. The Experimental analysis show that such a mechanism has been built which provides more security than the previous version of modified SNOW 2.0 in which non linearity was either not introduced or it was introduced using two Linear Feedback Shift Registers (LFSRs). It is concluded that this version is more powerful with respect to the security of plain text against Guess and Determined attack (GD) as compared to the previous versions.

Random number generator (RNG) is a fundamental element in modern cryptography. If the quality of the outputs generated by RNGs is not as well as expected, the cryptographic applications which use the random number service are vulnerable to security threats. In reality, the entropy source of RNGs could be impressible by the changes of environmental factors, resulting in defects in the generated data, such as poor statistical properties. Thus, RNG is generally designed with a preset post-processing module to improve the quality of the output sequences. Linear feedback shift register (LFSR) is one of the frequently used methods for post-processing thanks to the characteristic of simplicity and no reduction in output throughput. However, we point out that even if the statistical properties of the outputs of the entropy source are extremely poor, the sequences processed by LFSR can still pass the statistical test. This undoubtedly increases the security risks in the usage of RNGs. In this work, we propose a distinguisher for the RNGs with LFSR post-processing for the first time. The distinguisher can be used to detect the RNGs with LFSR post processing, and we theoretically prove the sequences before processing can be recovered. On this basis, we design a new statistical test via combining the distinguisher with the Frequency Test in the NIST test suite. The experimental results show that if the sequence is biased before being processed by LFSR, our proposed method can detect it, but the NIST SP 800-22 Test Suite cannot.KeywordsRandom number generatorLFSRPost-processingDistinguisherRandomness test