Compact library of efficient polymorphic gates based on ambipolar transistors

Evolutionary algorithms (EAs) are population-based search algorithms that have been successfully applied to solve hard optimization problems in many application domains. Since the early 1990's researchers have begun to apply evolutionary algorithms to synthesize electronic circuits. Nowadays it is evident that the evolutionary design approach can automatically create efficient electronic circuits in many domains. In this tutorial, fundamental concepts of evolutionary design of digital circuits are presented. In particular, the tutorial deals with Cartesian Genetic Programming (CGP) — a method of genetic programming that in many cases outperforms conventional synthesis tools in terms of achievable circuit size reduction. Innovative designs will be presented in domains of small combinational circuits (where the goal is to minimize the number of gates), middle-size circuits (such as image filters intended for FPGAs where the goal is to obtain the quality of filtering of conventional methods for a significantly lower cost on a chip) and large circuits (such as benchmark circuits for comparison of testability analysis methods), covering thus circuit complexity from a few gates to millions of gates. For example, one of evolved image filters is now protected by utility model in the Czech Republic (patent pending). Evolved circuits will be compared with the best-known conventional designs. We will also show how to deal with the so-called scalability problems of evolutionary design which have been identified as the most important problems from the point of view of practical applications. In summary, tutorial participants will become familiar with the state of the art methods in the area of digital circuit evolution. They will learn how to apply CGP, construct the fitness function and run experiments.

The objective of the paper is to introduce a new approach to the evolutionary design of polymorphic digital circuits conducted directly at transistor level. A discrete event-driven simulator was utilized to achieve reasonable trade-off between performance and precision. The proposed approach was evaluated on a set of polymorphic logic circuits controlled by switching the power rails. It was demonstrated that the proposed method is able to produce valid solutions. A lot of polymorphic gates based on ambipolar transistors were designed, which provide transistor savings compared to existing circuits. A new class of polymorphic gates was discovered thanks to the proposed system - gates based on conventional MOS transistors whose functions are changed by switching the power rails. They seem to have the best parameters among currently known polymorphic gates based on conventional transistors.

The application of pattern recognition techniques to radiology has the potential to detect cancer earlier and save lives, and consequently much research has been devoted to this problem. This worked tackled a subset of the problem, investigating a novel method of classifying mammograms using an evolutionary approach known as Cartesian genetic programming (CGP). Microcalcifications, one of two major indicators of cancer on mammograms, were used for the classification. A large software framework was written in order to investigate this, which allows the viewing of images, manual segmentation of lesions and then automatic classification. Two classification approaches were pursued, the first classifying on texture features and the second, a new approach, classifying by using the lesion's raw pixel array. Early results using the system showed some potential. It was found that during training, networks could obtain correct classification rates of between 80 and 100%. The best results were approaching those in the contemporary literature and suggest the technique warrants further investigation

Graph representations promise several desirable properties for genetic programming (GP); multiple-output programs, natural representations of code reuse and, in many cases, an innate mechanism for neutral drift. Each graph GP technique provides a program representation, genetic operators and overarching evolutionary algorithm. This makes it difficult to identify the individual causes of empirical differences, both between these methods and in comparison to traditional GP. In this work, we empirically study the behaviour of Cartesian genetic programming (CGP), linear genetic programming (LGP), evolving graphs by graph programming and traditional GP. By fixing some aspects of the configurations, we study the performance of each graph GP method and GP in combination with three different EAs: generational, steady-state and (1+lambda ). In general, we find that the best choice of representation, genetic operator and evolutionary algorithm depends on the problem domain. Further, we find that graph GP methods can increase search performance on complex real-world regression problems and, particularly in combination with the (1 + lambda) EA, are significantly better on digital circuit synthesis tasks. We further show that the reuse of intermediate results by tuning LGP’s number of registers and CGP’s levels back parameter is of utmost importance and contributes significantly to better convergence of an optimization algorithm when solving complex problems that benefit from code reuse.

Accurate parasitic consideration in analog/RF circuit synthesis becomes more essential since layout-dependent effects become more influential in the advanced technologies. In this paper, a g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> -based circuit sizing method, which takes into account both device intrinsic parasitics and interconnect parasitics, is proposed as the first stage of a hybrid sizing optimization. In the second stage, a many-objective evolutionary algorithm is applied to refine the sizing solutions. The proposed methodology has been utilized to optimize multiple performances of an analog dynamic differential comparator and a RF circuit in the advanced CMOS technology. The experimental results have exhibited high efficacy of our proposed parasitic-aware hybrid sizing methodology.

The emission characteristics and external quantum efficiencies of ambipolar polymer light-emitting field-effect transistors are investigated as a function of applied voltage, current density, and ratio of hole to electron mobility. Green-emitting poly(9,9-di-n-octylfluorene-alt-benzothiadiazole) (F8BT) with balanced electron and hole mobilities and red-emitting poly((9,9-dioctylfluorene)-2,7- diyl-alt-[4,7-bis(3-hexylthien-5-yl)-2,1,3-benzothiadiazole]-2′,2″-diyl) (F8TBT) with strongly unbalanced hole and electron mobilities as semiconducting and emissive polymers are compared. The current-voltage and light output characteristics of the two types of light-emitting transistors were found to be fundamentally alike independent of mobility ratio. Device modeling allowing for a single (Langevin-type) charge recombination mechanism was able to reproduce the device characteristics for both cases but could not replicate the experimentally observed dependence of external quantum efficiency on current density. The increase of quantum efficiency with current density up to a saturation value could be indicative of a trap-assisted nonradiative decay mechanism at the semiconductor-dielectric interface. Optical output modeling confirmed that the maximum external quantum efficiency of F8BT light-emitting transistors of 0.8% is consistent with complete recombination of all charges and a singlet exciton fraction of 25%.

We extend ambipolar silicon nanowire transistors by using three independent gates and show an efficient approach to implement dual-threshold-voltage configurable circuits. Polarity and threshold voltage of uncommitted devices are determined by applying different bias patterns to the three gates. Uncommitted logic gates can thus be configured to implement different logic functions for dual-threshold-voltage design using a wiring scheme, to target either high-performance or low-leakage applications. Synthesis of benchmark circuits with these devices shows comparable performance and 54% reduction of leakage power consumption compared to low-standby-power FinFET technology.

Optical circuits received significant interest as a promising alternative to existing electronic systems. Because of this, also the synthesis of optical circuits receives increasing attention. However, initial solutions for the synthesis of optical circuits either rely on manual design or rather straight-forward mappings from established data-structures such as BDDs, SoPs/ESoPs, etc. to the corresponding optical netlist. These approaches hardly utilize the full potential of the gate libraries available in this domain. In this paper, we propose an alternative synthesis solution based on AND-Inverter Graphs (AIGs) which is capable of utilizing this potential. That is, a scheme is presented which dedicatedly maps the given function representation to the desired circuit in a one-to-one fashion - yielding significantly smaller circuit sizes. Experimental evaluations confirm that the proposed solution generates optical circuits with up to 97% less number of gates as compared to existing synthesis approaches.

In this paper, an evolutionary approach is proposed to obtain a discrete-time state-space interval model for uncertain continuous-time systems having interval uncertainties. Based on a worst-case analysis, the problem to derive the discrete interval model is first formulated as multiple mono-objective optimization problems for matrix-value functions associated with the discrete system matrices, and subsequently optimized via a proposed genetic algorithm (GA) to obtain the lower and upper bounds of the entries in the system matrices. To show the effectiveness of the proposed approach, roots clustering of the characteristic equation of the obtained discrete interval model is illustrated for comparison with those obtained via existing methods.

The paper initially deals, with the design procedure of precise loss - simulation model of SiC power transistor in PLECS simulation software. Because SiC technology is currently spreading within most of the power converter applications, many manufactures are adapting their products to this technology. There are various power components differing by packaging technology, or given design approach, thus power transistors are exhibiting invariant performance when comparing individual components. However, the efficiency performance of any power semiconductor system is currently main qualitative indicator due to several reasons. Therefore, optimal selection of power transistor components represents essential design issue within initial design stages of power converter. Evaluation of the accuracy of PLECS loss-model compared to the results of mathematical calculations recommended for analyzed converter topology (NPC converter) is given here. Consequently, suitable SiC transistor structures are compared, while evaluation of the NPC converter efficiency was the main criterion for proper transistor selection guideline.

Development and Research of Algorithms for the Synthesis of Combinational Logic Circuits Based on the Evolutionary Approach

This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error detection (CED) based on such circuits is described in this paper. CED based on approximate logic circuits does not impose any performance penalty on the original design. The proposed synthesis algorithm for approximate logic circuits scales with circuit size, and provides fine-grained trade-offs between area-power overhead and CED coverage.

Despite rapid progress in the field, it is still challenging to discover new ways to leverage quantum computation: all quantum algorithms must be designed by hand, and quantum mechanics is notoriously counterintuitive. In this paper, we study how artificial intelligence, in the form of program synthesis, may help overcome some of these difficulties, by showing how a computer can incrementally learn concepts relevant to quantum circuit synthesis with experience, and reuse them in unseen tasks. In particular, we focus on the decomposition of unitary matrices into quantum circuits, and show how, starting from a set of elementary gates, we can automatically discover a library of useful new composite gates and use them to decompose increasingly complicated unitaries.

Results are presented on the application of previously developed simplified microcircuit modeling techniques to the analysis of an existing military subsystem in order to identify problem areas and demonstrate the state of the art. The D/A converter subsystem studied is part of the flight instrumentation used in the E4A (military version of 747) aircraft. It contains both digital and analog microcircuits, monolithic and hybrid, as well as discrete bipolar transistors and passive elements. The overall problem approach was that of an engineering vulnerability analysis on the subsystem. The individual components were experimentally characterized and modeled, and the component models were then interconnected to obtain a simulation of the entire D/A converter using an expanded version of the MINI-SCEPTRE computer code. Comparison of computer predictions and experimental data demonstrates reasonably good agreement to within the repeatability of component samples. The major problem is the long computer run time and associated cost for a single photoresponse prediction.

Nature has remedies for almost all problems. Though biological systems exhibits organised, complex and intelligent behaviour, they comprise of simple elements and governed by simple rules. Hence, mimicking such systems has been the attraction of researchers in the fields of computer science, neuroscience and biology for a long time. Generating complex behaviour from small agents working locally following simple rules is a highly cost-effective solution of the real life problem. Bio-inspired computing can be achieved through different models such as stochastic, ad hoc or discrete models; new paradigm inspired from nature like evolutionary approach and immune systems; and new platform, novel architecture and specially designed material such as artificial fuel cell. The consortium of bio-inspired computing are artificial neural networks, evolutionary algorithms, swarm intelligence, artificial immune systems, fractal geometry, artificial life, DNA computing and quantum computing, etc. This article discusses consortium of bio-inspired computing along with applications and research scope. In spite of having advantages offered by partial simulation of natural intelligence, there are some limitations of the bio-inspired computing that need to be addressed. These challenges include creation of new model, techniques and platforms for bio-inspired computing. This article concludes with the challenges to be explored in the field.