Cost/performance of a parallel computer simulator

Fine-Grained Parallel and Distributed Spatial Stochastic Simulation of Biological Reactions

Parallelism can significantly reduce the execution time of a simulation program. However, language support is needed to handle the complexities involved so that the underlying parallel mechanisms become transparent to the users. This paper presents a simulation environment called SIMA which addresses such issues. SIMA is an experimental environment for parallel discrete-event simulation in which a simulation model can be specified by the provided primitives and be executed on a shared memory multiprocessor. The parallel mechanisms of SIMA are totally transparent to users. This property makes usage of SIMA very convenient. Users can have the benefit of faster execution on a parallel computer without requiring knowledge about parallel processing. The base language is C and the interfaces are library routines and input arguments. The interfaces facilitate both parallel and sequential simulation. Several experiments indicate that SIMA has a satisfactory performance. Speedups of over 10 for many cases have been achieved using 15 processors. >

Parallelism can significantly reduce the execution time of a simulation program. However, language support is needed to handle the complexities involved so that the underlying parallel mechanisms become transparent to the users. This paper presents a simulation environment called SIMA which addresses such issues. SIMA is an experimental environment for parallel discrete-event simulation in which a simulation model can be specified by the provided primitives and be executed on a shared memory multiprocessor. The parallel mechanisms of SIMA are totally transparent to users. This property makes usage of SIMA very convenient. Users can have the benefit of faster execution on a parallel computer without requiring knowledge about parallel processing. The base language is C and the interfaces are library routines and input arguments. The interfaces facilitate both parallel and sequential simulation. Several experiments indicate that SIMA has a satisfactory performance. Speedups of over 10 for many cases have been achieved using 15 processors. >

The optimal level of performance from parallel discrete-event simulation depends on the circuit being simulated, the vectors being simulated, and the machine on which the simulation is being performed. Empirical studies based on very simple models suggest that the amount of parallelism available in typical circuits is very small. A model of optimal performance for a machine with an infinite number of processors having uniform memory accesses is presented. It demonstrates that some circuits have significantly more parallelism than previously believed. The model is refined to define the optimal load partitioning for a machine with a finite number of processors with uniform access and extended to define the optimal static data partitioning. A metric is obtained which can be used to benchmark different models of parallel simulation. The effectiveness of these models in detecting performance problems of the version of RSIM running on the BBN Butterfly is shown.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Parallel simulation has the potential to accelerate the execution of simulation applications. However developing a parallel discrete-event simulation from scratch requires an in-depth knowledge of the mapping process from the physical model to the simulation model, and a substantial effort in optimising performance. This paper presents an overview of the SPaDES (Structured Parallel Discrete-Event Simulation) parallel simulation framework. We focus on the performance analysis of SPaDES/C++, an implementation of SPaDES on a distributed-memory Fujitsu AP3000 parallel computer. SPaDES/C++ hides the underlying complex parallel simulation synchronization and parallel programming details from the simulationist. Our empirical results show that the SPaDES framework can deliver good speedup if the process granularity is properly optimised.

The event horizon is a very important concept that applies to both parallel and sequential discrete-event simulations. By exploiting the event horizon, parallel simulations can processes events optimistically in a risk-free manner (i.e., without requiring antimessages) using adaptable breathing time cycles with variable time widths. Additionally, exploiting the event horizon can significantly reduce the overhead of event list management that is common to virtually all discrete-event simulations. This paper is a continuation of work previously reported at PADS94. In that report, a complete mathematical formulation of the event horizon was derived under equilibrium conditions using the hold model. Various forms of the beta density function were consequently used to verify the predicted results of the analytic model. This second report describes how the concept of the event horizon can also be applied to event list management. By exploiting the event horizon, the performance of several priority queue data structures are improved including: linked lists, various binary trees, and heaps. A somewhat detailed description of these modified data structures along with other relevant background information is provided for completeness. Performance results for each of these priority queue data structure is provided.

An implementation of a conservative parallel simulator with deadlock avoidance is presented. Its performance when working with a realistic model of a message routing network is evaluated and contrasted against a sequential simulator. Different factors that improve the performance of the parallel simulation are discussed, focusing in the model under study and the available computer: a network of transputers. These factors are the load of the model being simulated, the grain size of the simulator and the simulator ability to exploit the lookahead property of the model. >

Solution of PDEs-electrically coupled systems with electrical analogy

This paper discusses the development of a parallel SPICE circuit simulator using the direct method on a cloud-based heterogeneous cluster, which includes multiple HPC compute nodes with multi-sockets, multicores, and GPUs. A simple model is derived to optimally partition the circuit between the compute nodes. The parallel simulator is divided into four major kernels: Partition Device Model Evaluation (PME), Partition Matrix Factorization (PMF), Interconnection Matrix Evaluation (IME), and Interconnection Matrix Factorization (IMF). Another model is derived to assign each of the kernels to the most suitable execution platform of the Amazon EC2 heterogeneous cloud. The partitioning approach using heterogeneous resources has achieved an order-of-magnitude speedup over optimized multithreaded implementations of SPICE using state of the art KLU and NICSLU packages for matrix solution.

The increased computational performance in science and engineering has led to the strong need for arithmetic intensive parallel computing, CUDA (Compute Unified Device Architecture) and OpenCL (Open Computing Language) are parallel computing technologies proposed in recent years, which both have a great expanse of application prospect in the field of high performance computing. In this paper, we discuss the parallel computing technologies based on CUDA and OpenCL by applying them on the smoking simulation based on real-time physics. Real-time physics requires high real-time quality and authenticity. We build the 3D smoking simulation model using the Computational Fluid Dynamics method and render the smoke using 3D texture volume rendering method to represent the 3D smoking simulation veridical and accurately. In order to ensure the real-time quality of 3D smoking simulation, we respectively adopt CUDA and OpenCL parallel computing technologies applied on different hardware platforms, achieving the solving of 3D smoking simulation in parallel. Experimental results show that compared with CPU serial programming, CUDA and OpenCL parallel computing technologies have predominant operability and inevitable efficiency advantages on arithmetic intensive parallel computing.

Exploring the Role of Domain Partitioning on Efficiency of Parallel Distributed Hydrologic Model Simulations Spatially distributed hydrologic models of watersheds and river basins are data and computation intensive because of the combined nature of hydrodynamics, complex forcings and heterogeneous parameter fields. Application of these models at fine temporal and spatial resolutions, and on large problem domains, is facilitated by parallel computation on multi-processor clusters. Notably, the computation efficiency of parallel simulations is crucially determined by the efficiency with which data are divided-and-distributed in a multiprocessor environment and how the information is shared between processors. While numerous data partitioning algorithms exist and have been extensively studied in computer science literature, detailed elucidation of the role of hydrologic model structure on data partitioning has not been presented yet. In addition, the relative role of computational load balance and interprocessor communication on parallel computation efficiency of a hydrologic model is not known. Considering the unstructured domain discretization scheme used in PIHM hydrologic model as an example, the paper first presents a generic methodology for incorporating hydrologic factors in optimal domain partitioning algorithms. The partitions are then used to explore the isolated role of computation load balance and interprocessor communication on parallel efficiency. Results confirm that parallel simulations on partitions that minimize interprocessor communication and divide the computational load equally are the most efficient. More importantly, load balance between processors is observed to be a more sensitive control on parallel efficiency than minimization of interprocessor communication. Further analyses of the efficiency and scalability of the parallel code for different partitioning configurations reveal a direct correspondence between parallel efficiency and theoretical metrics such as load balance ratio and communication to computation ratio. Results indicate that theoretical metrics can be used for the selection of best partitions before computationally intensive parallel simulations are performed. The study serves as a proof-of-concept evaluation of the impact of computation and communication on the efficiency of parallelized distributed hydrologic models at multiple resolutions.

Architectural simulation is time-consuming, and the trend towards hundreds of cores is making sequential simulation even slower. Existing parallel simulation techniques either scale poorly due to excessive synchronization, or sacrifice accuracy by allowing event reordering and using simplistic contention models. As a result, most researchers use sequential simulators and model small-scale systems with 16-32 cores. With 100-core chips already available, developing simulators that scale to thousands of cores is crucial. We present three novel techniques that, together, make thousand-core simulation practical. First, we speed up detailed core models (including OOO cores) with instruction-driven timing models that leverage dynamic binary translation. Second, we introduce bound-weave, a two-phase parallelization technique that scales parallel simulation on multicore hosts efficiently with minimal loss of accuracy. Third, we implement lightweight user-level virtualization to support complex workloads, including multiprogrammed, client-server, and managed-runtime applications, without the need for full-system simulation, sidestepping the lack of scalable OSs and ISAs that support thousands of cores. We use these techniques to build zsim, a fast, scalable, and accurate simulator. On a 16-core host, zsim models a 1024-core chip at speeds of up to 1,500 MIPS using simple cores and up to 300 MIPS using detailed OOO cores, 2-3 orders of magnitude faster than existing parallel simulators. Simulator performance scales well with both the number of modeled cores and the number of host cores. We validate zsim against a real Westmere system on a wide variety of workloads, and find performance and microarchitectural events to be within a narrow range of the real system.

The simulation of parallel computers is discussed. In particular, a technique, called cross-profiling, that can be used to improve the efficiency of these simulations substantially is presented and evaluated. Cross-profiling, along with another simulation technique called execution-driven simulation, can be used to simulate one processor's instruction set (the target processor) with another processor that has a different instruction set (the host processor). Moreover, this technique is significantly faster than the usual method where several host instructions are executed to emulate the effect of executing a single instruction of the target processor. The cross-profiling technique is introduced, and it is shown how it can be combined with execution-driven simulation. The results of several experiments that demonstrate that the error introduced by cross-profiling is typically less than 1% are presented. >

A parallel computational framework to solve flow and transport in integrated surface–subsurface hydrologic systems

A parallel circuit simulator, iPRIDE, which uses a direct solution method and runs on a shared-memory multiprocessor is described. The simulator is based on a multilevel node tearing approach which produces a nested bordered-block-diagonal (BBD) form of the circuit equation matrix. The parallel solution of the nested BBD matrix is described. Its efficiency is shown to depend on how the circuit is partitioned as well as the sequence in which the concurrent tasks (scheduling) are solved. A partitioning heuristic is proposed, assuming that an arbitrary number of processors is available. Scheduling methods are studied when the number of processors is fixed. A method for determining the optimal level of partitioning, which depends on the number of processors as well as the scheduling methods, is described. The program is implemented on an ALLIANT FX/8 multiprocessor with shared memory. The performance of the program is reported. >