Current Ripple Characterization in DCM Interleaved Power Converters Under Inductance Mismatch

To balance the cost and volume when applying a low output current ripple, the power supply design should be able to eliminate the current ripple under any duty cycle in medium and high switching frequencies, and considerably reduce filter volume to improve power density. A stacked buck converter was eventually selected after reviewing the existing solutions and discussing their advantages and disadvantages. A stacked buck converter is used as a basis to propose the transient response and output current ripple elimination effect, boundary limit control method, and low output ripple dead time modulation method to make individual improvements. The principle, mathematical derivation, small-signal model, and compensator design method of the improvement method are presented in detail. Moreover, simulation results are used to mutually verify the correctness and effectiveness of the improvement method. A stacked buck converter with 330-V input, 50-V output, and 1-kW output power was implemented to verify the effect of the low output current ripple dead time modulation. Experimental results showed that the peak-to-peak value of the output current ripple was reduced from 2.09 A to 559 mA, and the RMS value was reduced from 551 mA to 91 mA, thereby effectively improving the output current ripple.

Analysis and minimization of input current and voltage ripples of five-phase PWM inverters are presented in this paper. The analytical expressions for the RMS value of input current and voltage ripples as a function of the PWM reference signal are derived. Different to three-phase PWM inverters, it is shown that pure sinusoidal is the optimum reference signal that produces minimum input voltage ripple. Input current ripple does not depend on the employed reference signal so the ripple canpsilat be minimized by changing reference signal. Simulation and experimental results verify the analysis.

In this article, a novel high-power-factor electrolytic-capacitorless light-emitting diode (LED) driver based on the use of a ripple port is presented. The ripple port consists of adding an extra power processing circuit at the output of the converter that injects energy to compensate for the output current and voltage ripples. In this work, the main converter is built by using a flyback converter operating in the discontinuous conduction mode (DCM). The ripple port is implemented by adding an extra winding to the flyback coupled inductors, together with an extra switch, a capacitor, and an inductor. The additional switch is used to inject energy to the output in the time intervals, in which the flyback output current is low, thus reducing the output current ripple. The proposed converter is analyzed in detail, and a design methodology is proposed. A design example for a 27-V/1-A LED lamp is presented. Simulation and laboratory experiments have also been carried out. It is demonstrated that the proposed solution can achieve a reduction on the output current ripple of around 65% compared to the solution without ripple port for the same total capacitance and maintain a high power factor of 0.994.

The Weinberg converter is a suitable choice for the battery discharge regulator of a geostationary satellite due to its high efficiency, continuous input and output current, and soft switching of switches and diodes. Nevertheless, this converter has high output current ripple during the commutation period of its output diodes. Therefore, the output RMS current and output voltage ripple are high, which may directly affect the lifetime and total capacitance of bus capacitors and hence, the lifetime and volume of the geostationary satellite. Thus, reducing the output current ripple is important to the design of the geostationary satellite. An improved Weinberg converter with an additional inductor and capacitor is proposed in this paper to reduce the output current and voltage ripple. It features soft switching of all switches, no reverse recovery problems of the diodes, and reduced magnetizing offset current in the coupled inductor. The proposed converter is verified with experimental results from a 750W, 100kHz, 36-50Vdc prototype.

This paper analyzes a coupled inductor based $LL$ – $LC$ network as a building block to achieve input or output current ripple cancellation in power converters. The proposed current ripple cancellation technique works on the principle of inductance matching. It also provides reduced current stress on the switching devices of the converter compared with the other current ripple cancellation networks discussed in the literature. The current ripple cancellation technique is verified in achieving input and output current ripple minimization in different converters. The effect of inductance mismatch, inductor and capacitor tolerances, and circuit parasitic is also studied. Some of the published research works are demonstrated to be a special case of the proposed idea. The effectiveness of the proposed method is validated by demonstrating the zero-ripple input current using a 31 V dc to 60 V dc, 240 W boost converter prototype and a 31 V dc to 115 V (rms) ac, 320 W current-fed-switched inverter prototype, and the zero-ripple output current using a 62 V to 42 V dc, 450 W buck converter prototype.

A ripple current cancellation technique injects AC current into the output voltage bus of a converter that is equal and opposite to the normal converter ripple current. The output current ripple is ideally zero, leading to ultra-low noise converter output voltages. The circuit requires few additional components, no active circuits are required. Only an additional filter inductor winding, an auxiliary inductor, and small capacitor are required. The circuit utilizes leakage inductance of the modified filter inductor as all or part of the required auxiliary inductance. Ripple cancellation is independent of switching frequency, duty cycle, and other converter parameters. The circuit eliminates ripple current in both continuous conduction mode and discontinuous conduction mode. Experimental results provide better than an 80/spl times/ ripple current reduction.

This paper presents a current ripple analysis of new double-stator AC drive system. At first, a new double-stator AC drive system is proposed. The aim is to combine the benefits both the multilevel and multiphase system to provide the better performance to drive AC motor. The input and output current ripples of the proposed AC drive system are then analyzed. The current ripples of the proposed AC drive system are then compared to the ones of conventional double-stator AC drive system. Under the same DC input voltage, it is shown that the proposed results in less output current ripple. Under the same output voltage, the proposed AC drive system results in smaller input current and, therefore, fewer losses on the DC power supply. Experimental results are included to show the validity of the proposed concept.

Three-level inverter has been widely used in electric drives and renewable power generation system. However, the common mode voltage (CMV) and output current ripple reduction of three-level inverter should be carefully regulated for the appropriate operation. As these two targets are mutually interrelated, the conventional space vector modulation (SVM) scheme cannot cope with them decently. To overcome this drawback, this paper proposes a novel modified SVM scheme to realize CMV and current ripple reduction simultaneously. The generating mechanism of output current ripple is analyzed, and the relationship between current ripple and utilized vectors is quantitatively described. Based on the analyses, the proposed optimal current ripple and CMV reduction pulse width modulation (OCR-CMVRPWM) method adopts four voltage vectors (large, medium, small and zero vectors) to reduce root mean square (RMS) value of current ripple by allocating the sequence and dwell times of utilized vectors. Compared to the existing PWM methods, the proposed OCR-CMVRPWM scheme can reduce the peak of CMV to half of value using the conventional SVM, and obtain a significant reduction of output current total harmonic distortion (THD). The effectiveness of the proposed method is validated by both simulation and experimental results.

This paper presents an analysis of input and output ripples of PWM AC choppers. Expressions of input and output current and voltage ripples of single-phase PWM AC choppers are first derived. The derived expressions are then extended to three-phase PWM AC choppers. As input current and output voltage ripples specification alone cannot be used to determine the unique values of inductance and capacitance of the LC filters, an additional criterion based on the minimum reactive power is proposed. Experimental results are included in this paper to show the validity of the proposed analysis method.

Input ripple analysis of five-phase pulse width modulated (PWM) inverters is presented. The analytical expressions for the rms value of the input current and voltage ripples as a function of the PWM reference signal are derived. Similar to three-phase PWM inverters, the input current ripple does not depend on the employed reference signal, so the ripple cannot be minimised by changing the shape of reference signal. On the other hand, different from three-phase PWM inverters, it is shown that a pure sinusoidal signal is the optimum reference signal that produces a minimum input voltage ripple in five-phase PWM inverters. Input voltage ripples under several modulation techniques are compared. Experimental results are included to verify the proposed analysis method.

The interleaving technique is required for LLC resonant converters to achieve high power levels, handle higher input/output currents, and reduce output current ripple. However, the high system efficiency and the low output current ripple for the multi-phase LLC resonant converter cannot be achieved at the same time at low and medium power levels. Most methods try to keep the multi-phase LLC resonant converter in load-sharing mode regardless of the power level, which will result in low system efficiency at low and medium power levels. In this paper, an output current ripple and efficiency optimal control method with finite load distribution schemes is proposed for the multi-phase LLC resonant converter to balance the efficiency and output current ripple. The optimal control method improves the efficiency as much as possible while keeping output current ripple low. According to the calculation of output current ripple and efficiency, the optimal load distribution scheme is selected. The pulse-frequency modulation (PFM) and phase-shift modulation (PSM) hybrid control is applied to regulate the load of each phase. An analysis is provided, and a 540-W three-phase interleaved LLC resonant converter is built to verify the superiority.

This paper proposes a hybrid filter structure consisting of a passive power filter and a DC active power filter (DCAPF) applied in high current, high precision and low ripple accelerator power supplies. The configuration of the power system with the DCAPF is firstly introduced. Then four control schemes to obtain the reference signal for the DCAPF control circuit is presented. For each method, the basic operation principle of eliminating output voltage and current ripples is analyzed in detail. Furthermore, the compensation characteristics of each method is discussed and compared. To verify the proposed circuit configuration and the control methods, the testing results of the practical field operation of the DCAPF with a 120kW accelerator power supply is introduced. By adopting the control method of detecting the load ripple voltage, the output current ripple factor and tracking accuracy of the accelerator power supply achieve 8.87/spl times/10/sup -6/ (peak-to-peak) and 1/spl times/10/sup -4/ respectively, which is very satisfactory for this kind of power supplies. The dynamic response of the accelerator power supply is also greatly improved through the application of the DCAPF.

The paper presents an analysis on the output current ripple in zero common-mode voltage (ZCMV) PWM control of multilevel inverters. The modulation strategy for common-mode voltage (CMV) elimination in multilevel inverters is based on the “three zero common-mode vectors” principle. The space vector diagram, which consists of vectors of ZCMV, is fully explored by properly depicting the base voltage vectors and their corresponding active switching vectors. The switching patterns are limited to those of three switching states each of which is symmetrically distributed. Based on the PWM process simplified to that of a two-level inverter with three allowable switching states and the degree of freedom existing in the switching states arrangement, a novel carrier-based pulsewidth-modulated (PWM) method with optimized output current ripple is proposed. Compared to the existing PWM methods which utilize the same kind of switching patterns, the proposed PWM method has reduced considerably the rms current ripple and total harmonic distortion (THD) of the output current in a wide region of the modulation index. The effectiveness of the proposed method is validated by both simulation and experimental results.

This paper discusses applying various switching strategies such as conventional complementary and proportional methods on a specific converter. This converter was recently presented and it can provide high voltage gain and has current ripple cancelation ability at a preselected duty-cycle. The input current ripple is zero when the converter works at a special duty-cycle. But load disturbance leads to output voltage changes that maybe cause the duty-cycle to deviate from its preselected value. In this situation, the input current ripple cannot be completely canceled. The proposed proportional strategy is an optimized method for minimizing input current ripple at other operating duty-cycles and also it provides a voltage gain lower than conventional complementary strategy. Here, the converter's performance is analyzed under two switching strategies and the effect of various strategies has been investigated on converter parameters including output voltage and input current ripple. These considerations are verified by implementing a 100-W prototype of the proposed converter in laboratory.

Switched-mode dc-dc converters are used to regulate dc voltages or currents at a certain desired level. Due to inherent switching action, currents and voltages in the circuit tend to oscillate around a given average value, as the output values present some ripple in steady-state condition. The low-frequency output current ripple (OCR) is a key parameter for design considerations when a light-emitting diode (LED) string load is considered. In order to compare their ripple magnitudes under distinct conditions regarding a buck-based LED driver operating in continuous conduction mode (CCM), this paper analyzes the conventional voltage mode control as well as the peak-current mode control in order to compare its OCR responses by the classical control theory. The methods are implemented considering the same control bandwidth so that a proper comparison can be established.