Cyclic Boolean circuits

The accepted wisdom is that combinational circuits must have acyclic (i.e., loop-free or feed-forward) topologies. And yet simple examples suggest that this need not be so. In previous work, we advocated the design of cyclic combinational circuits (i.e., circuits with loops or feedback paths). We proposed a synthesis methodology and demonstrated that it produces significant improvements in area and in delay. The analysis method that we used to validate cyclic circuits was based on binary decision diagrams. In this paper, we propose a much more efficient technique for analysis based on Boolean satisfiability (SAT).

Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and do not hold state are the smallest or most natural representations. Cyclic combinational circuits have well-defined functional behavior yet wreak havoc with most logic synthesis and timing tools, which require combinational logic to be acyclic. As such, some sort of cycle-removal step is necessary to handle these circuits with existing tools. We present a two-stage algorithm for transforming a combinational cyclic circuit into an equivalent acyclic circuit. The first part quickly and exactly characterizes all combinational behavior of a cyclic circuit. It starts by applying input patterns to each input and examining the boundary between gates whose outputs are and are not defined to find additional input patterns that make the circuit behave combinationally. It produces sets of assignments to inputs that together cover all combinational behavior. This can be used to report errors, as an optimization aid, or to restructure the circuit into an acyclic equivalent. The second stage of our algorithm does this restructuring by creating an acyclic circuit fragment from each of these assignments and assembles these fragments into an acyclic circuit that reproduces all the combinational behavior of the original cyclic circuit. Experiments show that our algorithm runs in seconds on real-life cyclic circuits, making it useful in practice.

Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, the resulting design performs slower than when the communication rate is matched. This can be remedied by inserting pipeline buffers (to temporarily hold data), allowing the producer to proceed if the consumer is not ready to accept data. The problem of deciding which channels need these buffers (and how many) for an arbitrary communication profile is called the slack matching problem; the optimal solution to this problem has been shown to be NP-complete. In this paper, we present a heuristic that uses knowledge of the communication protocol to explicitly model these bottlenecks, and an iterative algorithm to progressively remove these bottlenecks by inserting buffers. We apply this algorithm to asynchronous circuits, and show that it naturally handles large designs with arbitrarily cyclic and acyclic topologies, which exhibit various types of control choice. The heuristic is efficient, achieving linear time complexity in practice, and produces solutions that (a) achieve up to 60% performance speedup on large media processing kernels, and (b) can either be verified to be optimal, or the approximation margin can be bounded

Non-cancellative Boolean circuits: A generalization of monotone boolean circuits

In several previous works the construction of a computationally hard function with respect to a certain class of algorithms or Boolean circuits has been used to derive small pseudo-random spaces. In this paper, we revert this connection by presenting two new direct relations between the efficient construction of pseudo-random (both two-sided and one-sided) sets for Boolean affine spaces and the explicit construction of Boolean functions having hard branching program complexityIn the case of 1-read branching programs (1-Br.Pr.), we show that the construction of non trivial (i.e. of cardinality 2o(n)) discrepancy sets (i.e. two-sided pseudo-random sets) for Boolean affine spaces of dimension greater than n/2 yield a set of explicit Boolean functions having very hard 1-Br.Pr. size. By combining the best known construction of ∈-biased sample spaces for linear tests and a simple “Reduction” Lemma, we derive the required discrepancy set and obtain a Boolean function in P having 1-Br.Pr. size not smaller than \(2^{n - O\left( {log^2 n} \right)} \) and a Boolean function in DTIME\(\left( {2^{O\left( {log^2 n} \right)} } \right)\) having 1-Br.Pr. size not smaller than 2n-O(log n). The latter bound is optimal and both of them are exponential improvements over the best previously known lower bound that was \(2^{n - 3n^{1/2} } \)[21].As for non deterministic syntactic k-read branching programs (k-Br.Pr.), we introduce a new method to derive explicit, exponential lower bounds that involves the construction of hitting sets (one-sided pseudo-random sets) for affine spaces of dimension o(n=2). Using an appropriate “orthogonal” representation of small Boolean affine spaces, we efficiently construct these hitting sets thus obtaining an explicit Boolean function in P that has k-Br.Pr. size not smaller than \(2^{n^{1 - o\left( 1 \right)} } \) for any \(k = o\left( {\frac{{\log n}}{{\log \log n}}} \right)\). This improves over the previous best known lower bounds given in [8,11,17] for some range of k

Directed acyclic graphs (DAGs) are useful for modeling of quantum-dot cellular automata (QCA)-based digital circuits. In this paper, DAGs are used to design the single-layer architecture of QCA circuits. A context-free grammar is proposed to check whether a majority gate-based Boolean expression is syntactically correct or not. Whether a given sentence satisfies the grammar can be tested using the corresponding parse tree. Language-independent (three-address) code can then be constructed from the parse tree to draw a DAG and thereby design the QCA circuit corresponding to a given Boolean expression. The clock zones are partitioned according to each level of the DAG. The abstract architecture developed from the DAG is simulated using the QCADesigner tool.

Lower bounds on the area complexity of Boolean circuits

A new class of switch-level logic circuits intended for modeling digital MOS VLSI circuits is presented. These circuits, which are called pseudo-Boolean, are composed of a single (voltage) source, connectors, switches, attenuators, and wells. The latter two devices are digital versions of resistors and capacitors, respectively, and may assume an arbitrary but finite number of different sizes. Signals are bidirectional, and are assigned a finite set of values of the form (v, s) where v corresponds to voltage level and s corresponds to electrical current or charge level (logical strength). It is shown that these signal values and the associated logical operations form a generalization of Boolean algebra called pseudo-Boolean or Heyting algebra. The analysis of pseudo- Boolean circuits using discrete counterparts of Kirchoff's current law and the superposition principle is discussed, as well as the application of pseudo-Boolean techniques to digital simulation.

In this paper, a hierarchical ensemble classification approach that utilizes a Directed Acyclic Graph (DAG) structure is proposed as a solution to the multi-class classification problem. Two main DAG structures are considered: (i) rooted DAG, and (ii) non-rooted DAG. The main challenges that are considered in this paper are: (i) the successive misclassification issue associated with hierarchical classification, and (i) identification of the starting node within the non-rooted DAG approach. To address these issues the idea is to utilize Bayesian probability values to: select the best starting DAG node, and to dictate whether single or multiple paths should be followed within the DAG structure. The reported experimental results indicated that the proposed DAG structure is more effective than when using a simple binary tree structure for generating a hierarchical classification model.

BackgroundDirected acyclic graphs (DAGs) are an effective means of presenting expert-knowledge assumptions when selecting adjustment variables in epidemiology, whereas the change-in-estimate procedure is a common statistics-based approach. As DAGs imply specific empirical relationships which can be explored by the change-in-estimate procedure, it should be possible to combine the two approaches. This paper proposes such an approach which aims to produce well-adjusted estimates for a given research question, based on plausible DAGs consistent with the data at hand, combining prior knowledge and standard regression methods.MethodsBased on the relationships laid out in a DAG, researchers can predict how a collapsible estimator (e.g. risk ratio or risk difference) for an effect of interest should change when adjusted on different variable sets. Implied and observed patterns can then be compared to detect inconsistencies and so guide adjustment-variable selection.ResultsThe proposed approach involves i. drawing up a set of plausible background-knowledge DAGs; ii. starting with one of these DAGs as a working DAG, identifying a minimal variable set, S, sufficient to control for bias on the effect of interest; iii. estimating a collapsible estimator adjusted on S, then adjusted on S plus each variable not in S in turn (“add-one pattern”) and then adjusted on the variables in S minus each of these variables in turn (“minus-one pattern”); iv. checking the observed add-one and minus-one patterns against the pattern implied by the working DAG and the other prior DAGs; v. reviewing the DAGs, if needed; and vi. presenting the initial and all final DAGs with estimates.ConclusionThis approach to adjustment-variable selection combines background-knowledge and statistics-based approaches using methods already common in epidemiology and communicates assumptions and uncertainties in a standardized graphical format. It is probably best suited to areas where there is considerable background knowledge about plausible variable relationships. Researchers may use this approach as an additional tool for selecting adjustment variables when analyzing epidemiological data.

Due to the non- intuitive nature of Quantum algorithms, it becomes difficult for a classically trained person to efficiently construct new ones. So rather than designing new algorithms manually, lately, Genetic algorithms (GA) are being implemented for this purpose. GA is a technique to automatically solve a problem using principles of Darwinian evolution. This has been implemented to explore the possibility of evolving an n-qubit circuit when the circuit matrix has been provided using a set of single, two and three qubit gates. Using a variable length population and universal stochastic selection procedure, a number of possible solution circuits, with different number of gates can be obtained for the same input matrix during different runs of GA. The given algorithm has also been successfully implemented to obtain two and three qubit Boolean circuits using Quantum gates. The results demonstrate the effectiveness of the GA procedure even when the search spaces are large.

In the type frame originating from the flat domain of boolean values, we single out elements which are hereditarily total. We show that these elements can be defined, up to total equivalence, by sequential programs. The elements of an equivalence class of the totality equivalence relation (totality class) can be seen as different algorithms for computing a given set-theoretic boolean function. We show that the bottom element of a totality class, which is sequential, corresponds to the most eager algorithm, and the top to the laziest one. Finally we suggest a link between size of totality classes and a well known measure of complexity of boolean functions, namely their sensitivity.

Boolean functions are fundamental to synthesis and verification of digital logic, and compact representations of Boolean functions have great practical significance. Popular representations, such as CNF, DNF, circuits and ROBDDs [4], offer different advantages and are preferred for different tasks. Conversion between those representations is common, especially when one is used to represent the input and another speeds up relevant algorithms. Our work addresses the construction of ROBDDs that represent outputs of a given Boolean circuit. It is used in synthesis and verification. Earlier works (Fujita, Fujisawa, and Kawato, 1988. Malik et al., 1988.) proposed ordering circuit inputs and gates by graph traversals. We contribute orderings based on circuit partitioning and placement, leveraging the progress in recursive bisection and multi-level min-cut partitioning achieved in late 1990s. Our empirical results show that the proposed orderings based on circuit partitioning and placement are more successful than straightforward DFS and BFS, as well as related heuristics.

In this paper, we provide a new optical model for computation, which is named filter machine. Filter machine consists of optical filters as data storage and imaging operation for computation. Each filter is a long optical sensitive sheet, divided into cells. Filter cells may represent different patterns of opaque and transparent cells which are constructed by emitting light to some cells and made them opaque. The computation in filter machines starts from basic filters with basic patterns of opaque and transparent cells. We provide an algorithm that, given a Boolean circuit, produces a filter machine generating output of the circuit for all possible inputs. Thus, we show that the filter machine is able to generate every Boolean function. Indeed, the number of required cells in each filter is exponential according to the number of variables in the given Boolean function. In order to show the efficiency of the model in solving combinatorial problems, we provide a solution for the k-clique problem on graphs by filter machines, which requires polynomial time and number of filters but exponential number of cells in each filter.

The Directed Acyclic Graph (DAG) is a graph representing causal pathways for informing the conduct of an observational study. The use of DAGs allows transparent communication of a causal model between researchers and can prevent over-adjustment biases when conducting causal inference, permitting greater confidence and transparency in reported causal estimates. In the era of ‘big data’ and increasing number of observational studies, the role of the DAG is becoming more important. Recent best-practice guidance for constructing a DAG with reference to the literature has been published in the ‘Evidence synthesis for constructing DAGs’ (ESC-DAG) protocol. We aimed to assess adherence to these principles for DAGs constructed within perioperative literature. Following registration on the International Prospective Register of Systematic Reviews (PROSPERO) and with adherence to the Preferred Reporting Items for Systematic Reviews and Meta-Analyses (PRISMA) reporting framework for systematic reviews, we searched the Excerpta Medica dataBASE (Embase), the Medical Literature Analysis and Retrieval System Online (MEDLINE) and Cochrane databases for perioperative observational research incorporating a DAG. Nineteen studies were included in the final synthesis. No studies demonstrated any evidence of following the mapping stage of the protocol. Fifteen (79%) fulfilled over half of the translation and integration one stages of the protocol. Adherence with one stage did not guarantee fulfilment of the other. Two studies (11%) undertook the integration two stage. Unmeasured variables were handled inconsistently between studies. Only three (16%) studies included unmeasured variables within their DAG and acknowledged their implication within the main text. Overall, DAGs that were constructed for use in perioperative observational literature did not consistently adhere to best practice, potentially limiting the benefits of subsequent causal inference. Further work should focus on exploring reasons for this deviation and increasing methodological transparency around DAG construction.