Design of Inverse Continuous High-efficiency Multi-Octave Power Amplifier Using Novel Distributed Matching Structure

A series of novel continuous inverse modes based on current element is proposed. The series of novel continuous inverse mode is extended by increasing the coefficient in the current equation of traditional inverse class F power amplifier (PA). The theoretical analysis shows that new current equation can provide a wide matching space for the design of broadband high efficiency PAs. To prove this theory, a wideband high efficiency PA is designed and fabricated. The experimental test results show that the drain efficiency is 65-78% in the 1.8-3G frequency range. The designed PA can obtain output power from 12.9 to 21 W and gain is from 10 to 13.3 dB in the interesting frequency range.

This paper presents the design of a multi-octave power amplifier (PA) using extended class B to class J continuous mode. In a multi-octave PA, an overlapping exists between the higher harmonic frequencies of the lower octave and the fundamental frequency of the higher octave. Therefore, a PA mode with overlapping between fundamental and second harmonic impedances is suitable to design a multioctave PA. An extended class B to class J continuous mode consists of overlapping between fundamental and second harmonic impedances. However, the design of a multi-octave PA is not straightforward. The impedance selected in each octave is important to design a highly-efficiency multi-octave PA. Therefore, this paper presents a methodology to choose the appropriate load in each octave to design extended class B to class J continuous mode PA. This paper also presents a valid range of design variables for the transistor’s reliable operation. The proof of concept PA has been designed using 10 W Wolfspeed GaN HEMT CGH40010F. The designed PA operates from 0.75 to 2.75 GHz. The corresponding fractional bandwidth is 114.2%. The measured drain efficiency, power added efficiency, and output power are 60-73.6%, 53-67.8%, and 39.3-42.3 dBm, respectively. The measured carrier to third-order intermodulation distortion is better than -15 dBc when tested with a 20 MHz spacing two-tone signal.

In this work, a new particle swarm optimization (PSO) method with dynamic nonlinear self-adaptive hyperparameters (DNSHs) (PSO-DNSHs) is proposed for radio frequency (RF) power amplifier (PA) design. The theory and advantages of this method are described and analyzed. Based on the proposed PSO-DNSH method, a multioctave PA and a broadband pseudo-Doherty load-modulation balance amplifier (PD-LMBA) are designed. The multioctave single-ended PA achieves an output power exceeding 40.3 dBm, a drain efficiency greater than 60.9%, and a gain of over 10.3 dB between 0.5 and 3.6 GHz. While the broadband PD-LMBA shows a saturated output power of 41.1–43 dBm, a saturation drain efficiency of 57.7%–77.6%, a 6-dB output power back-off (OBO) DE of 47.3%–64.6%, and a 10-dB OBO DE of 51.2%–68.4%. Compared with other existing PSO-based methods, the results demonstrate that the proposed method not only achieves better performance for both PAs, but also shows faster convergence capability. Modulated signal tests along with the digital predistortion (DPD) are also conducted for both PAs, 20-MHz 5G new radio (NR) signal with 6- and 10-dB peak-to-average power ratios (PAPRs) are used for single-ended PA and PD-LMBA, respectively. Excellent linearity is achieved for both PAs.

A method for designing a broadband high-efficiency power amplifier (PA) based on a novel loop-shaped filter matching structure is proposed in this paper. By combining a power amplifier matching circuit and a loop-shaped filter structure, a broadband high-efficiency PA based on a new harmonic matching structure is realized. The novel loop-shaped filter can control the second and third harmonics in a wide frequency range and has a specific control effect on higher-order harmonics, which can further expand the bandwidth of class-F PA and improve efficiency. To verify its feasibility, a power amplifier with a bandwidth of 1.6 GHz-3.4 GHz, a saturated output power greater than 41 dBm, a drain efficiency of 65% -72% with a gain greater than 10dB is designed and fabricated using GaN HEMT CGH40010F transistor.

We discuss the broadband design of high-efficiency GaN power amplifiers (PAs) using continuous modes. A Machine Learning approach to the full EM-based optimization of a hybrid design is first outlined and demonstrated experimentally. We then consider the challenges of achieving high efficiency in a broadband integrated PA, including the features of GaN transistors that facilitate broadband operation. It is shown that proper sizing of transistor can lead to an optimum load resistance close to 50fl, thereby extending the bandwidth of the output matching network of the PA in an integrated environment. We present techniques to realize the continuous-mode operation in an integrated GaN PA, with low loss and compact chip size. Finally, we show predicted results for the integrated GaN PA implementation.

In this paper, a hybrid continuous inverse mode for designing broadband high-efficiency power amplifiers (PAs) is for the first time analyzed mathematically. The hybrid continuous inverse mode contains the classical continuous inverse Class-F mode, the continuous inverse F mode with maximally flat current waveforms and the inverse Class-B to Class-J continuum mode and so on, which provides alternative design space for realizing the broadband high-efficiency PAs. And a high-efficiency PA at the center frequency of 3.45 GHz is designed to verify this theory. Experimental results show that the implemented PA can output 10.5–16 W saturation power with drain efficiency (DE) over 70% from 3.2 to 3.7 GHz. Meanwhile, for a 5 MHz two-tone signal, drain efficiency of 40.3%–48% is measured with an average output power of 34–36.5 dBm at a two-tone carrier-to-intermodulation ratio (C/I) of 30 dBc.

Developments within modern nonlinear measurement systems offer an increasing degree of flexibility to the microwave power amplifier (PA) designer. The PA designer has historically been a driving factor in setting the development directions of new measurement systems, fueling the paradigm, that PA innovations largely push new measurement requirements. It would appear that measurement system manufacturers are now the ones pushing the technology envelope. This paper discusses current trends within modern nonlinear measurement systems to determine who is leading whom and whether the aforementioned paradigm is shifting.

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

This thesis researches the design of transceiver front-end RF amplifiers for Bluetooth applications in GPDK 45 nm CMOS technology. The target of the design was to minimize the transceiver's power consumption while achieving the best device operating performances. The design of a band-pass low noise amplifier (LNA) used for the receiver and the design of a power amplifier (PA) used for the transmitter were presented. Both amplifiers were designed in 45 nm CMOS technology with a DC supply voltage under 1.2 V to meet Bluetooth specifications at 2.45 GHz operating frequency. The LNA was designed to achieve a minimum small signal gain of at least 15 dB10 with a NF less than 2 dB10 and a reasonable input range for linearity at 1 mW operating power consumption. The PA was designed based on class E switching power amplifier configuration to achieve a minimum of 40% drain efficiency for 100 mW (Bluetooth Class 1) output power. Research on low power high performance Bluetooth device front-end RF amplifiers was conducted through studies of wireless communication modulation schemes, impedance matching networks, and trade-offs between performance parameters. In summation, this thesis searched for, explored, and analyzed possible methodologies that could be used to design RF CMOS amplifiers of Bluetooth applications.

A novel topology of lossy equalizer with impedance transformation and stabilization capability is presented, which allows the design of broadband very high-linearity and high-power amplifiers. Design equations are presented and used to design a 1-2.4 GHz 60W composite amplifier exploiting push-pull configuration.

This paper presents a method for bandwidth extension in high-efficiency power amplifier (PA) design. With a phase shift in voltage waveform of the continuous class-F mode, real part of harmonic impedance is generated to expand the impedance design space at the expense of little lossy of performance. The simulation and measurement, conducted on a broadband PA covering 1.9-3.1 GHz based on the proposed method, show a good agreement with the theory. Measured results show that the fabricated PA has a drain efficiency of 66.5%-75% when delivering 41-42.3 dBm output power with a gain of 11-12.7 dB. Under a 20-MHz LTE signal excitation at 2.6 GHz, the PA exhibits an adjacent channel leakage ratio of -36.5 dBc at an average output power of 35 dBm without linearization.

In this paper, an innovative approach to achieve broadband linear power amplifier (PA) with a continuous broadband is presented. The proposed method mainly depends on the theory of control of intermodulation products and harmonics. This method results in a continuous sweet spots over a wide bandwidth. Based on the continuous sweet spots, a suboptimal solution is derived for improving the efficiency and linearity of broadband PAs. To verify the effectiveness of this method, one broadband PA operating over 4.5–5.5[Formula: see text]GHz is developed and measured, it indicates that the peak output power of the PA is 35–57[Formula: see text]dBm for a small signal input with a gain of 12[Formula: see text]dB, and the peak drain efficiency (DE) of the PA is larger than 57% over the whole working band. However, when the PA is stimulated by a 5[Formula: see text]MHz two-tone signal input, we observe that the DE keeps above 38% under the condition of the measured third-order intermodulation distortion (IMD3) is not larger than [Formula: see text][Formula: see text]dBc.

WLAN is a widely used standard telecommunication protocol. Currently IEEE802.11ac standard has some limitations along with the increasing need for fast communication and able to serve many devices. The development of the IEEE 802.11ax standard is expected to overcome these limitations. Some challenges on the design of power amplifiers also appear as the development of 802.11ax standard. Power amplifiers on the access point are expected to provide a minimum output of 30dBm. This paper explains the design and modeling of power amplifiers on access point using load pull method. Based on the design and test result using CGH27030 transistor with simulation approach harmonic balance obtained that the output power of half wave obtained optimum value 33,023 dBm at input value 19 dBm and EVM equal to 4,8%.

RF power amplifiers are one of challenging blocks in designing radio frequency transceivers, this is due to non-linearity behavior of power amplifiers that leads to inter-modulation distortion. This paper presents the design of wide-band power amplifier which combined with parallel coupled line band pass filter at the input and output of power amplifier to allow the only required frequency band to pass through the power amplifier. Class-A topology and ATF-511P8 transistor are used in this design. Advanced Design System software used as a simulation tool to simulate the designed wide-band power amplifier. The simulation results showed an input return loss (S11) which less than -10dB, and gain (S21) is higher than 10 dB over the entire frequency band and considers as flat as well. The designed amplifier is stable over the bandwidth (K>1). Inter-modulation distortion is -56.919dBc which is less than -50dBc with 10dBm input power. The designed amplifier can be used for the microwave applications which include weather radar, satellite communication, wireless networking, mobile, and TV.

In this letter, a new Bayesian optimization (BO) method with dynamic feasible region shrinkage (DFRS) technique for power amplifier (PA) design is proposed. As a powerful optimization tool, it provides a more effective way to optimize the performance of PA than the embedded commercial optimization tools. It also has a better convergence speed than the existing fixed mode acquisition function. Results show that the new technique provides a great optimization for PA design, not only for circuit optimization but also for electromagnetic (EM) optimization.