Methodology to Design Multi-Octave Power Amplifier Using Extended Class B to Class J Continuous Mode

In this work, a new particle swarm optimization (PSO) method with dynamic nonlinear self-adaptive hyperparameters (DNSHs) (PSO-DNSHs) is proposed for radio frequency (RF) power amplifier (PA) design. The theory and advantages of this method are described and analyzed. Based on the proposed PSO-DNSH method, a multioctave PA and a broadband pseudo-Doherty load-modulation balance amplifier (PD-LMBA) are designed. The multioctave single-ended PA achieves an output power exceeding 40.3 dBm, a drain efficiency greater than 60.9%, and a gain of over 10.3 dB between 0.5 and 3.6 GHz. While the broadband PD-LMBA shows a saturated output power of 41.1–43 dBm, a saturation drain efficiency of 57.7%–77.6%, a 6-dB output power back-off (OBO) DE of 47.3%–64.6%, and a 10-dB OBO DE of 51.2%–68.4%. Compared with other existing PSO-based methods, the results demonstrate that the proposed method not only achieves better performance for both PAs, but also shows faster convergence capability. Modulated signal tests along with the digital predistortion (DPD) are also conducted for both PAs, 20-MHz 5G new radio (NR) signal with 6- and 10-dB peak-to-average power ratios (PAPRs) are used for single-ended PA and PD-LMBA, respectively. Excellent linearity is achieved for both PAs.

The continuous mode provides theoretical support for the design of broadband power amplifiers. However, when the bandwidth exceeds one octave, the overlaps between the fundamental and harmonics will increase the complexity of power amplifier implementation. In this paper, based on inverse continuous mode, a novel matching network structure utilizes the overlap between harmonics ingeniously is proposed to simplify the design progress of ultra-broadband power amplifier. For verification, a multi-octave power amplifier is designed and fabricated, which achieves output power of 39.9-42.3 dBm and drain efficiency of 55-72% with the operating bandwidth of 0.6-3.9 GHz.

This paper demonstrates a power amplifier (PA) design procedure for achieving high peak efficiency over a wide bandwidth. A harmonic load-pull is performed over the desired frequency range resulting in theoretically optimum load impedances. Analysis of wide bandwidths where the harmonic bands overlap with the fundamental band and lower harmonic bands are performed. Practical impedances are found through a sensitivity analysis for the controllable fundamental and harmonic impedances. The target frequency range is 1–5GHz for the designed 10W GaN on SiC PA. The PA is measured and yields a small signal gain of 10.5dB–14.0dB over the frequency range from 0.6GHz to 5.1GHz. The peak output power is greater than 40dBm and the drain efficiency varies between 44% and 74% over the same frequency range.

High performance broadband distributed power amplifier (PA) design relies on the co-design of input signal distribution and non-isolated output combiner to take maximum advantage of the resulting load-pulling effects at both fundamental and higher harmonics. Due to the load-pulling and the need to consider higher harmonics, PA operation is not readily expressed analytically. In this work this is addressed by using a numerical linear multi-harmonic calculation method for rapid circuit evaluation and optimization. This linear approach targets good broadband performance without relying on nonlinear saturation effects. An initial investigation is performed to find suitable input network and output combiner topologies for a two-cell PA configuration. A demonstrator is then designed based on the findings, where a 3-dB hybrid coupler with an offset transmission line in one branch is used to produce a frequency dependent phase difference between transistor cells. Measuring the PA at 40-V supply and 1-dB compression the output power is in the 43–46 dBm range with corresponding efficiencies of 46–58% across 0.85–2.7 GHz, whereas saturated efficiencies are typically in the 60%-range. The simultaneous combination of high output power and high efficiency reported across 100% fractional bandwidth is state-of-the-art and clearly shows the merit of the proposed PA design approach.

The extended continuous class-F mode RF power amplifier (PA) is presented for the first time. The introduction and experimental validation of this novel PA mode demonstrates a new design space over a wide band of frequencies. This paper will show that high output power and drain efficiency, equivalent to the class-F mode, can be maintained by varying the reactive components of fundamental and second harmonic impedances in accordance with the new formulation of the voltage waveform. Additionally it will be shown that, by varying both phase and magnitude of the fundamental and second harmonic impedances, a yet wider design space can be achieved, where the efficiency is maintained at a level greater than a certain target value. For the validation of this new theory, an experimental investigation was carried out on GaAs pseudomorphic HEMT devices and demonstrates that high output power and drain efficiency between 75%-83% can be achieved over a wide range of fundamental and second harmonic loads.

We discuss the broadband design of high-efficiency GaN power amplifiers (PAs) using continuous modes. A Machine Learning approach to the full EM-based optimization of a hybrid design is first outlined and demonstrated experimentally. We then consider the challenges of achieving high efficiency in a broadband integrated PA, including the features of GaN transistors that facilitate broadband operation. It is shown that proper sizing of transistor can lead to an optimum load resistance close to 50fl, thereby extending the bandwidth of the output matching network of the PA in an integrated environment. We present techniques to realize the continuous-mode operation in an integrated GaN PA, with low loss and compact chip size. Finally, we show predicted results for the integrated GaN PA implementation.

This thesis researches the design of transceiver front-end RF amplifiers for Bluetooth applications in GPDK 45 nm CMOS technology. The target of the design was to minimize the transceiver's power consumption while achieving the best device operating performances. The design of a band-pass low noise amplifier (LNA) used for the receiver and the design of a power amplifier (PA) used for the transmitter were presented. Both amplifiers were designed in 45 nm CMOS technology with a DC supply voltage under 1.2 V to meet Bluetooth specifications at 2.45 GHz operating frequency. The LNA was designed to achieve a minimum small signal gain of at least 15 dB10 with a NF less than 2 dB10 and a reasonable input range for linearity at 1 mW operating power consumption. The PA was designed based on class E switching power amplifier configuration to achieve a minimum of 40% drain efficiency for 100 mW (Bluetooth Class 1) output power. Research on low power high performance Bluetooth device front-end RF amplifiers was conducted through studies of wireless communication modulation schemes, impedance matching networks, and trade-offs between performance parameters. In summation, this thesis searched for, explored, and analyzed possible methodologies that could be used to design RF CMOS amplifiers of Bluetooth applications.

In this paper, a hybrid continuous inverse mode for designing broadband high-efficiency power amplifiers (PAs) is for the first time analyzed mathematically. The hybrid continuous inverse mode contains the classical continuous inverse Class-F mode, the continuous inverse F mode with maximally flat current waveforms and the inverse Class-B to Class-J continuum mode and so on, which provides alternative design space for realizing the broadband high-efficiency PAs. And a high-efficiency PA at the center frequency of 3.45 GHz is designed to verify this theory. Experimental results show that the implemented PA can output 10.5–16 W saturation power with drain efficiency (DE) over 70% from 3.2 to 3.7 GHz. Meanwhile, for a 5 MHz two-tone signal, drain efficiency of 40.3%–48% is measured with an average output power of 34–36.5 dBm at a two-tone carrier-to-intermodulation ratio (C/I) of 30 dBc.

Developments within modern nonlinear measurement systems offer an increasing degree of flexibility to the microwave power amplifier (PA) designer. The PA designer has historically been a driving factor in setting the development directions of new measurement systems, fueling the paradigm, that PA innovations largely push new measurement requirements. It would appear that measurement system manufacturers are now the ones pushing the technology envelope. This paper discusses current trends within modern nonlinear measurement systems to determine who is leading whom and whether the aforementioned paradigm is shifting.

This paper presents a method for bandwidth extension in high-efficiency power amplifier (PA) design. With a phase shift in voltage waveform of the continuous class-F mode, real part of harmonic impedance is generated to expand the impedance design space at the expense of little lossy of performance. The simulation and measurement, conducted on a broadband PA covering 1.9-3.1 GHz based on the proposed method, show a good agreement with the theory. Measured results show that the fabricated PA has a drain efficiency of 66.5%-75% when delivering 41-42.3 dBm output power with a gain of 11-12.7 dB. Under a 20-MHz LTE signal excitation at 2.6 GHz, the PA exhibits an adjacent channel leakage ratio of -36.5 dBc at an average output power of 35 dBm without linearization.

A series of novel continuous inverse modes based on current element is proposed. The series of novel continuous inverse mode is extended by increasing the coefficient in the current equation of traditional inverse class F power amplifier (PA). The theoretical analysis shows that new current equation can provide a wide matching space for the design of broadband high efficiency PAs. To prove this theory, a wideband high efficiency PA is designed and fabricated. The experimental test results show that the drain efficiency is 65-78% in the 1.8-3G frequency range. The designed PA can obtain output power from 12.9 to 21 W and gain is from 10 to 13.3 dB in the interesting frequency range.

ABSTRACTIn this paper, the design theory of hybrid continuous mode (HCM) power amplifier (PA) with more general input nonlinear effect is deeply studied. By analyzing the change of asymmetric conduction angle caused by the arbitrary amplitude and phase of the input nonlinear second harmonic, a more general time domain waveform of drain voltage and current of HCM PA can be derived. The load design space is reconstructed by the new time domain waveform of drain voltage and current. The analysis shows that using arbitrary input nonlinearity can provide more flexible input harmonic impedance space in broadband design, which can maintain and improve the performance of broadband PA. Then, an improved T‐type input harmonic control matching network is proposed to control the input nonlinearity more effectively. Finally, for the practical validation of the proposed theory, a broadband hybrid continuous‐mode PA operating at 1.8‐ to 3‐GHz is designed by using a commercial 10‐W GaN high electron mobility transistor (HEMT). The measured results show drain efficiency reaches 65% to 72.6% at saturation, 11.9‐ to 14.2‐dB gain and 40.3‐ to 42.2‐dBm saturation output power.

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

WLAN is a widely used standard telecommunication protocol. Currently IEEE802.11ac standard has some limitations along with the increasing need for fast communication and able to serve many devices. The development of the IEEE 802.11ax standard is expected to overcome these limitations. Some challenges on the design of power amplifiers also appear as the development of 802.11ax standard. Power amplifiers on the access point are expected to provide a minimum output of 30dBm. This paper explains the design and modeling of power amplifiers on access point using load pull method. Based on the design and test result using CGH27030 transistor with simulation approach harmonic balance obtained that the output power of half wave obtained optimum value 33,023 dBm at input value 19 dBm and EVM equal to 4,8%.

This paper presents the analysis and design of a high-efficiency broadband Class-EM power amplifier (PA). The inherent broadband characteristic of the Class-EM PA that turns out due to the resistive-reactive impedance terminations at the fundamental and second harmonic frequency is first investigated and then extended using double reactance compensation technique by incorporating a parallel resonator L P C P into the main circuit's load network. Designed using GaN HEMTs, the PAs deliver 23.7% (without L P C P ) and 60.4% (with L P C P ) fractional bandwidth, within which the PAE is larger than 60% and the output power is relatively constant.