Digital tanlock loop for tracking π/4-DQPSK signals in digital cellular radio

The limitations and the effect of the performance of the binary phase detector on the overall performance of the digital phase-locked loop is the main focus of the research presented in this proposal. In the first part of the research, the gain limitation of the binary phase detector on the performance of the digital Bang-Bang phase-locked loop is investigated. Then to validate the concept that is explained and to improve the performance of the digital loop under the gain limitation, two schemes are explored and explained. In one scheme a random bit-stream which is noise-shaped using a software defined modulator is used to dither the reference and improve the performance and in the second scheme a Time-Amplifier is used to improve the digital loop performance by preventing the phase detector from operating in metastable region.

One of the goals of digital cellular radio communication systems is described as reducing frequency spectrum congestion, for which the implementation of cellular packet switched data is considered. Due to the bursty nature of many data applications, one solution for conserving RF spectrum is to multiplex packet data from multiple mobile stations into RF channels. In essence, the packet-switched RF channels become an additional traffic concentration point. The author proposes such an adaptation to digital cellular mobile telephone systems and points to necessary extensions of the existing US cellular signaling standard to make such an implementation possible. >

Until now, four different types of first‐order digital phase‐locked loop (DPLL) for tracking of clock signal have been reported which are distinguished mainly by a difference in the control circuit. The performance of these digital loops is determined by rms phase error and transient response which are obtained in the reporter's own way established on a basis of Markov theory. However, performance comparison has not yet been made.In this paper, first, it is proved that phase error sequences of four digital loops are all classified into semi‐Markov sequences (SMS) if time jitter in each cycle of the input signal is an independent random variable with a certain distribution function.Second, under the condition that time jitter is an independent random variable with Gaussian distribution, the rms phase error and power density spectrum of the phase error sequence are computed for typical values of input variance according to formulas derived for SMS.Finally, using this curve and equivalent first‐order linear PLL, the rms phase error, loop noise bandwidth and phase amplification factor are obtained; and based on these results, the performance of four digital loops is discussed.

In the last chapter, the use of established analogue modulation techniques was described in the context of high-capacity cellular radio telephone applications. Conclusions regarding existing systems operation and future developments may be drawn, and these centre on the issue of capacity. Already, first-generation systems are showing signs of capacity saturation in major urban centres, even with a relatively modest total user population. Clearly, major capacity increase will be called for to meet future demand, and second-generation systems must address this challenge. What are the options available? To extend existing system operations, more spectrum would have to be made available. Alternatively, new approaches to system design must be found to utilize spectrum more efficiently.

In this correspondence, first it is pointed out that introducing time delay of one sampling interval in digital phase-locked loop considerably eases restriction on operating times of digital circuits in the loop. Then statistical analyses are performed for first- and secondorder loops with time delay of one sampling interval in order to see the effect of the time delay on their performances. Approximate analytic expressions are obtained for the steady-state phase error probability density and phase error variance, and their validity is confirmed by numerical analysis. Increase in the phase error variance due to the introduction of the time delay is found to be of tolerable order for sufficiently high input SNR, and thus the delayed sampling scheme proposed here is considered to be effective in easing the restriction on the operating times of the digital circuits in the loop.

The bit error rate (BER) performance of digital cellular radio systems was investigated in a Nakagami (1960) fading, correlated lognormal shadowing and additive white Gaussian noise (AWGN) environment for noncoherent differential phase shift keying (DPSK) modulation. Two models were used to determine the BER; the first one is based on the cumulative power levels of cochannel interferers while the second one is based on instantaneous cochannel interference power. The relative advantages of the two models were presented for various design parameters. The effects of bit energy to noise ratio, frequency reuse distance, cluster size, correlation coefficient, shadow spread, and fading parameter were studied. The BER was observed to be lower in a correlated shadowing environment compared with the uncorrelated case. The near-far effect was studied by assuming that both the desired and interfering mobiles are randomly located in their corresponding cells.

The main objective of this paper is to broaden the lock range of the Digital Tanlock Loop (DTL) by extending the stable behaviour of the loop to larger control parameter by incorporating a feedback loop. The tendency of the DTL to diverge is measured and fed back as a form of linear stabilization. Using this technique the loop lock range is extended. The lock range extension has been confirmed through the use of bifurcation diagram , and Lyapunov exponent.

In this work, we are interested in implementing, developing, and evaluating a time reversal strategy for a multiple-input single-output orthogonal frequency division multiplexing system. This strategy enjoys a good trade-off between the computational complexity and performance in terms of bit error rate where it offers a good coding gain by forming a beam in the direction of the destination at a price of channel state information available at the transmitter. In time reversal technique, a higher coding and diversity gain can be achieved by increasing the number of transmitting antennas, which focuses the formed beam to the direction of the destination antenna. By achieving this, the received signal-to-noise ratio can be maximized which makes time reversal a good candidate for multiple-input single-output systems while keeping a low complexity. The performance of the proposed system is evaluated in terms of bit error rate where our simulations show that the proposed strategy enjoys the full diversity gain, which is equal to the number of transmitting antennas. Moreover, a robust channel estimation technique is proposed to improve the overall system in terms of bit error rate.

This paper presents an adaptive update scheme for all digital delay locked loop(ADDLL). To reduce the output jitter induced by the power fluctuation, the proposed ADDLL adaptively adjust the variable delay line step using a phase error detector. The phase error detector detects the phase error variation every sixteen external clock period. Once the phase error over the threshold, the adaptive update engine is activated to suppress the power fluctuation. The proposed ADDLL achieve that the tDQSCK (DQS rising edge output timing location from rising edge of CK) drift is under +/-35ps when the power fluctuation is +/-60mV.

The time-delay digital tanlock loop: performance analysis in additive Gaussian noise

We present a subsampling polar transmitter (SSPTX) in 28-nm CMOS that consists of a low-noise phase modulating (PM) digital subsampling phase-locked loop (PLL) and a harmonic rejection mixed (HRM) inverse-class-D ( $\mathrm {D}^{-1}$ ) digital power amplifier (DPA) for amplitude modulation (AM). The DPA is, unlike in a typical polar transmitter (TX), placed within the PLL and the phase-error detection happens directly at the DPA output. The subsampling polar TX thus becomes sensitive not only to phase errors but also to modulation amplitude. That feature enables AM–AM and PM–PM distortion to be detected and cancelled digitally in the background, while the transmitter operates normally. Moreover, the AM–PM cross distortion is filtered by the loop itself. The chip operates from a 0.9-V supply at 5.5 GHz with 2.5 MHz BW (1024 QAM) with average 1.1-dBm output power and total power consumption of 50 mW.

This paper proposes an all-fiber fast optical frequency-hop code division multiple access (FFH-CDMA) for high-bandwidth communications. The system does not require an optical frequency synthesizer allowing high communication bit rates. Encoding and decoding are passively achieved by Bragg gratings, Multiple Bragg gratings replace a frequency synthesizer, achieving a hopping rate in tens of GHz. A main lobe sine apodization can be used in writing the gratings to enhance the system capacity and the spectrum efficiency. All network users can use the same tunable encoder/decoder design. The simultaneous utilization of the time and frequency domains offers notable flexibility in code selection. Simulations show that the encoder efficiently performs the FFH spread spectrum signal generation and that the receiver easily extracts the desired signal from a received signal for several multiple access interference scenarios. We measure the system performance in terms of bit error rate, as well as auto-to cross-correlation contrast. A transmission rate of 500 Mb/s per user is supported in a system with up to 30 simultaneous users at 10/sup -9/ bit error rate. We compare FFH-CDMA to several direct sequence-CDMA systems in terms of bit error rate versus the number of simultaneous users. We show that an optical FFH-CDMA system requires new design criteria for code families, as optical device technology differs significantly from that of radio frequency communications.

This paper deals with the proposal and performance evaluation of a fixed microwave communication (FMC) system that shares the same bandwidth as that of an existing UMTS network. The main application of the FMC system is for wireless connections between remote base stations and a core network access point for an UMTS network implementation in a dense urban environment, where a wired connection could be very expensive for service providers. Besides, sharing of the same frequency band could be attractive for the actual cost and lack of frequency spectrum. The mutual interference effects between the FMC and the existing UMTS systems are investigated by focusing on typical application scenarios. The performance for the two systems under consideration has been evaluated in terms of bit error rate by means of computer simulations for proposed receiving scheme where mutual interference are, firstly, detected and then canceled from the other system. The obtained results between the proposed FMC system and an existing UMTS network and the improvement of performance in terms of bit error rate with proposed receiving system.

An extensive study of digitized speech transmission over existing VHF FM mobile radio sets is presented. Objective criteria expressed in terms of bit error rate (BER) are determined for the performance evaluation of analog FM radios when transmitting digital voice. These criteria are used to define the technical characteristics such as the receiver sensitivity, co-channel rejection, and adjacent channel selectivity in the case of digital FM transmission. The concept of performance measurements of existing sets in the digital mode of operation is suggested. The results of performance measurements reported here include the following: 1) radiated FM spectra, 2) bit error rate curves, 3) receiver sensitivity, 4) BER performance in the presence of analog or digital FM interference on the same or adjacent channel, 5) signal plus noise plus distortion to noise plus distortion ratio (SINAD) performance in the presence of co-channel or adjacent channel interference for both types of interfering signals, 6) co-channel rejection and adjacent channel selectivity for various combinations of the wanted and interfering signals, 7) receiver selectivity for both modes of operation, and 8) adjacent-signal selectivity for various combinations of the desired and undesired signals. Optimum values of design parameters of digital voice radio system are deduced from the obtained results. Finally, the implications of digitized speech transmission on the technical characteristics, operating range, channel reuse distance, and adjacent channel interference performance of analog FM radios are discussed.

A digital phase-locked loop (PLL) with the proposed adaptive loop gain controller (ALGC) is presented. The relation between the root-mean-square jitter (RMS) of the digital PLL and the transition probability of the bang-bang phase frequency detector (BBPFD) is analyzed. The transition probability of the BBPFD is monitored by the ALGC to control the proportional gain of the digital loop filter which improves the RMS jitter of the digital PLL. This digital PLL with the proposed ALGC is fabricated in 40nm CMOS process and the active area is 0.009mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The power consumption of the whole digital PLL is 1.44mW from a 1V supply voltage. The integral RMS jitter is 5.26ps at 3.2GHz.