Effect of surface oxide characteristics on Scanning Capacitance Microscopy Imaging

We report scanning capacitance microscopy (SCM) images of a working p-channel metal–oxide–semiconductor field-effect transistor (P-MOSFET) during device operation. Independent bias voltages were applied to the source/gate/drain/well regions of the MOSFET during SCM imaging, and the effect of these voltages on the SCM images is discussed.

Scanning capacitance microscope (SCM) images, and the two-dimensional (2D) dopant profiles extracted from them, show poor reproducibility from laboratory to laboratory. Major factors contributing to SCM image variability include: poor sample surface and oxide quality, excess carrier generation from stray light, reduced sensor dynamic range from stray capacitance, and use of nonoptimal SCM operating voltages. This article discusses the sources of SCM image variability, how they affect the measured SCM images, and possible approaches for mitigating their effects. Recommended procedures for extracting quantitative 2D are discussed. Finally, a set of informal research materials is introduced consisting of a complementary metal-oxide-semiconductor transistor pair, an identical pair without metallization, and a pair of transistor-like structures with the conductivity type of the source/drains reversed. These structures are intended for use with the FASTC2D software to help improve laboratory-to-laboratory dopant profile reproducibility.

In order to demonstrate its unique capabilities, a combined microscope comprised of a scanning capacitance microscope and a contact mode atomic force microscope was used to image a buried structure. The atomic force microscopy images surface topography, while the scanning capacitance microscope simultaneously images buried structure. By applying a modulation technique, the voltage derivative of the capacitance (dC/dV) was used as a scanning capacitance microscope signal. The sample used for the demonstration was a silicon wafer with metal lines 4 nm in thickness covered by a 40-nm-thick layer of silicon oxide. The scanning capacitance microscope image was dependent on the bias voltage applied to the probe and the sample. Since the scanning capacitance microscope signal above the metal lines is zero, the bias voltage dependency of the contrast in scanning capacitance microscope images corresponds directly to the scanning capacitance microscope signal versus V at locations where the metal line is not buried. However, the bias dependency of the contrast did not agree with the scanning capacitance microscope signal observed between metal lines. A possible mechanism for the discrepancy between these bias dependencies is discussed based upon charge deposition on the sample surface caused by tip contact and lateral movement of the charges in the adsorbed water on the sample surface.

Scanning capacitance microscopy (SCM) is a powerful tool for two-dimensional (2D) dopant/carrier profiling. Currently noise limits the accuracy of 2D dopant profiles obtained by SCM. In an effort to reduce noise, a systematic analysis of different SCM noise sources is provided. The main noise sources during SCM measurements are capacitance sensor noise and oxide–semiconductor surface induced noise. For adequate tip size, the dominant noise in SCM measurements is caused by variations in the quality of surface. On as-polished surfaces, nonstationary noise is observed. This noise is likely caused by the variations in the density of oxide traps. Tip induced charging of these traps and local variations or fluctuations in discharge time during SCM imaging cause the noise level and noise pattern to be different from image to image. Heat treatment under ultraviolet irradiation or in a hydrogen ambient is found to be an effective way to reduce or even eliminate this type of SCM noise. Stationary surface noise is mostly created by the variations in the oxide thickness. This type of noise correlates with topographic roughness and is very consistent during SCM measurements. By reducing the topographic roughness, the stationary surface noise may be reduced to the level of ∼10−2 of the depletion SCM signal for typical experimental conditions. It is shown that the capacitance sensor noise depends on the capacitance sensor tuning parameters and under proper conditions can be reduced to a negligible level for standard probe tips used in SCM measurements.

Scanning capacitance microscopy (SCM) has been applied to microscopic characterization of electrical properties of silicon-on-insulator (SOI) wafers. Two kinds of capacitance-voltage (C-V) methods have been proposed for separately characterizing the electrical properties of a gate oxide, an SOI layer, a buried oxide (BOX) layer. a Si substrate, and their interfaces: (i) a front-gate C-V method whereby the electrical properties of the gate oxide and front SOI (the gate oxide/SOI) interface can be characterized. arid (ii) a back-gate C-V method for the characterization of the electrical properties of the BOX layer. back SOI (the BOX/SOI) interface, and the BOX/Si substrate interface. Furthermore, SCM images of the sampled SOI wafer have been obtained for visualizing the microscopic spatial distribution of electrical properties of SOI wafers by using the proposed C-V methods. These SCM images revealed the fluctuation in tile oxide charges arid interface traps. SCM has been demonstrated to be an effective tool for microscopic electrical characterization of SOI wafers.

Electrical current at micro-/macro-scale of undoped and nitrogen-doped MWPECVD diamond films

The availability of very sharp, wear-proof, electrically conductive probes is one crucial issue for conductive atomic force microscopy (AFM) techniques such as scanning capacitance microscopy, scanning spreading resistance microscopy, and nanopotentiometry. The purpose of this systematic study is to give an overview of the existing probes and to evaluate their performance for the electrical techniques with emphasis on applications on Si at high contact forces. The suitability of the characterized probes has been demonstrated by applying conductive AFM techniques to test structures and state-of-the-art semiconductor devices. Two classes of probes were examined geometrically and electrically: Si sensors with a conductive coating and integrated pyramidal tips made of metal or diamond. Structural information about the conductive materials was obtained by electron microscopy and other analytical tools. Swift and nondestructive procedures to characterize the geometrical and electrical properties of the probes prior to the actual AFM experiment have been developed. Existing contact models have been used to explain variations in the electrical performance of the conductive probes.

Quantitative dopant profile measurements are performed on a nanometer scale by scanning capacitance microscopy (SCM). An atomic force microscope is used to position a nanometer scale tip at a semiconductor surface, and local capacitance change is measured as a function of sample bias. A new feedback method has been demonstrated in which the magnitude of the ac bias voltage applied to the sample is adjusted to maintain a constant capacitance change as the tip is scanned across the sample surface. A quasi-1D model is used to extract dopant density profiles from the SCM measurements. The inverted SCM dopant profiles are compared with profiles obtained by process simulation and secondary ion mass spectroscopy measurement. Good agreement was found between the SCM measured profile and the lateral profile predicted by SUPREM 4 over the concentration range from 1017 to 1020 cm−3.

It is widely acknowledged that Atomic force microscopy (AFM) methods such as conductive probe AFM (CAFM) and Scanning Capacitance Microscopy (SCM) are valuable tools for semiconductor failure analysis. One of the main advantages of these techniques is the ability to provide localized, die-level fault isolation over an area of several microns much faster than conventional nanoprobing methods. SCM, has advantages over CAFM in that it is not limited to bulk technologies and can be utilized for fault isolation on SOI-based technologies. Herein, we present a case-study of SCM die-level fault isolation on SOI-based FinFET technology at the 14nm node.

A scanning capacitance microscope (SCM) combines a differential capacitance measurement with an atomic force microscope (AFM). The AFM controls the position and contact force of a scanning probe tip, and a sensor simultaneously measures the capacitance between that tip and the sample under test. The capacitance sensor can detect very small (≈10 −21 F) changes in capacitance. The sensor is electrically connected to an AFM cantilevered tip that has been coated with metal to make it electrically conductive. As the SCM/AFM tip is scanned across the sample surface, simultaneous images of topography and differential capacitance are obtained. Currently, the most common application of SCM is imaging the carrier concentration variations (also known as dopant profiles) qualitatively within transistors that are part of silicon integrated circuits (ICs). Another application that has encouraged the development of commercial SCMs is the need for quantitative two‐dimensional (2‐D) carrier profiling of silicon transistors. This article reviews the history, operating principles, and applications of SCM. Special emphasis is placed on measuring quantitative 2‐D carrier profiles in silicon using SCM. This article also reviews implementation and applications of the scanning capacitance spectroscopy (SCS) technique, the intermittent contact mode of SCM (or IC‐SCM), and two other techniques that can also be classified as scanning capacitance probes: the scanning Kelvin probe microscope (SKPM), when operated at twice its drive frequency, and the scanning microwave microscope (SMWM).

Junction profiles of hot electron stressed high-voltage N-channel field effect transistor (NFET) devices were measured by scanning capacitance microscopy. Deactivation of phosphorous was observed on the drain side. To directly establish a link between phosphorus deactivation and hydrogen, junction profiles were measured on an unstressed NFET (N-type metal-oxide-semiconductor) device with and without H2 plasma treatment and with subsequent 400 °C annealing in helium. Phosphorus deactivation was observed in the device after H2 plasma treatment, while subsequent 400 °C annealing led to dissociation of the P–H (or H–Si–P) bond and recovery of the device junctions.

Charge trapping induced by hot carriers in a metal–oxide–semiconductor capacitor was studied with a scanning capacitance microscope (SCM). The local charge trapping/detrapping and the readout of the trapped charge in SiO2 was performed using a SCM combined with an atomic force microscope. When applying a voltage between the conductive probe tip and the p-type silicon substrate, hot carriers injected from silicon substrate into the SiO2 generated a positive trapped charge in the 10-nm-thick SiO2 layer. The resulting shift in capacitance–voltage (C–V) curves due to the locally trapped charge was measured by the high-frequency C–V measurement. For an application to the ultrahigh density data storage field, we investigated how the charge trapping and detrapping characteristics depend on the writing speed and bias voltage.

In this chapter, we discuss recent developments in the characterization of polarization doped wide bandgap semiconductor (WBS) heterojunctions with an emphasis on characterization by scanning probe microscopy (SPM). Wide bandgap semiconductors, such as SiC and GaN, have a wide variety of applications in electronic and optoelectronic devices [1–6]. The operation of devices made from these materials is dominated by the polarization properties of III-N and SiC semiconductor crystals. For example, polarization doped 2 dimensional electron gas (2DEG) channels in undoped GaN/AlGaN and SiC polytypic heterojunctions have been fabricated with current densites in excess of 1A/mm. Other effects, such as surface charge instability stemming from polarization, offer interesting potentials and challenges.While some of these effects may be studied using more conventional techniques such as currentvoltage (IV) and capacitance-voltage (CV) techniques (described in sections 2 and 3), others require probes capable of investigation on the nanometer scale. Transmission electron microscopy (TEM) can be used to investigate such polarizationinduced phenomena with atomic resolution, but involves destructive and laborious sample preparation. SPM techniques offer powerful, non-destructive tools to effectively and conveniently probe electronic materials and devices. Since the discovery of scanning tunneling microscopy (STM) in 1981 by Binnig and Rohrer [7], the field of SPM has advanced to encompass a large number of variations including, (i) STM, (ii) Atomic force microscopy (AFM), (iii) Electrostatic force microscopy (EFM), (iv) Scanning capacitance microscopy (SCM), (v) Scanning conduction microscopy (SCM), (vi) Magnetic force microscopy (MFM), (vii) Piezoelectric force microscopy (PFM), and (vii) Near field scanning optical microscopy (NSOM). Of the above modes, the first five modes have been extensively used for semiconductor characterization [8–15]. For WBS characterization, especially III-N, AFM, EFM and SCM modes are the most important due to the strong polarization of III-N and SiC. In the latter half of this chapter, we focus on the characterization of III-N by EFM operated in

A scanning capacitance microscope was used to study the photoenhanced minority-carrier contribution to the capacitance of the metal-oxide-semiconductor (MOS) capacitor at high frequencies. When a light is induced over the semiconductor surface, electron-hole pairs are generated and recombined. This steady-state generation-recombination process yields the temporary source of minority carriers, and the inversion layer underneath the oxide layer can respond to very fast-varying ac bias. We measured the differential capacitance (dC/dV) of the MOS capacitor under various light intensities, and observed a peak at the inversion region where the amplitude increased as the irradiation intensity increased. By integrating dC/dV with respect to V, we obtained C–V curves in which the capacitance of the depletion region recovered its value up to that of the accumulation region as the light intensity increased. We also observed that the C–V curves shifted in one direction under irradiation which we believe is due to the surface photovoltaic effect.

The scanning Kelvin probe force microscope (SKPM) is a member of the scanning probe microscope (SPM) family, and was derived from the non-contact atomic force microscope (NCAFM) technique. The contact potential difference (CPD) originating from the work function difference between the tip and sample surfaces can be measured using SKPM with simultaneous observation of the topography image. Using SKPM the surface of semiconductor device has been observed to measure the dopant concentration as the CPD difference in two dimensions. Most of the SKPM measurements are acquired in the atmosphere. The lateral resolution is achieved less than 100 nm.On the other hand, Scanning capacitance microscope (SCM) of contact mode is now most popular method to measure the dopant concentration in semiconductor device. However, the lateral resolution of SCM is limited, because of the fact that the contact mode cannot achieve a true atomic resolution, the fact that the capacitance is measured through the insulating layer on surface, and the fact that the tip and sample is damaged by the high electric field to be applied between the tip and sample. So SCM never achieves the atomic level resolution.