Evaluation of multi-queue buffered multistage interconnection networks under uniform and nonuniform traffic patterns

In this paper, we present the performance analysis of bufferless slotted optical packet switching using non uniform traffic pattern. The mathematical analysis has been done to evaluate the packet loss rate and also compared with the existing uniform traffic pattern. In addition to this, we have also studied the performance of the non uniform traffic pattern with the uniform traffic pattern of various packet sizes. Under non-uniform traffic pattern, packet loss rate is very much reduced compared to the uniform traffic pattern and more number of packets has been transmitted for the same period of time.

USM, PULAU PINANG, 14 Mac 2018 – Lima pensyarah Universiti Sains Malaysia (USM) telah
\nmemenangi pingat dalam pertandingan sempena Ekspo Inovasi Islam (i-INOVA) 2018 yang
\nberlangsung pada 10-11 Mac lalu di Dewan Tuanku Canselor Universiti Sains Islam Malaysia (USIM),
\nBandar Baru Nilai, Negeri Sembilan.
\nIa merupakan kemenangan 100% kepada USM kerana kelima-lima produk/teknologi yang
\ndipertandingkan telah memenangi anugerah dan pingat.

Pipelined circuit switching: Analysis for the torus with non-uniform traffic

Several analytical models have recently been proposed for circuit-switched interconnect networks under the uniform traffic pattern. However, there has been hardly any model reported yet that deals with other important non-uniform traffic patterns, such as hot-spots. This paper presents a new mathematical model to capture the mean message latency in the torus interconnect network with circuit switching in the presence of hot-spot. Simulation experiments demonstrate close agreement between the observed network behavior and those obtained by the analytical model.

A novel high-performance packet-switching architecture, called the knockout switch, has been recently proposed. It is a nonblocking, cost-effective switch suitable for broadband packet switching. The authors give equations which can be used to derive the packet loss probability and investigate the knockout switch under various uniform traffic patterns. They also compare the knockout switch with the multistage switch under various nonuniform traffic patterns. >

The authors describe a simple adaptive routing scheme for datagram (connectionless) and virtual circuit (connection-oriented) transmission that relieves congestion resulting from nonuniform traffic patterns and network failures. The authors describe a fixed-routing algorithm for dedicated channel ShuffleNets. Based on the fixed routing algorithm, an adaptive routing scheme for datagram transmission is presented followed by performance results for uniform and nonuniform traffic patterns and fault tolerance. The adaptive routing of datagrams uses only the local queue size information available at the network interface units (NIUs) and redistributes the load as congestion develops. Since datagrams are individually routed through the network, they may not arrive at their destination in the order they were generated and may need to be resequenced. The authors compute an upper estimate on the resequencing buffer size for stream traffic. A virtual circuit version of the adaptive routing algorithm eliminates the need for resequencing buffers.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Interconnection network front-end controller combining to reduce hot spots effects

Performance of ATM switch fabric using cross-point buffers

Communication delay in hypercubes in the presence of bit-reversal traffic

Fully adaptive routing with less virtual channels is of technical trend in MPP interconnection network design. However imbalance of load offsets performances of many schemes. In this paper we give a fully adaptive load balanced routing algorithm cabled VBMAR. A new design tool called crossed turn model (CTM) is proposed to solve complex deadlock problems across virtual networks while keeping the load balanced. Non-deterministic finite automaton (NDFA) is used to model the routing process. The resulting algorithm features routing uniformity and channel priority concurrent architecture and parallel priority channel searching techniques are used in VBMAR router design, which make it cost efficient. Four algorithms are compared to evaluate the performance of VBMAR. Simulations show that VBMAR can considerably increase network throughput and shorten network delay under both uniform and nonuniform traffic patterns. We argue that VBMAR is a very competitive routing scheme for future commercial MPP systems.

In this paper, we present the performance analysis of the 32×32 crosspoint queued (CQ) switch. The CQ switch architecture has been recently brought back into focus since modern technology enables an easy implementation of large buffers in crosspoints. An advantage of this solution is the absence of credit based control communication between linecards and schedulers. In this paper, the performances of four algorithms (longest queue first, round robin, exhaustive round robin and frame based round robin matching), are analyzed and compared. The results obtained for the CQ switch are compared with the output queued switch. Throughput, average cell latency and instantaneous packet delay variance are evaluated under uniform and nonuniform traffic patterns. Also, original iterative method for CQ switch throughput calculation under the uniform traffic is presented. The results will show that the longest queue first algorithm has the highest throughput in many simulated cases, but the highest average cell latency and delay variance among observed algorithms. It will also be shown that the choice of the scheduling algorithm does not play a role in the switch performance if the buffers are long enough. This will prove that some form of round robin based algorithms become a better choice for implementation due to their simplicity, small hardware requirements and avoidance of the starvation problem, which is a major drawback of the longest queue first algorithm. The proposed iterative method for throughput calculation gives results very close to the results obtained by numerous simulations, especially for larger switch and long buffers.

This paper proposes a scheme for pump-wavelength selection in an optical packet switch (OPS) with parametric wavelength converters (PWCs). In this scheme, pump wavelengths can be dynamically changed in all time slots, and more than one PWC is allowed to convert a wavelength in a chained manner. The objective of this scheme is to minimize the packet loss rates of the OPS. This scheme is called dynamic pump-wavelength selection with chained parametric wavelength conversion (DPS-C). DPS-C selects the pump wavelength for each PWC so as to maximize the number of successful requests, which refer to packets that wish to be forwarded to their requested output fibers. A PWC, which has the advantage of multiple wavelength conversion, uses a pump wavelength that can be flexibly chosen to define which wavelengths can be converted from/to. The set of original and converted wavelengths, where the pump wavelength is set in the middle of the two wavelengths, is called the conversion pair. Each PWC supports several conversion pairs. The OPS allows each wavelength to be converted using combinations of available conversion pairs, which are not used by any requests, from more than one PWC. A simulation shows that DPS-C outperforms the conventional scheme in terms of packet loss rates in both uniform and nonuniform traffic patterns.

An output queueing analysis of multipath ATM switches

In video-on-demand (VOD) systems, as the size of the buffer allocated to user requests increases, initial latency and memory requirements increase. Hence, the buffer size must be minimized. The existing static buffer allocation scheme, however, determines the buffer size based on the assumption that the system is in the fully loaded state. Thus, when the system is in a partially loaded state, the scheme allocates a buffer larger than necessary to a user request. This paper proposes a dynamic buffer allocation scheme that allocates to user requests buffers of the minimum size in a partially loaded state as well as in the fully loaded state. The inherent difficulty in determining the buffer size in the dynamic buffer allocation scheme is that the size of the buffer currently being allocated is dependent on the number of and the sizes of the buffers to be allocated in the next service period. We solve this problem by the predict-and-enforce strategy, where we predict the number and the sizes of future buffers based on inertia assumptions and enforce these assumptions at runtime. Any violation of these assumptions is resolved by deferring service to the violating new user request until the assumptions are satisfied. Since the size of the current buffer is dependent on the sizes of the future buffers, the size is represented by a recurrence equation. We provide a solution to this equation, which can be computed at the system initialization time for runtime efficiency. We have performed extensive analysis and simulation. The results show that the dynamic buffer allocation scheme reduces initial latency (averaged over the number of user requests in service from one to the maximum capacity) to 1 ÷ 29.4 n 1 ÷ 11.0 of that for the static one and, by reducing the memory requirement, increases the number of concurrent user requests to 2.36 ∼ 3.25 times that of the static one when averaged over the amount of system memory available. These results demonstrate that the dynamic buffer allocation scheme significantly improves the performance and capacity of VOD systems.

Because of their ability of nonblocking and fault tolerance, multistage-multipath networks provide useful characteristics for ATM switches and large-scale parallel computers. In this paper an analytical model for the analysis of ATM switches based on multistage-multipath packet switching interconnection networks with finite buffering capacity at the output of switching elements is presented. The proposed model is general in that it analyzes ATM switches under uniform and nonuniform traffic. First, a general model of synchronous buffered switching element, using output buffering, under an assumption of finite buffer size for a very general class of traffic patterns, is presented. It is assumed that the subsequent stages of the network are nearly independent, and a model is extended for the entire network under this assumption. The analytical results obtained with the proposed model are then compared with the results obtained for single path networks, and it is shown that the model is general enough for the class of multipath networks.