The knockout switch under nonuniform traffic

In this paper, we present the performance analysis of bufferless slotted optical packet switching using non uniform traffic pattern. The mathematical analysis has been done to evaluate the packet loss rate and also compared with the existing uniform traffic pattern. In addition to this, we have also studied the performance of the non uniform traffic pattern with the uniform traffic pattern of various packet sizes. Under non-uniform traffic pattern, packet loss rate is very much reduced compared to the uniform traffic pattern and more number of packets has been transmitted for the same period of time.

Pipelined circuit switching: Analysis for the torus with non-uniform traffic

This paper presents a unified model for analyzing multistage interconnection networks with multi-queue buffered strategies. Buffering strategies include SAFC (statically allocated fully connected), SAMQ (statically allocated multi-queue), DAMQ (dynamically allocated multi-queue), and DAFC (dynamically allocated fully connected) schemes. We develop a unified model to evaluate the performance of all these buffer allocation schemes under both uniform and nonuniform traffic patterns. The analytical model is validated through extensive simulations. Using the unified model, we conducted performance comparisons on the four buffer allocation schemes. It is shown that the DAFC scheme has the best performance over all the four buffer allocation schemes under both uniform and nonuniform loads.

USM, PULAU PINANG, 14 Mac 2018 – Lima pensyarah Universiti Sains Malaysia (USM) telah
\nmemenangi pingat dalam pertandingan sempena Ekspo Inovasi Islam (i-INOVA) 2018 yang
\nberlangsung pada 10-11 Mac lalu di Dewan Tuanku Canselor Universiti Sains Islam Malaysia (USIM),
\nBandar Baru Nilai, Negeri Sembilan.
\nIa merupakan kemenangan 100% kepada USM kerana kelima-lima produk/teknologi yang
\ndipertandingkan telah memenangi anugerah dan pingat.

Communication delay in hypercubes in the presence of bit-reversal traffic

Several analytical models have recently been proposed for circuit-switched interconnect networks under the uniform traffic pattern. However, there has been hardly any model reported yet that deals with other important non-uniform traffic patterns, such as hot-spots. This paper presents a new mathematical model to capture the mean message latency in the torus interconnect network with circuit switching in the presence of hot-spot. Simulation experiments demonstrate close agreement between the observed network behavior and those obtained by the analytical model.

The authors describe a simple adaptive routing scheme for datagram (connectionless) and virtual circuit (connection-oriented) transmission that relieves congestion resulting from nonuniform traffic patterns and network failures. The authors describe a fixed-routing algorithm for dedicated channel ShuffleNets. Based on the fixed routing algorithm, an adaptive routing scheme for datagram transmission is presented followed by performance results for uniform and nonuniform traffic patterns and fault tolerance. The adaptive routing of datagrams uses only the local queue size information available at the network interface units (NIUs) and redistributes the load as congestion develops. Since datagrams are individually routed through the network, they may not arrive at their destination in the order they were generated and may need to be resequenced. The authors compute an upper estimate on the resequencing buffer size for stream traffic. A virtual circuit version of the adaptive routing algorithm eliminates the need for resequencing buffers.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

This paper proposes a scheme for pump-wavelength selection in an optical packet switch (OPS) with parametric wavelength converters (PWCs). In this scheme, pump wavelengths can be dynamically changed in all time slots, and more than one PWC is allowed to convert a wavelength in a chained manner. The objective of this scheme is to minimize the packet loss rates of the OPS. This scheme is called dynamic pump-wavelength selection with chained parametric wavelength conversion (DPS-C). DPS-C selects the pump wavelength for each PWC so as to maximize the number of successful requests, which refer to packets that wish to be forwarded to their requested output fibers. A PWC, which has the advantage of multiple wavelength conversion, uses a pump wavelength that can be flexibly chosen to define which wavelengths can be converted from/to. The set of original and converted wavelengths, where the pump wavelength is set in the middle of the two wavelengths, is called the conversion pair. Each PWC supports several conversion pairs. The OPS allows each wavelength to be converted using combinations of available conversion pairs, which are not used by any requests, from more than one PWC. A simulation shows that DPS-C outperforms the conventional scheme in terms of packet loss rates in both uniform and nonuniform traffic patterns.

Combined input-crosspoint buffered (CICB) packet switches have been of research interest in the last few years because of their high performance. These switches provide higher performance than input-buffered (IB) packet switches while requiring the crosspoint buffers run at the same speed as that of the input buffers in IB switches. Recently, it has been shown that CICB switches with one-cell crosspoint buffers, virtual output queues, and simple input and output arbitrations, provide 100% throughput under uniform traffic. However, it is of general interest to know the maximum throughput that a CICB switch, with no speedup, can provide under admissible traffic. This paper analyzes the throughput performance of a CICB switch beyond uniform traffic patterns and shows that a CICB switch with one-cell crosspoint buffers can provide 100% throughput under admissible traffic while using no speedup.

Because of their ability of nonblocking and fault tolerance, multistage-multipath networks provide useful characteristics for ATM switches and large-scale parallel computers. In this paper an analytical model for the analysis of ATM switches based on multistage-multipath packet switching interconnection networks with finite buffering capacity at the output of switching elements is presented. The proposed model is general in that it analyzes ATM switches under uniform and nonuniform traffic. First, a general model of synchronous buffered switching element, using output buffering, under an assumption of finite buffer size for a very general class of traffic patterns, is presented. It is assumed that the subsequent stages of the network are nearly independent, and a model is extended for the entire network under this assumption. The analytical results obtained with the proposed model are then compared with the results obtained for single path networks, and it is shown that the model is general enough for the class of multipath networks.

Since the asynchronous transfer mode (ATM) has been strongly promoted as the transport structure for broadband integrated services digital networks, a variety of ATM switching architectures have been proposed. The knockout switch, which is one of the well known ATM switches, has a single-stage architecture and adopts an output buffering method. It has excellent traffic performance (cell loss probability, maximum throughput and delay, etc.), but needs many switch elements and buffers. The authors propose an ATM switch, called a knockout switch with input buffers. The proposed switch has almost the same traffic performance as the existing knockout switch but needs fewer switch elements and buffers than the existing knockout switch. The authors analyse the traffic performance and complexity (i.e. the number of switch elements and buffers required) of the proposed architecture by discrete-time Markov chain models and compare them with those of the existing knockout switch. It is found that the proposed architecture could reduce the need for over 40% of the switch elements and over 30% of the buffers while satisfying the given loss requirements.

In this paper, we present the performance analysis of the 32×32 crosspoint queued (CQ) switch. The CQ switch architecture has been recently brought back into focus since modern technology enables an easy implementation of large buffers in crosspoints. An advantage of this solution is the absence of credit based control communication between linecards and schedulers. In this paper, the performances of four algorithms (longest queue first, round robin, exhaustive round robin and frame based round robin matching), are analyzed and compared. The results obtained for the CQ switch are compared with the output queued switch. Throughput, average cell latency and instantaneous packet delay variance are evaluated under uniform and nonuniform traffic patterns. Also, original iterative method for CQ switch throughput calculation under the uniform traffic is presented. The results will show that the longest queue first algorithm has the highest throughput in many simulated cases, but the highest average cell latency and delay variance among observed algorithms. It will also be shown that the choice of the scheduling algorithm does not play a role in the switch performance if the buffers are long enough. This will prove that some form of round robin based algorithms become a better choice for implementation due to their simplicity, small hardware requirements and avoidance of the starvation problem, which is a major drawback of the longest queue first algorithm. The proposed iterative method for throughput calculation gives results very close to the results obtained by numerous simulations, especially for larger switch and long buffers.

Fully adaptive routing with less virtual channels is of technical trend in MPP interconnection network design. However imbalance of load offsets performances of many schemes. In this paper we give a fully adaptive load balanced routing algorithm cabled VBMAR. A new design tool called crossed turn model (CTM) is proposed to solve complex deadlock problems across virtual networks while keeping the load balanced. Non-deterministic finite automaton (NDFA) is used to model the routing process. The resulting algorithm features routing uniformity and channel priority concurrent architecture and parallel priority channel searching techniques are used in VBMAR router design, which make it cost efficient. Four algorithms are compared to evaluate the performance of VBMAR. Simulations show that VBMAR can considerably increase network throughput and shorten network delay under both uniform and nonuniform traffic patterns. We argue that VBMAR is a very competitive routing scheme for future commercial MPP systems.

Performance of ATM switch fabric using cross-point buffers

Most Network-on-Chip routers dedicate a set of buffers to the input and/or output ports. This design decision leads to buffer underuti-lization especially when running applications with non-uniform traffic patterns. In order to maximize resource usage for performance and energy gains, we present a synchronous and elastic buffer implementation of a router architecture called Roundabout with intrinsic resource sharing. Roundabout is inspired by real-life traffic roundabouts and consists of lanes shared by multiple input and output ports. Roundabout offers performance improvement of 61% for uniform traffic pattern and up to 88% for non-uniform traffic pattern over the Hermes router, a typical input buffered router. In terms of power, it consumes 24% less than the Hermes router. Roundabout provides a highly parametric architecture that can produce different router configurations with varying topological trade-offs for performance gains without sacrificing area.