Frequency Multiplier-Based Millimeter-Wave Vector Signal Transmitter Using Digital Predistortion With Constrained Feedback Bandwidth

This article first analyzes the nonlinear behavior of frequency-multiplier (FM)-based radio frequency (RF) beamforming transmitters TXs) over a wide range of steering angles. Then, based on this analysis, a digital predistortion (DPD) scheme is proposed to linearize FM-based TX arrays. Specifically, a dual-input behavioral model of FM-based TX arrays is derived. This dual-input model is then transformed into an angle-dependent single-input–single-output (SISO) model. Next, the effect of load modulation on FM nonlinearity is studied using a circuit-inspired behavioral model, and a very distinctive feature is revealed. Notably, it is shown that FM-based RF beamforming arrays have reduced sensitivity to load modulation when compared to last-stage power-amplifier (PA)-based arrays. This is first validated in simulation using a frequency doubler and PA terminated with load impedances extracted from an 8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 8 electromagnetically simulated array. Furthermore, experimental results are obtained using a 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 2 planar frequency-doubler-based RF beamforming TX operated at 28 GHz and driven with up to 400-MHz-wide orthogonal frequency-division multiplexing (OFDM) signals where the subcarriers are modulated using up to 256-QAM. It is experimentally demonstrated that a single set of SISO DPD coefficients can significantly improve the adjacent channel power ratio (ACPR) and error vector magnitude (EVM) over a wide steering range. Specifically, for the case of a 100-MHz signal, the ACPR and EVM improved from 20 dBc and 23% to, at worst, 48 dBc and 1%, respectively, when the array is steered from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-40^\circ $ </tex-math></inline-formula> to 40° and measured along the main beam direction. In light of the FM-based arrays reduced sensitivity to load modulation, this article also investigates different TX observation receiver (TOR) methods for DPD function training, namely, far-field-based TOR, coupler-based TOR, and single-element-based TOR, and their impacts on the linearizability of the FM-based RF beamforming TXs.

This paper demonstrates a novel transmitter architecture based on frequency quadrupling, in which modulated signals are generated at a frequency f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> , and subsequently up-converted to 4f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> using a frequency quadrupler. This technique is a promising architecture for mm-wave communications, at frequencies where signal amplification, modulation and distribution at 4f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> are challenging. To achieve acceptable output signal accuracy, predistortion of the input is mandatory. In this work, we validate the architecture using a low (microwave) demonstration frequency of f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> = 890MHz, with 4f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> =3.56GHz. High-order modulation signals are directly applied to a quadrupler, and "quadrupling digital predistortion" (Q-DPD) is used to restore the signal modulation format at the output. With a 5MHz bandwidth 256-QAM signal, before predistortion the output signal has an error vector magnitude (EVM) of 138%. After Q-DPD, the 256-QAM output signal has an EVM of 1.8% and adjacent channel power ratio (ACPR) of around -43dBc.

Proposed is a mirror-switching digital predistortion (DPD) scheme with low complexity and full resolution, tailored for power-efficient polar-modulated power amplifiers with nonlinear AM-AM and AM-PM characteristics. The involved digital circuitry is composed of just one CORDIC operator and two 1D look-up tables, avoiding any real-time interpolation or analogue operation. The DPD scheme is verified on a FPGA and the estimated power using a 65 nm CMOS technology is 5.2 mW. The training time is ∼82 µs at a clock rate of 100 MHz. System-level simulations in MATLAB show significant improvements of error vector magnitude from 104.8 to 2%, and adjacent channel leakage ratio from 21.36 to 49.27 dB, under a 20 MHz-bandwidth 64-QAM OFDM test signal.

This paper proposes a digital predistortion (DPD) scheme devised to improve the quality of wideband digitally modulated signals generated using frequency doubler based high frequency sources. The proposed DPD consists of two modules, which are configured to tackle the nonlinearity exhibited by frequency doublers when driven with high peak-to-average-power ratio (PAPR) signals. The first module is a memoryless (ML) polynomial describing function with a square root basis to mitigate the squaring transformation of the input envelope signal to the frequency doubler. The second module consists of a pruned Volterra-series based model, which is incorporated to mitigate residual distortions. The proposed DPD scheme was validated by linearizing an active frequency doubler with its output centered at 25 GHz when stimulated with orthogonal frequency division multiplexing signals with modulation bandwidths of 160 MHz and 320 MHz, and PAPRs of 8.6 dB. When both modules of the proposed DPD scheme are set to be ML with nonlinearity orders of 4 and 6, the linearized frequency doubler exhibited normalized mean squared errors (NMSEs) of −28 dB, −26 dB and adjacent channel power ratios (ACPRs) of 50/47 dBc, 42/39 dBc for modulation bandwidths of 160 MHz and 320 MHz, respectively. By only adding memory distortion terms to the second module, the NMSEs significantly decreased from −28 dB to −35 dB for the 160 MHz case and from −26 dB to −32 dB for the 320 MHz case. For both cases, the ACPRs became more balanced after adding memory terms to the second module.

An under-sampling digital predistortion based on a multi-tone mixing feedback technique (MTM-DPD) is presented in this article. In contrast to the under-sampling digital predistortion (DPD) based on conventional receivers, the proposed method could simultaneously reduce the sampling rate and acquisition bandwidth using a multi-tone mixing (MTM)-based feedback channel. The MTM-DPD is implemented with an evolved direct learning architecture, where the coefficients of a predistorter are estimated based on the aliased feedback signal, preprocessed input signal, and preprocessed kernels of the DPD model. To preprocess the input signal and kernels, the behavioral model of the MTM-based feedback channel and its corresponding identification algorithm are analyzed in detailed. Experimental results show that for a gallium nitride (GaN)-based power amplifier (PA) with 40-MHz input, under the excitation of a 17 tone LO signal with frequency interval 7.68 MHz, the MTM-DPD with sampling rate 15.36 MSPS and acquisition bandwidth 15.36 MHz could improve the adjacent channel power ratio (ACPR) from −30.1 to −46.5 dBc and the error vector magnitude (EVM) from 9.13% to 1.76%. Compared with the conventional full sampling DPD (FS-DPD), the MTM-DPD could reduce the cost of analog-to-digital converters (ADCs) in feedback channel significantly while maintaining satisfactory linearization performance.

Cascaded digital predistortion can reduce the pre-distorter model complexity while keeping the linearization performance. This paper evaluates the performance of cascaded DPD with a high nonlinear power amplifier (PA). A 2-stage memory polynomial (MP) model DPD structure is analyzed and compared with a single stage MP and generalized memory polynomial (GMP) model DPD. The linearization performances of the identified DPDs are evaluated in terms of improvement on adjacent channel power ratio (ACPR) and error vector magnitude (EVM). Tests are done on a Doherty power amplifier with a Long Term Evolution-Advanced (LTE). The computational complexity and the convergence speed of the DPD identification are discussed.

High-symbol-rate coherentoptical transceivers suffer more from the critical responses of transceiver components at high frequency, especially when applying a higher order modulation format. We recently proposed a neural network (NN)-based digital pre-distortion (DPD) technique trained to mitigate the transceiver response of a 128 GBaud optical coherent transmission system. In this paper, we further detail this work and assess the NN-based DPD by training it using either a direct learning architecture (DLA) or an indirect learning architecture (ILA), and compare performance against a Volterra series-based ILA DPD and a linear DPD. Furthermore, we deliberately increase the transmitter nonlinearity and compare the performance of the three DPDs schemes. The proposed NN-based DPD trained using DLA performs the best among the three contenders. In comparison to a linear DPD, it provides more than 1 dB signal-to-noise ratio (SNR) gains at the output of a conventional coherent receiver DSP for uniform 64-quadrature amplitude modulation (QAM) and PCS-256-QAM signals. Finally, the NN-based DPD enables achieving a record 1.61 Tb/s net rate transmission on a single channel after 80 km of standard single mode fiber (SSMF).

We consider digital predistortion (DPD) for linearizing power amplifiers (PAs) of hybrid MIMO systems with subarrays. Designing such a DPD scheme is difficult because one DPD should linearize all PAs of a subarray whose beamforming coefficients are time-varying. We develop an adaptive DPD technique for each subarray based on direct learning method minimizing the sum of squared errors between the input and output signals of PAs. Use of the least mean square (LMS) Newton algorithm is proposed to adaptively control the DPD parameters. It is shown that the proposed DPD can simultaneously linearize multiple PAs in a subarray irrespective of its beamforming coefficients. Computer simulation results demonstrate that the proposed scheme can perform better than an alternative scheme that designs the DPD based on one of the PA outputs and uses the resulting DPD for all PAs of the subarray.

Digital predistortion (DPD) technique is an effective means to alleviate the nonlinearity of power amplifiers (PAs) and improve transmitter efficiency. However, for orthogonal frequency division multiplexing (OFDM) systems with a high peak-to-average power ratio (PAPR), the PAPR reduction needs to be deployed in combination with DPD, to maximize transmitter efficiency. The extra complexity caused by the introduction of PAPR reduction on the main road has become a non-negligible defect. To address this issue, this letter proposes a joint PAPR reduction and DPD model based on the generalized memory polynomial (GMP). To train the joint GMP model, this letter improves the ping-pong joint optimization (P2JO) approach under the offline case, to obtain accurate training data. The comparative experimental results based on 100-MHz Doherty PA show that the proposed joint model significantly reduces the model complexity on the main road, while ensuring adjacent channel power ratio (ACPR) and bit error rate (BER).

Nonlinearity problems for power amplifiers are well known and many linearization techniques have been proposed in the literature, especially digital baseband predistortion. Orthogonal Frequency Division Multiplexing (OFDM) has a very high Peak-to-Average Power Ratio (PAPR), making it very sensitive to non linearities. We have chosen the Active Constellation Extension (ACE) to reduce the crest factor, which is not sufficient. In this paper, we show that the association of ACE with digital predistortion helps to improve the Adjacent Channel Power Ratio (ACPR) and so permits a good linearity improvement. The association is first validated in simulation. In measurements, for 42.5dBm RMS output power, which represents the nominal power, the ACPR is increased from 32dBc to 49dBc. For a given ACPR of 35dBc, the RMS output power is increased from 40.7dBm to 42.7dBm.

This paper presents the Direct Current (DC) power budget analysis and Radio Frequency (RF) frontend system design considerations of a medium Power Amplifier (PA) with average power output of 1watt. The PA system analysis is performed in a simulation environment for three linearization usage scenarios such as, Back-off, Digital Pre-Distortion (DPD) and Analog Pre-Distortion (APD) schemes. In the Back-off mode, the total RF frontend power consumption is 35.87 watt and with the usage of DPD topology the power consumption is 32.76 watt while with APD topology, the power consumption is 23.74 watt. The APD topology considers a Commercial off the Shelf (COTS) design topology with using moderately non-linear PA device operation. As compared to the back-off operation, the DPD scheme has got a 8.6% estimated relative power saving and the APD provides an estimated relative power saving of 33.8%.

A novel technique to linearize frequency multipliers for use in high-frequency transmission of digitally modulated signals is presented. Using this technique, a bandpass signal containing both amplitude and phase modulation can be translated without distortion to a higher frequency via nonlinear frequency multiplication. A theoretical analysis is performed to identify the bandpass transformation of the signal envelope in highly nonlinear devices in a manner such that its inverse transformation may be estimated. The theory was validated on a 2.46-GHz Schottky-diode frequency tripler constructed by the authors and on an 820-MHz commercially available frequency doubler. As predicted by the theory, the devices showed highly nonlinear characteristics in terms of their AM/AM, AM/PM, and PM/PM distortions. Adaptive lookup-table- and polynomial-based predistortion systems were designed and constructed to linearize the frequency multipliers. The predistortion results show a fair amount of improvements in adjacent-channel power ratio and error vector magnitude.

The design of conventional digital predistortion (DPD) requires an analogue-to-digital converter (ADC) with a sampling frequency that is multiple times the signal bandwidth, which is extremely challenging for sub-Nyquist sampling systems with undersampled signals. To address this, this paper proposes a neural network (NN)-assisted wideband power amplifier (PA) DPD method for sub-Nyquist sampling systems, wherein a dual-stage architecture is designed to handle the ambiguity caused by subsampled communications signals. In the first stage, the time-delayed polynomial reconstruction method is employed to estimate the wideband DPD nonlinearity coarsely with the undersampled signals with limited pilots. In the second stage, an NN-based DPD method is proposed for the virtual training of the DPD, which learns the up-sampled DPD behavior by taking advantage of the pre-estimated DPD model and the input data signals, which reduces the length of the training sequence significantly and refines the DPD behavior efficiently. Simulation results demonstrate the efficacy of the proposed method in tackling the wideband PA nonlinearity and its ability to outperform the conventional method in terms of power spectrum, error vector magnitude, and bit error rate.

This letter presents a bias-adjusted group digital predistortion (DPD) method to enhance linearization in multiple-input multiple-output (MIMO) transmitters with hybrid beamforming. By introducing a cross-normalized mean square error (CNMSE) metric, the nonlinearity consistency of multiple Doherty power amplifiers (DPAs) sharing radio frequency (RF) chains is quantitatively evaluated. A reference state is established using the worst-performing DPA, and the gate biases of other DPA are optimized to minimize CNMSE, aligning their nonlinear characteristics. This simplifies DPD training to a single-channel paradigm. Experiments with four DPAs under a 64-quadrature amplitude modulation (QAM) signal (200 MHz bandwidth) demonstrate a 6.77 dB adjacent channel power ratio (ACPR) improvement over the baseline and 4.51 dB gain versus conventional DPD, validating efficient multi-DPA linearization for resource-constrained MIMO systems.

A CMOS class-E outphasing RF power amplifier is presented with a new passive combining circuit that provides high efficiency and high output power. An efficiency enhancement circuit and a power enhancement circuit are proposed as part of the combiner that improve efficiency at power back-off and increase output power without violating reliability limits, respectively. The proposed power amplifier is designed in a 45nm CMOS technology. The power amplifier (PA) delivers 29.5 dBm peak output power at 2.4 GHz with 46.76% drain efficiency at peak output power, 32.96% drain efficiency at 3 dB power back-off, and 21.16% drain efficiency at 6 dB power back-off. The proposed power amplifier shows excellent linearity with digital pre-distortion. Better than -50 dBc adjacent channel power ratio (ACPR) is obtained with 64-QAM long-term evolution (LTE) signal with 10 MHz and 20 MHz bandwidth. For two-carrier 20 MHz LTE signal, -44 dBc ACPR is achieved. 21% average drain efficiency is obtained with LTE signal with a 6 dB peak-to-average power ratio. The PA is also tested with 802.11g WLAN signal and it satisfies the spectral mask requirement with high margin. 1.4% (-37.1 dB) error vector magnitude (EVM) is obtained with LTE signal (64-QAM) with a 10 MHz bandwidth.