Implementation strategies and return on investment for integrated CD control

Dual Damascene (DD) process has been implemented in manufacturing semiconductor devices with smaller feature sizes (<EQ 0.20 micrometer), due to increased use of copper as a metal of choice for interconnects. Copper is preferred over aluminum due to its lower resistance which helps to minimize the effects of interconnect delays. Via first DD process is the most commonly used process for manufacturing semiconductor devices since it requires less number of processing steps and also it can make use of a via fill material to minimize the resist thickness variations in the trench patterning photolithography step. Absence of via fill material results in non-uniform fill of vias (in isolated and dense via regions) thus leading to non-uniform focus and dose for exposure of the resist in the deep vias. This results in poor resolution and poor critical dimension (CD) control in the trench-patterning step. When a via fill organic material such as a bottom anti- reflective coating (BARC) is used, then the resist thickness variations are minimized thus enhancing the resolution and CD control in trench patterning. Via fill organic BARC materials can also act as etch blocks at the base of the via to protect the substrate from over etch. In this paper we review the important role of via fill organic BARCs in improving the efficiency of via first DD process now being implemented in semiconductor manufacturing.

Traditionally, lithography critical dimension (CD) measurements with stepper de-focus and deltas in sidewall angle do not correlate well with the ultimate product measurement, namely electrical performance. It is important in etch bias control, therefore, to control more than just the physical CD. It is at a minimum, important to show how the changes in sidewall angle control at lithography relate to etch biases. This is especially important as chip geometries shrink, and the size and shape of the sidewall becomes a larger portion of the line width geometry. This makes precise CD measurements coupled with slope angle measurements, in real time, important to process control in lithography so that ultimately the desired dimension is achieved at the post etch step, and therefore electrical performance can be gauged. We will present data taken from Focus/Exposure Matrices in the form of CD measurements, in-line sidewall angle reconstruction, and electrical measurements. We hope to correlate electrical performance to post develop CD and slope sidewall angle as measured without destructive cross sections.

Some of the major limitations of top surface imaging schemes are now well documented: critical dimension (CD) control across the wafer can be a serious issue as well as line edge roughness. A primary focus of our work has been to investigate the performance of the 248 nm bilevel negative tone approach of the chemical vapor deposition photoresist process based on the plasma polymerization of methylsilane. In this article, CD control data within a field and across the wafer are presented. CD control is shown to be very strongly dependent on the uniformity of the development step. The best results are obtained when using straight chlorine for the plasma etch development step.

As the design rule of lithography becomes smaller, accuracy and precision in Critical Dimension (CD) and controllability of pattern-shape are required in semiconductor production. Critical Dimension Scanning Electron Microscope (CD SEM) is an essential tool to confirm the quality of the mask such as CD control, CD uniformity and CD mean to target (MTT). Unfortunately, in the case of extremely rounded region of arbitrary enclosed patterns, CD fluctuation depending on Region of Interest (ROI) is very serious problem in Mask CD control, so that it decreases the yield. In order to overcome this situation, we have been developing 2-dimensonal (2D) method with system makers and comparing CD performance between mask and wafer using enclosed arbitrary patterns. In this paper, we summarized the results of our evaluation that compare error budget between 1-dimensonal (1D) and 2D data using CD SEM and other optical metrology systems.

The Semiconductor Industry Association (SIA) has placed stringent requirements on Next GenerationLithography mask critical dimension (CD) control. A new chemically amplified (CA) positive resist,Shipley XP2040D was evaluated for mask making application. This resist exhibited an extraordinary postexposure bake (PEB) sensitivity, less than 0.6 nm/ C, along with a sub-50 nm resolution. The PEB stabilityin ambient was larger than 4.5 hours and the line-edge-roughness (LER) was less than 2.9 nm. 1. INTRODUCTION Critical dimension (CD) control and uniformity for a SCALPEL mask must be kept within 7 nm (3 ) inorder to meet the SIA Roadmap requirement for 70 nm NGL mask fabrication [1]. Chemically amplified(CA) resists have been considered for NGL mask patterning because of their high resolution, high electronexposure sensitivity and etch selectivity. However, CD variation due to the PEB sensitivity of CA resistcomplicates the mask making process and needs to be minimized.Previous Finite Element Analysis modeling indicates there are PEB temperature gradients across a 200 mmSCALPEL mask and within each membrane of the mask. The thermal variations are due to the combinedcomplex three-dimensional mask structure coupled with the thermal gradients associated with the bakechamber environment. These gradients were experimentally confirmed through the measurement of criticalfeatures across various membranes on the mask array. A CD uniformity of 8-10 nm for inter-membrane and4-7 nm for intra-membrane was observed using a CA negative-tone resist, NEB22[2]. This CD variationwas mainly attributed to the large PEB sensitivity of the resist ( ~8 nm/ C).In order to meet the 7 nm SIA mask budget, CD non-uniformity due to thermal variations must be reduced.One way to minimize the influence of this thermal effect is to use low PEB sensitivity resists. This paperreports on the performance of Shipley XP2040D positive CA resist for 200 mm SCALPEL maskfabrication using the Leica VB6HR 100 KeV e-beam exposure system.

Due to the rapidly reduced imaging process windows and increasingly stingent device overlay requirements, sub-130 nm lithography processes are more severely impacted than ever by systamic fault. Limits on critical dimensions (CD) and overlay capability further challenge the operational effectiveness of a mix-and-match environment using multiple lithography tools, as such mode additionally consumes the available error budgets. Therefore, a focus on advanced process control (APC) methodologies is key to gaining control in the lithographic modules for critical device levels, which in turn translates to accelerated yield learning, achieving time-to-market lead, and ultimately a higher return on investment. This paper describes the implementation and unique challenges of a closed-loop CD and overlay control solution in high voume manufacturing of leading edge devices. A particular emphasis has been placed on developing a flexible APC application capable of managing a wide range of control aspects such as process and tool drifts, single and multiple lot excursions, referential overlay control, 'special lot' handling, advanced model hierarchy, and automatic model seeding. Specific integration cases, including the multiple-reticle complementary phase shift lithography process, are discussed. A continuous improvement in the overlay and CD Cpk performance as well as the rework rate has been observed through the implementation of this system, and the results are studied.

As pattern design rule of device shrinks, CD control becomes more critical and important especially for resistance devices. As CD (Critical Dimension) increases, CDU (Critical Dimension Uniformity) becomes worse generally. The question with this relationship is a starting point of our study. Mainly we focused on two points. One is which factor affects CDU. The other is whether CDU degradation with large CD happens at all cases or not. We have analyzed with simulation and experiment results about CDU with splitted mask layout CD under limited conditions such as same equipment, illumination and exposure dose. As a result, we will show the relationship between CD size and CDU.

In 32nm/22nm advanced technology node, double patterning lithography is considered for semiconductor manufacturing. It necessitates tightened requirement of overlay measurement, i.e. to measure the position of a pattern with respect to that of a pattern in the underlying layer. The measurement target design plays a fundamental role in overlay precision and accuracy. Typical alignment target, such as bar-in-bar or box-in-box (BIB), has precision, accuracy, and size restrictions. This prompts us to look into better alignment targets. Recently, scatterometry-based metrology and profile model capability have been extended to measure multi-level grating structures. In addition, scatterometry has been shown to be the best choice for integrated metrology to perform wafer-to-wafer control. Therefore, it makes sense to consider using scatterometry for overlay measurement. In this research, the modeling analysis is performed on the spectra taken directly from a real pattern area with grating-ongrating structure. The critical dimension (CD) at the grating on top and the lateral shift between the top and the bottom gratings can be detected simultaneously. The lateral shift between the layers can be verified with the traditional overlay box. Unlike the traditional BIB target that has micrometer CD size, the CD size of the scatterometry overlay (S_OVL) target is much closer to that on the real device. So, it can much better reflect the overlay (OVL) shift on real devices. We also studied the non-model-based S_OVL measurement using a 673-nm semiconductor laser with a 10&mu;m x 20&mu;m target size, wafer-to-wafer control of CD and lateral shifts on some critical layers with grating-on-grating structure, as well as the CD and OVL variations within layer and from layer to layer for double patterning.

For sub half-micron lithography, control of the Critical Dimension, represents the key to a robust and manufacturable process. The lithographer must understand and tune the exposure system for critical dimension performance using variables such as Numerical Aperture (NA), Partial Coherence (PC), position of the Focal Plane. Exposure tool must be characterized for its lens signature and the tools must be matched for their CD variation within the optical field In a previous study, we demonstrated that the phase-shift focal plane monitor, PSFM accurately measures focal plane variations when appropriate calibrations are employed. That paper also described the development of a model to determine lens classic aberrations such as Coma, Astigmatism and Field Curvature. The publication correlated the results to an approximation of the stepper's Critical Dimension (CD) behavior for a matrix of NA and PC settings. The present study, continues to study CD uniformity through examination of the lens aberrations and field focal signature of optical steppers in a 0.35 um process. We describe a method of measuring the uniformity of numerical aperture (NA) and partial coherence (PC) across the exposure field this new tool is then applied as an aid in optical lens characterization and tool-to-tool matching. The information gathered is thereupon applied to measure lens aberrations and predict CD variation across the field under various settings of the lens focal plane, the predictions are validated by a comparison against CD uniformity as measured by an advanced critical dimension metrology system.

As critical dimension (CD) control requirements increase and process windows decrease, it is now of even higher importance to be able to determine and separate the sources of CD error in an immersion cluster, in order to correct for them. It has already been reported that the CD error contributors can be attributed to two primary lithographic parameters: effective dose and focus. In this paper, we demonstrate a method to extract effective dose and focus, based on diffraction based optical metrology (scatterometry). A physical model is used to describe the CD variations of a target with controlled focus and dose offsets. This calibrated model enables the extraction of effective dose and focus fingerprints across wafer and across scanner exposure field. We will show how to optimize the target design and the process conditions, in order to achieve an accurate and precise de-convolution over a larger range of focus and dose than the expected variation of the cluster. This technique is implemented on an ASML XT:1900Gi scanner interfaced with a Sokudo RF^3S track. The systematic focus and dose fingerprints obtained by this de-convolution technique enable identification of the specific contributions of the track, scanner and reticle. Finally, specific corrections are applied to compensate for these systematic CD variations and a significant improvement in CD uniformity is demonstrated.

Real-time control is the trend for photoresist processing in the advanced lithography. In this paper we develop an in-situ ellipsometer integrated with a programmable thermal heating system, which could perform real-time monitoring and control for critical dimension (CD) latent image through the entire post-exposure bake (PEB) process. The inline ellipsometry measurements are fitted into an electromagnetic wave model built on the rigorous coupled-wave analysis (RCWA) theory for CD latent image characterization. Thereafter a real-time control scheme is proposed by applying the programmable thermal bake-plate. The experimental outcome demonstrates a significant improvement on the final CD result comparing to the conventional baking method.

Trilayer NbN/MgO/NbN tunnel junctions and Mo and NbN/sub x/ resistors fabricated over a NbN ground plane form the basis of a high performance, 10 K, superconductor integrated circuit foundry process. To produce high yield LSI and VLSI superconductor integrated circuits requires predictable device characteristics, stable, well-characterized, thin film deposition processes, and control of critical dimensions (CD). In this paper, we discuss improvements in thin film deposition processes, device characteristics, and CD control. Repeatable trilayer characteristics have been achieved through the use of feedback control of critical MgO and NbN sputtering parameters. Run-to-run variations in MgO film thickness have been reduced to less than /spl plusmn/1.0% (1/spl sigma/) using a novel computer feedback control technique. Improvements in MgO deposition uniformity and CD control of junction size have reduced across wafer I/sub c/ nonuniformity to less than /spl plusmn/10% (3/spl sigma/) and 100 junction array I/sub c/ nonuniformity on 0.5 cm chips to /spl plusmn/2% (1/spl sigma/). We report on the electrical characteristics of junctions and resistors and on component spreads and stability of our NbN foundry process.

OPC has become an indispensable tool used in deep sub-wavelength lithograph process enabling highly accurate CD (Critical Dimension) control as design rule shrinks. Rule based OPC was widely acceptable in the past, however it has recently turned toward model OPC according to the decreasing pattern size. Model based correction was first applied to the optical proximity phenomenon because the image of sub-wavelength pattern is distorted severely during the optical image transformation. In addition, more tight CD control required to compensate the process induced error effects from etch or other process as well optical image can be achieved. In this paper, we propose advanced OPC method to obtain better accuracy on the final target for sub-90nm technology. This advanced method converts measured CD data into final CD target by using an equation. We compared the results from the data converting method, suggested in this paper, with those from post-litho(DI), post-etch (FI) OPC model step by step. Finally we confirmed that advanced new OPC method gives better accuracy than that from conventional OPC model

As critical-dimension (CD) shrink below 0.18um, CD control becomes a major concern. Normally there are four approaches to improve CD control: to improve intra-field, intra-wafer, inter-wafer and inter-lot CD uniformity. In this paper, we propose a simple method to improve intra-wafer CD uniformity by optimize developing recipe. In DUV photolithography, intra-wafer CD variation is the major contributor to the overall CD variations. However there are many factors that may impact intra-wafer CD uniformity: Photoresist thickness uniformity, PEB uniformity, wafer surface roughness, substrate reflectivity and developing uniformity, so the situation become very complicated. In our studies, we tried to focus mainly on the developing uniformity of DUV process. To isolate the impact of developing method from other process factors, we proposed a simple method to check developing rate (Rmin) uniformity by photoresist thickness measurement. With this method, we had save a lot of time and manpower in developing recipe tuning and also had a deeper understanding of developing process of DUV resist.

As device size is going under the sub-60 nanometer scale, lithography is facing its resolution limit. To solve this resolution limit it has been suggested that one critical device layer could be made from multi photo/etch process, which needs tighter overlay and critical dimension (CD) controls than normal single exposure process. For CD control in this multi photo/etch process, the problem is that we do not know which pattern is made from which photo/etch process after final process. This makes it impossible to measure the specific process pattern's CD independently. In this case the conventional CD measuring method, which measures multi CDs in FOV(Field Of View) of SEM(Scanning Electronic Microscope) and control their average and distribution, couldn't know the average difference between both patterns because the variance from simply measured multi CD is just sum of each variance and their cross terms not including the average difference. In this paper it is pointed out the statistical problem of classical multi CD measurement in the indistinguishable multi-process pattern and a compensative method is suggested with a new statistical formula.