Low-Power Optical Interconnects based on Resonant Silicon Photonic Devices

We are delighted to introduce a Special Issue on Optical Interconnects for the IET Optoelectronics magazine. This issue presents the current status as well as some of the outstanding progress that has been witnessed in the rapidly evolving area of optical interconnects. Today, data centres (DC) and high-performance computers are struggling with limited interconnect capacity and increased power consumption while trying to meet overwhelming bandwidth demands. As photonics technologies have been rapidly maturing, optical interconnects have come into the spotlight as the means to cope with the emerging bandwidth, energy, and capacity needs. As such, a wealth of photonic interconnect solutions across the DC hierarchy has unfolded, covering from electro-optic boards to transceiver development, on-chip and on-board switches and interconnects as well as novel noninvasive monitoring methods for light controlling for compensating thermal crosstalk, fabrication tolerances and unstable environmental conditions. At the same time, the increased penetration of optical interconnects in short-reach communications, such as board and chip levels, has triggered new challenges in photonics technologies calling for new innovations with respect to integration techniques and packaging methods. This Special Issue of IET includes integrated circuits, assembly techniques, systems-level architectures, and controlling methods related to short reach ‘chip-to-chip’, ‘in-the-box’, and ‘box-to-box’ communications. Specific areas covered by this special issue include: Silicon photonic transceiver technologies and flat DC topologies; High-speed electro-optic hosting boards and fast, energy-efficient electronics; DC switches and co-packaged optic (CPO) technologies; and Noninvasive controlling techniques for complex photonic integrated circuits. The four papers in this special section promote high-performance optical interconnect architectures and key technologies to tackle the rising bandwidth demands of DCs. They cover (a) co-packaged DC optics, (b) silicon technology transceiver modules and high-speed hosting boards for multisocket server board (MSB) interconnects and (c) automated controlling architecture for complex photonic systems; Items (b) and (c) draw from impressive achievements accomplished through the recently completed European H2020 Project ICT-STREAMS. This report written by C. Mickenberg tries to shed light on motivating factors behind co-packaged optics (CPO), the trade-offs involved and their potential impact on data centre network architectures. The article reviews the evolution of DC switch application-specific integrated circuit (ASICs) and DC optics, provides a future road map and finally discusses the potential impact of CPO on the network architecture. This topic is covered by two articles. The first, written by M. Morallis-Pegios, proposes using silicon photonics to advance interconnect throughput, socket connectivity and energy efficiency in MSB layouts by enabling a flat-topology wavelength division multiplexing (WDM) point-to-point optical MSB interconnect scheme. WDM silicon photonic transceivers coassembled with their electronic circuits achieving a 50-Gb/s line rate and 400-Gb/s aggregate data transmission are demonstrated. The article also proposes silicon photonic Arrayed Waveguide Grating Router (AWGRs) that can offer collision-less time-of-flight connectivity for up to 16 nodes. The second article covering that area is written by T. Lamprecht and reports on the development of electro-optic hosting boards for on-board transceiver subassemblies which is required to eventually form the Tb/s multi-socket onboard communication. The article also discusses the electrical interface as well as photonic board requirements, including the manufacturing technique and the assembly concept that was followed to deliver terabyte per second multichip optical communication. This article, written by F. Zanetto, introduces a novel dithering technique for real-time control of multiple cascaded photonic integrated devices, proposing a calibration-free strategy to support the development and real-life diffusion of increasingly complex photonic systems. The article elaborates on the implementation of a calibration-free automated control loop exploiting integral controllers to close a real-time feedback and stabilise the optimum working point of the employed photonic devices. The effectiveness of the proposed architectural approach is experimentally validated with the error-free routing and transmission of a 30-Gbit/s optical signal traversing a cascade of micro-ring resonator filters. All of the articles selected for this Special Issue present a wide variety of key topics and significant results addressing optical interconnects in high-performance data communication systems, including new progress on architectures, systems and packaging techniques as well as novel optimised controlling methods. As guest editors, we would like to thank all of the authors for their high-quality submissions that significantly contribute to the optical interconnect field. We would also like to thank the reviewers for their valuable and constructive technical comments that greatly enhance the Special Issue, because their feedback and comments ensure the high quality of the IET Optoelectronics Journal. We hope that this IET Special Issue will provide a useful reference of the state-of-the-art in optical interconnects to readers, and we anticipate such technological perspectives will stimulate new advancements and technological outcomes that will in turn enrich the growing field of optical interconnects. This work was supported by the E.C. through the H2020-ICT-STREAMS research project (688172).

A 640 Gb/s ultra-high speed optical switch interconnection system based on wavelength division multiplexing (WDM) is proposed as a Tbit/s ATM switch interconnection system for future B-ISDN. The proposed optical interconnection system uses WDM in the switch interconnection to avoid interconnection limitation. The system consists of 8 wavelengths (each carrying a 10 Gb/s signal), eight optical transmitter modules (Tx), and an 8/spl times/8 arrayed waveguide (AWG) optical router which interconnects the 8/spl times/8 80 Gb/s WDM signal and 8 wavelengths receiver modules (Rx). Using a highly statistical WDM optical link, the proposed system can attain nearly non-blocking ATM switch interconnection. There are several advantages to the proposed optical interconnection system. First, by adopting a arrayed waveguide filter with a wide-channel-spacing (525 GHz), the system has a wide temperature margin of 10 degrees. Second, by setting a clock data recovery circuit in each Rx module, each 10 Gb/s highway interconnect unit switch can function independently. As a result, the proposed system is highly scalable. We fabricate an optical interconnection prototype system and succeed in demonstrating a 640 Gb/s optical interconnection. The proposed optical interconnection system can be applied to realize future broadband ATM networks.

We review the state of the art and our perspectives on silicon and hybrid silicon photonic devices for optical interconnects in datacenters. After a brief discussion of the key requirements for intra-datacenter optical interconnects, we propose a wavelength-division-multiplexing (WDM)-based optical interconnect for intra-datacenter applications. Following our proposed interconnects configuration, the bulk of the review emphasizes recent developments concerning on-chip hybrid silicon microlasers and WDM transmitters, and silicon photonic switch fabrics for intra-datacenters. For hybrid silicon microlasers andWDM transmitters, we outline the remaining challenges and key issues toward realizing low power consumption, direct modulation, and integration of multiwavelength microlaser arrays. For silicon photonic switch fabrics, we review various topologies and configurations of high-port-count N-by-N switch fabrics using Mach–Zehnder interferometers and microring resonators as switch elements, and discuss their prospects toward practical implementations with active reconfiguration. For the microring-based switch fabrics, we review recent developments of active stabilization schemes at the subsystem level. Last, we outline several large challenges and problems for silicon and hybrid silicon photonics to meet for intra-datacenter applications and propose potential solutions. © 2015 Chinese Laser Press.

Silicon photonics (SiPh) are considered a promising technology for increasing interconnect speed and capacity while decreasing power consumption. Mode division multiplexing (MDM) enables signals to be transmitted in different orthogonal modes in a single waveguide core. Wideband MDM components simultaneously supporting wavelength division multiplexing (WDM) and orthogonal frequency-division multiplexing (OFDM) can significantly increase the transmission capacity for optical interconnects. In this work, we propose, fabricate and demonstrate a wideband and channel switchable MDM optical power divider on an SOI platform, supporting single, dual and triple modes. The switchable MDM power divider consists of two parts. The first part is a cascaded Mach–Zehnder interferometer (MZI) for switching the data from their original TE0, TE1 and TE2 modes to different modes among themselves. After the target modes are identified, mode up-conversion and Y-branch are utilized in the second part for the MDM power division. Here, 48 WDM wavelength channels carrying OFDM data are successfully switched and power divided. An aggregated capacity of 7.682 Tbit/s is achieved, satisfying the pre-forward error correction (pre-FEC) threshold (bit-error-rate, BER = 3.8 × 10−3). Although up to three MDM modes are presented in the proof-of-concept demonstration here, the proposed scheme can be scaled to higher order modes operation.

We discuss recent progress and challenges in realizing Bragg-grating devices on the submicron silicon-on-insulator platform for next-generation optical communications applications, such as on-chip optical interconnects and signal processing. In particular, we focus on grating-assisted, wavelength-selective couplers, known as contra-directional couplers (contra-DCs). In contrast to conventional two-port Bragg gratings operating in the reection mode, contra-DCs are four-port devices with very weak backreections and, therefore, can be easily integrated with other photonic components on a chip. In order to provide a reliable on-chip wavelength-division multiplexing (WDM) solution for high-speed optical interconnects, we have developed high-performance add-drop filters and, furthermore, wavelength multiplexers/demultiplexers with combined advantages of at-top responses, low insertion loss (< 1 dB), and low crosstalk (< -23 dB). These WDM devices are ultra-compact and highly tolerant to temperature uctuations (up to ±50 °C), showing great potential for large-scale integration and low-power consumption. We further discuss a novel four-port Bragg photonic resonator for high-speed, low-power optical switching. Using a coupler-chirped design with uniform Bragg gratings, we have recently achieved an on-chip, continuously tunable photonic delay line with low insertion loss. These system-orientated devices indicate great potential for large-scale integration of Bragg-grating-defined functions using CMOS-compatible silicon photonics technology.

In this paper, we address the problem of designing wavelength division multiplexing (WDM) optical interconnects with reduced hardware complexity. We propose a new WDM optical interconnect design that reduces both the number of space switches and the cost of wavelength conversion. Wavelength conversion in the proposed design occurs between two pre-defined wavelengths, eliminating the need for expensive wide-range wavelength converters used in most existing designs. In addition, the proposed design follows the recursive structure of the Benes network, and hence, scalability occurs in an orderly fashion. A systematic method for developing interconnects with arbitrary number of wavelengths and fibers is given, and the main properties of the new design are analyzed and compared with existing designs. We show that, the new design requires the minimum number of switching stages and space switches compared to any existing WDM Benes interconnect. Moreover, our design has minimum wavelength conversion cost compared to most existing designs.

The rapid scaling of microprocessor technologies has led to unprecedented advancements in processing speed and transistor density. However, as device dimensions shrink below the nanometre scale, traditional electrical on-chip interconnects face critical limitations including increased signal delay, power consumption, and reduced bandwidth. These challenges have emerged as major bottlenecks in the performance and energy efficiency of modern microprocessors, especially in multi-core and many-core architectures. To overcome these limitations, optical interconnects have gained significant attention as a high-performance alternative for on-chip and chip-to-chip communication. Optical interconnects offer key advantages such as higher data rates, lower latency, reduced power dissipation, and immunity to electromagnetic interference. The integration of optical components like waveguides, modulators, photodetectors, and silicon photonics within the chip architecture has the potential to revolutionize interconnect design by addressing the shortcomings of conventional electrical wiring. This paper explores the evolution of on-chip interconnects, comparing the performance, scalability, and integration challenges of electrical and optical solutions in scaled microprocessors. It also discusses emerging hybrid interconnect architectures that combine the strengths of both technologies. A comparison is made between electrical and optical interconnects for different design criteria, based on projections about the future of optical devices. Around a tenth of the length of the chip's edge is the crucial dimension beyond which optical connectivity becomes preferable to electrical interconnect at the 22 nm technological node.

With an intracavity phase tuning technique, the authors demonstrate <2 nm precision in wavelength setting of vertical-cavity surface-emitting laser (VCSEL) microresonators in the wavelength range 1040–1070 nm using an Ar ion-beam etching process with subnanometer precision in etch depth. This postgrowth fabrication technique for controlling the wavelength of individual VCSELs is promising for the development of monolithic multiwavelength VCSEL arrays with precisely defined wavelengths for wavelength division multiplexed (WDM) optical interconnects and the assembly of compact and high-capacity WDM transmitters.

Performance of Wavelength Division Multiplexing (WDM) System is analyzed using Dispersion Compensating Fiber. In this work, Optimized link of 8-channel WDM (Wavelength Division Multiplexing) system using OptiSystem is designed. Comparison of the link performance is investigated at different wavelength i.e. 980nm, 1300nm and 1550nm. The better Performance of the WDM link can be achieved at wavelength of 1550nm as compared to 1300 and 980nm using dispersion compensating fiber along with single mode fiber for link length of 105 km operating at data rate of 3Gb\s with 8-channel of WDM System. The BER, Q-factor and eye diagram have been used for evaluating the performance of the system.

In this chapter, we review the technical merits of silicon photonic devices and integrated circuits, which have benefited from high-index-contrast silicon waveguides, a high integration level of various optical functions on the same chip, and mature complementary metal-oxide semiconductor (CMOS) fabrication techniques. These technical merits assure silicon photonics as a disruptive optical technology that will achieve low-cost and compact optical modules for data communications, with applications such as chip-scale optical interconnects, short-reach communications in datacenters and supercomputers, and metro/long-haul optical transmissions. We discuss various applications in these fields, which may benefit from implementation in silicon photonics. In particular, we review silicon photonic circuits for wavelength-division multiplexing (WDM) transmitters, WDM receivers, coherent optical transmitters and coherent receivers, which all require photonic integration to reduce the cost and module size.

There is a rapidly increasing data flow between sensors and on-board processors in avionic platforms. Electro-optic (EO) sensors are moving to hyperspectral and radar to phased array to enable precision targeting, wide field of view surveillance and navigation. These trends call for next generation optical network technology which has to provide increasing high speed data transmission under harsh conditions. Recent developments go beyond simple point-to-point fiber links towards establishing optical distribution networks to deal with the data traffic [1]. A flexible and potentially low-cost implementation is the passive optical network (PON) which scales easily to increasing needs simply by upgrading the peripheral units without need to change the fiber connections and infrastructure. PONs are well established in the commercial access market with the increasing push to fiber-to-the-home (FTTH) technologies which has led to the development of a variety of low-cost devices for these networks. A key enabler in our development of an avionics PON is the reflective semiconductor optical amplifier (RSOA) which combines amplification and modulation into a single device [2]. The RSOA is a non-resonant device, thus wideband with the potential for ruggedness, especially high temperature operation with small or no need for cooling. At higher data rates up to 20 Gbps a related device, the reflective electro-absorption modulator with integrated amplification (R-SOA-EAM) can be used instead. To complete the adaptation we replaced the laser, commonly used to provide optical input power in a PON architecture with another non-resonant device, the superluminescent LED (SLED). To create upgrade flexibility we utilized wavelength division multiplexing (WDM) which allows addition and subtraction of channels without changing hardware. Coarse WDM (CWDM) was chosen over Dense WDM (DWDM) for two reasons: the large channel width (20nm) of CWDM reduces cost by relaxing fabrication tolerance and renders the use of temperature control unnecessary, thereby increasing reliability. The concept and current state of development of our optical network is described in this paper.

In this paper we present a computing system that uniquely leverages the bandwidth, density, and latency advantages of silicon photonic interconnects to enable highly compact supercomputerscale systems. We present the details of an optically enabled "macrochip" which is a set of contiguous, optically-interconnected chips that deploy wavelength-division multiplexed (WDM) enabled by silicon photonics. We describe the system architecture and the WDM point-to-point network implementation of a "macrochip" providing bisection bandwidth of 10 TBps and discuss system and device level challenges, constraints, and the critical technologies needed to implement this system. We present a roadmap to lowering the energy-per-bit of a silicon photonic interconnect and highlight recent advances in silicon photonics under the UNIC program that facilitate implementation of a "macrochip" system made of arrayed chips.

The soon to be deployed 5G systems are expected to cater an agglomerate of services at profuse data rates wirelessly. Radio over fiber (RoF) networks are the most suitable to implement such systems. In situations where the practical implementation of RoF systems are non-viable, radio over free space optical (RoFSO) links can be employed. The traditional wavelength division multiplexing (WDM) technology can be incorporated to multiply the data rates. However, the link performance may be degraded due to various atmospheric factors. This can be compensated using multiple input multiple output (MIMO) techniques. In this paper, the performance analysis of such a WDM RoFSO link for 5G frequencies is carried out. The work also presents quantitative performance comparison between single input single output (SISO) and MIMO RoFSO links for 5G systems which will be useful for researchers in this area. It is observed that, while WDM provides additional data capacity, it degrades the link performance under adverse weather conditions which can be counterbalanced using MIMO techniques.

Photonic integrated circuits (PICs) based on silicon-on-insulator (SOI) platform with the advantages of high-index-contrast and CMOS-compatible process can efficiently reduce the component sizes and densely integrate them at a chip scale. To meet the ever-increasing demand for the optical interconnect capacity, various multiplexing techniques have been used. However, it should still be proposed to effectively reduce the component size accompanied with the reasonable performance and wavelength division multiplexing (WDM) compatibility. To the best of our knowledge, there has no attempt so far to design a polarization demultiplexer based on a microring resonator in slot waveguide structures. In this paper, a compact silicon-based polarization demultiplexer is proposed, where two regular silicon-based waveguides are used as the input/output channels and a microring in slot waveguide structures is used as the polarization/wavelength-selective component. A full-vectorial finite-difference frequency-domain method is utilized to study the modal characteristics of the regular and slot silicon-based waveguides, where the effective indices and coupling for transverse magnetic (TM) and transverse electric (TE) modes are presented. With the unique modal characteristics of slot waveguides and the strong polarization-dependent features of microring resonator, we can show that the field distributions and the effective indices of the TM mode between the regular and slot waveguides are similar, while those of the TE mode show clearly different. As a result, the input TM mode outputs from the drop port at the resonant wavelength, while the input TE mode outputs from the through port directly with nearly neglected coupling, thus the two polarizations are separated efficiently. A three-dimensional finite-difference time-domain method is utilized to study the spectrum and transmission characteristics of the proposed device. From the results, a polarization demultiplexer with a radius of 3.489 m is achieved with the extinction ratio and insertion loss of ～ 26.12(36.67) dB and ～ 0.49(0.09) dB respectively for the TM(TE) mode at the wavelength of 1.55 m by carefully optimizing the key structural parameters. In addition, taking the fabrication errors into account during the practical process, the fabrication tolerances to the proposed device are analyzed in detail and the performance is assessed by the extinction ratio and insertion loss. For demonstrating the transmission characteristics of the designed polarization (de) multipexing (P-DEMUX) device, the evolution along the propagation distance of the input mode through the designed P-DEMUX is also presented. The present polarization demultiplexer is compatible with the WDM systems on-chip based on microring resonators and can be easily introduced into the WDM system to further increase the optical interconnect capacity.

Scaling of computing systems require ultra-efficient interconnects with large bandwidth density. Silicon photonics offers a disruptive solution with advantages in reach, energy efficiency and bandwidth density. We review our progress in developing building blocks for ultra-efficient WDM silicon photonic links. Employing microsolder based hybrid integration with low parasitics and high density, we optimize photonic devices on SOI platforms and VLSI circuits on more advanced bulk CMOS technology nodes independently. Progressively, we successfully demonstrated single channel hybrid silicon photonic transceivers at 5 Gbps and 10 Gbps, and 80 Gbps arrayed WDM silicon photonic transceiver using reverse biased depletion ring modulators and Ge waveguide photo detectors. Record-high energy efficiency of less than 100fJ/bit and 385 fJ/bit were achieved for the hybrid integrated transmitter and receiver, respectively. Waveguide grating based optical proximity couplers were developed with low loss and large optical bandwidth to enable multi-layer intra/inter-chip optical interconnects. Thermal engineering of WDM devices by selective substrate removal, together with WDM link using synthetic wavelength comb, we significantly improved the device tuning efficiency and reduced the tuning range. Using these innovative techniques, two orders of magnitude tuning power reduction was achieved. And tuning cost of only a few 10s of fJ/bit is expected for high data rate WDM silicon photonic links.