Low-power technologies in high-performance computer: trends and perspectives

Typically, a High Performance Computing (HPC) cluster loosely couples multiple Symmetric Multi-Processor (SMP) platforms into a single processing complex. Each SMP uses shared memory for its processors to communicate, whereas communication across SMPs goes through the intra-cluster interconnect. By analyzing the communication pattern of processes, it is possible to arrive at a mapping of processes to processors to ensure optimal communication paths for critical traffic. This critical traffic refers to the communication pattern of the program, which can be characterized by either frequency or size (or both) of the messages. To find an ideal mapping, it is imperative to understand the communication characteristics of the SMP memory system, intra-cluster interconnection, and the Message Passing Interface (MPI) program running on a cluster.Our approach is to study the ideal mapping for two classes of interconnects: 1) standard, high-volume Ethernet interconnects, and 2) proprietary, low-latency high-bandwidth interconnects. In the first installment of our work presented in this paper, we have focused on the ideal mapping for the first class.We configured a 16-node dual-processor cluster, interconnected with Fast Ethernet, Gigabit Ethernet, Giganet, and Myrinet. We used High Performance Linpack (HPL) benchmark to demonstrate that re-mapping of processes to processors (or changing the order of processors used) can affect the overall performance. The mappings are based on the HPL program analysis obtained from running a MPI profiling tool. Our results suggest that the performance of HPL using Fast Ethernet as the interconnect can be improved from 10% to 50% depending on the process mapping and the problem size. Conversely, an ad hoc mapping can adversely affect the cluster performance.

For the High Performance Linpack (HPL) benchmark at the coming Exascale and beyond, silent errors like bit flipping in memory are expected to become inevitable. However, since bit flipping errors are difficult to be detected and located, their impact to the numerical correctness of HPL has not been evaluated thoroughly and quantitatively, while the impact at Exascale is especially susceptible. In this paper, an initial quantitative analysis of the impact of bit flipping errors to the numerical correctness of HPL has been investigated. To validate the numerical correctness of computed solution using HPL, there is a residual check after the approximate solution obtained. This paper has shown that in the case of only one bit flipping to any element in the original data matrix, if the flipped position is not the leading position of exponent, the residual check in HPL will almost surely pass at the scale of Exa flops and beyond. Experiments on modified HPL in single precision at small scales have verified the theoretical results in double precision at Exascale. The results obtained in this paper can provide a better understanding to the impact of bit flipping errors to numerical correctness of scientific computing applications.

Summary form only given. The effect of Intel/spl reg/ hyper-threading (HT) technology on a system's performance varies according to the characteristics of the application running on the system and the configuration of the system. High performance computing (HPC) clusters introduce additional variables, such as the math libraries used in solving linear algebra equations that can affect the performance of scientific and engineering applications in particular. We study the effect of HT on MPI-based applications by varying the math library. We configure an Intel-based HPC cluster and used the High Performance Linpack (HPL) benchmark to study the performance characteristics without changing hardware or communication parameters, but by linking the application with different math libraries. What we have found is that, even though the application or hardware parameters remain the same, HT may help or hinder the overall performance of the cluster depending on the computational efficiency of the mathematical functions.

Aiming at realizing a high performance computing (HPC) cloud with vector supercomputers, this paper presents the world’s first prototype of wide-area vector meta computing infrastructure named a vector computing cloud by virtualizing remote vector computing resources as an HPC service over the Internet. The prototype system consists of two remote NEC SX-9 nodes connected through a long fat-pipe network (LFN), and each node is located at Tohoku University and Osaka University with a distance of 800 km. The vector computing cloud also provides a single sign on environment and jobs are automatically assigned to appropriate sites. Wide-area co-operation of distributed vector supercomputers is realized by adopting the NAREGI Grid Middleware, and a virtual machine for NEC SX vector supercomputer series, job scheduling algorithms, and an MPI operating environment are newly developed to enhance the job and resource management capabilities of the NAREGI Grid Middleware. In addition, to achieve fairness and efficient job scheduling on the vector computing cloud, this paper presents a history-based job scheduling mechanism for a queue system. Based on the estimation, the job scheduling mechanism automatically allocates the job to an appropriate site, which can execute the job earlier. The operation tests and experiment results indicate that the prototype system realizes single sign on for multiple vector resources and has enough potential for transparently operating jobs between the two SX-9 systems. This paper also evaluates and discusses the performance of the proposed job scheduling mechanism and MPI operation between both SX-9 systems using the High Performance Linpack (HPL) benchmark.

After 15 years of exponential improvement in microprocessor clock rates, the physical principles allowing for Dennard scaling, which enabled performance improvements without a commensurate increase in power consumption, have all but ended. Until now, most HPC systems have not focused on power efficiency. However, as the cost of power reaches parity with capital costs, it is increasingly important to compare systems with metrics based on the sustained performance per watt. Therefore we need to establish practical methods to measure power consumption of such systems in- situ in order to support such metrics. Our study provides power measurements for various computational loads on the largest scale HPC systems ever involved in such an assessment. This study demonstrates clearly that, contrary to conventional wisdom, the power consumed while running the high performance Linpack (HPL) benchmark is very close to the power consumed by any subset of a typical compute-intensive scientific workload. Therefore, HPL, which in most cases cannot serve as a suitable workload for performance measurements, can be used for the purposes of power measurement. Furthermore, we show through measurements on a large scale system that the power consumed by smaller subsets of the system can be projected straightforwardly and accurately to estimate the power consumption of the full system. This allows a less invasive approach for determining the power consumption of large-scale systems.

High-performance Linpack (HPL) benchmark is used to evaluate the performance of super computers. It implements blocked, right-looking Gaussian elimination with row partial pivoting. Block cyclic distribution is used in the parallel variant.In this paper, we implement the HPL in X10. X10 is a high level high-performance programming language based on the sequential semantics of Java augmented with new concurrency constructs, namely, places, asyncs, finish, atomic and clock. X10 also provides a rich array language which includes region, distributions and distributed arrays. We use HPL as a case study to evaluate the global view paradigm of X10. A global view program uses globally distributed arrays and global array indices without any process-specific code. We compare the elegance of global view programs over the local view version. We also show that the performance of global view program is no worse than the local view version.

Dense LU factorization has a high ratio of computation to communication and, as evidenced by the High Performance Linpack (HPL) benchmark, this property makes it scale well on most parallel machines. Nevertheless, the standard algorithm for this problem has non-trivial dependence patterns which limit parallelism, and local computations require large matrices in order to achieve good single processor performance. We present an alternative programming model for this type of problem, which combines UPC's global address space with lightweight multithreading. We introduce the concept of memory-constrained lookahead where the amount of concurrency managed by each processor is controlled by the amount of memory available. We implement novel techniques for steering the computation to optimize for high performance and demonstrate the scalability and portability of UPC with Teraflop level performance on some machines, comparing favourably to other state-of-the-art MPI codes.

This paper presents a description and the evaluation of the Netuno supercomputer, a high-performance cluster installed at Federal University of Rio de Janeiro in Brazil. The results for the High Performance Linpack (HPL) benchmark and two real applications are reported. Since building a high-performance cluster for running a wide range of applications is a non-trivial task, some lessons learned from assembling and operating this cluster, such as the excelent performance of the OpenMPI library, and the importance of the use an efficient parallel file system over the traditional NFS system, can be useful knowledge to support the design of new systems. Currently, Netuno is being heavily used to run large scale simulations in the areas of ocean modeling, meteorology, engineering, physics, and geophysics.

The probability that a failure will occur before the end of the computation increases as the number of processors used in a high performance computing application increases. For long running applications using a large number of processors, it is essential that fault tolerance be used to prevent a total loss of all finished computations after a failure. While checkpointing has been very useful to tolerate failures for a long time, it often introduces a considerable overhead especially when applications modify a large amount of memory between checkpoints and the number of processors is large. In this paper, we propose an algorithm-based recovery scheme for the High Performance Linpack benchmark (which modifies a large amount of memory in each iteration) to tolerate fail-stop failures without checkpointing. It was proved by Huang and Abraham that a checksum added to a matrix will be maintained after the matrix is factored. We demonstrate that, for the right-looking LU factorization algorithm, the checksum is maintained at each step of the computation. Based on this checksum relationship maintained at each step in the middle of the computation, we demonstrate that fail-stop process failures in High Performance Linpack can be tolerated without checkpointing. Because no periodical checkpoint is necessary during computation and no roll-back is necessary during recovery, the proposed recovery scheme is highly scalable and has a good potential to scale to extreme scale computing and beyond. Experimental results on the supercomputer Jaguar demonstrate that the fault tolerance overhead introduced by the proposed recovery scheme is negligible.

The study's objective was to develop a comprehensive definition for operational excellence (OE) while identifying its attributes, most suitable theoretical lens and dimensions. Attributes of OE were collected by evaluating 32 existing definitions of OE and interviewing 30 OE experts. A focus group interview with 15 OE experts was employed to consensus on the critical attributes and tentative dimensions of OE. Content analysis was employed for data analysis. Continuous improvement of sustainable operational performance, deriving sustainable competitive advantages and implementing the operation strategy consistently and reliably were determined as the critical attributes. Based on the identified critical attributes of OE, the Resource-Based Theory (RBT) was recognized as the most applicable theory for explaining OE. Based on the identified theoretical lens and identified critical attributes, the new definition of OE involves, ‘utilization of valuable, rare, costly to imitate and non-substitutable resources & capabilities to execute the operations strategy consistently and reliably as the organization can achieve: a continuous improvement of the sustainable operational performance and sustainable competitive advantages while upholding the satisfaction of employees, customers, suppliers and other important stakeholders.' Continuous improvement of sustainable operational performance and sustainable competitive advantages were determined as the possible dimensions of OE. 
 Keywords: Operational Excellence; Resource-Based Theory; Construct Definition, Operational Performance, Competitive Advantages

Despite long and successful development history of Solid Oxide Cells (SOC) continuous improvement in performance, longevity, manufacturing and system integration is necessary to bring this highly efficient technology to the market. The activities on material development and optimization at IKTS are focused mainly on enhancement of durability in SOFC, SOEC and rSOC operation and on boosting the power density for electrolysis operation. The recent results show considerable enhancement in cell longevity and power density.The SOC priorities in applied research are moving from materials to industrialization and Fraunhofer as applied R&D service provider is following this trend. During recent years considerable efforts on simplification and automation of cell and stack manufacturing processes has been addressed at IKTS. The manufacturing processes for electrode manufacturing have been adjusted for high yield automated printing on thin electrolytes with integrated quality control measures. The efficient ways for reduction of time and energy consumption for sealing process of SOC stacks have been found and shown in pilot production as well as automated assembling of components to stacks demonstrated. Furthermore the stack integration into modules utilizing stacks of different providers has been addressed during last years and reliable solutions for building of compact stack modules of higher power (2 to 10 kW) has been developed and tested with industrial partners.The increasing interest in “green hydrogen” generated multiple opportunities for SOEC technology to be considered as inherent part of industrial and chemical processes. IKTS pioneering work on coupled operation of SOEC module with Fischer-Tropsch reactor provided first demonstration of feasibility of this approach for waxes production. The process design and analysis of steel, using SOEC technology, has been performed and resulted in multiple demonstration activities in last four years. Recently novel approaches for ammonia production are addressed at IKTS showing opportunity for transportable chemicals/fuel production without need of CO2 source.High power electrolysis applications (>10 MW) will need new approaches for stack design and put higher requirements on durability. High power electrolysis applications will also open a new window of opportunities for industrial SOFC power plants. This vision is considered as outline for our future research.

With continuous improvements in performance of microprocessors over the years, they now possess capabilities of supercomputers of earlier decade. Further with the continuous increase in the packaging density on the silicon and General Purpose Graphics Processing Unit (GPGPU) enhancements, has led to utilization the deep learning (DL) techniques, which had lost steam during the last decade. A GPGPU is a parallel programming setup using a combination of GPUs and CPUs that can manipulate large matrices. Interestingly, GPUs were created for faster graphic processing, but found its way into relevant scientific computing. DL is a subset of the artificial intelligence (AI) domain and falls specifically under the set of machine learning (ML) techniques which are based on learning data representations rather than task‐specific algorithms. It has been observed that the accuracy and the pragmatism of deploying DL at massive level was restricted by technological issues of executing DL based AI models, with extremely large training sessions running into weeks. DL applications can solve problems of very large order and areas like computer vision/image processing is one of the early successes and becoming quite a sensation in many areas such as natural language processing (NLP) with state of the art real‐time translation capabilities, automatic game playing, optical character recognition especially handwritten text, and so on. This overview traverses the evolution and successful adoption in the various industry verticals.This article is categorized under: Application Areas > Industry Specific Applications Application Areas > Business and Industry Technologies > Machine Learning

ABSTRACTWe investigated trends in participation, performance and sex difference in performance in 3000 m freestyle in age groups swimmers (25–29 to 85–89 years) competing in the Fédération Internationale de Natation World Masters Championships between 1992 and 2014. During this period, participation increased in women and men. Women and men improved race times across years in all age groups. Women were slower in age groups 25–29 to 70–74 years. In age groups 75–79 and 85–89 years, however, race times were similar for both women and men. Sex difference in performance remained unchanged across years. In summary, performance improved across years in all age groups, men were faster than women up to the age group 70–74 years and women were not able to reduce the sex difference in performance to men across years. For athletes and coaches, an increase in participation and a continuous improvement in performance can be expected in these age group athletes.

Modifying the Toyota Production System for Continuous Performance Improvement in an Academic Children's Hospital

In this paper we present lightning statistics for more than three million cloud‐to‐ground (CG) flashes located during the 10‐year operation period 1992–2001 of the Austrian lightning location system (LLS) called ALDIS (Austrian Lightning Detection and Information System). Like a majority of other LLS operated worldwide, ALDIS underwent configuration changes and continuous performance improvement. Since these changes can alter the lightning statistics, we also relate the variation of the individual lightning parameters during the period of operation to changes in ALDIS configuration and performance. This analysis should be useful to other network operators and data users. Flash densities in Austria are normally between 0.5 and 4 flashes km −2 yr −1 depending on terrain. Flashes are classified as negative, positive, or bipolar. Seventeen percent of the flashes were classified as positive, and 2.3% of the total number of flashes were bipolar. Fifty percent of the positive multiple‐stroke flashes were bipolar flashes with positive first stroke; this influences the positive flash multiplicity and interstroke interval statistics. Compared to many other networks, the ALDIS network reports much lower median negative peak currents. For 2001, the median first‐stroke peak current for negative flashes was 10 kA. Estimated multiplicity of negative flashes for the 10‐year period is affected by the algorithm that groups strokes into flashes, as well as the improved DE of the network as a result of the integration of ALDIS into the European LLS (EUCLID). This performance improvement also resulted in a higher number of single‐stroke flashes. Interstroke interval and median first‐stroke peak current show a clear correlation with multiplicity for negative flashes, irrespective of detection efficiency. Negative flashes with higher multiplicity show smaller average interstroke intervals and larger first stroke median peak currents. No correlation between interstroke interval and stroke order was found. On average, regions with higher flash density show slightly higher flash multiplicity.