Modeling the vertical constraints in VLSI channel routing

Locally optimal breaking strategy was already developed for disjoint directed circuits in the vertical constraint graph. The paper reports extensions to two classes of nondisjoint circuits: with a common vertex, and with a common path. The significance of this is that the demonstration of general applicability of the locally optimal breaking concept opens a new approach to improving the channel router heuristics for automatic and interactive routers, using parallel architectures.

In this paper we have developed algorithms for generating random channel instances for their use in computing channel routing solutions in VLSI physical design. Channel instances are usually of two types: simple and general, and there are usually two kinds of inherent constraints involving channel routing problem: horizontal constraint and vertical constraint. Simple channel instances do not contain any vertical constraint, whereas, general channel instances contain both horizontal as well as vertical constraints. Most of the optimization problems in two-, three-, and multi-layer channel routing are NP-hard and, in fact, very few are polynomial time computable. Hence for each of the NP-hard problems in channel routing, it is unlikely to design a polynomial time deterministic algorithm. Developing heuristic algorithm may be a probable way out that hopefully provides good solutions for most of the instances available in literature. Novelty of a heuristic algorithm is judged better if it works for a variety of large number of randomly generated instances of the problem.

The channel router, which routes a rectangular channel with two rows of terminals along its top and bottom sides, is extensively used for the automatic routing of gate arrays. It is well known that in this routing method the routing can not be performed when the vertical constraint graph contains cycles. This paper deals with the problem of eliminating cycles in the vertical constraint graph by interchanging the nets assigned to logically equivalent terminals before channel routing. A heuristic algorithm is proposed for this problem. This algorithm yields a locally optimum assignment of nets to terminals, in the sense that the number of independent cycles in the vertical constraint graph of a resultant assignment can not be reduced by interchanging any pair of the nets assigned to logically equivalent terminals. Furthermore, in order to speed up the operation of this algorithm, it is shown that the checking as to whether or not the number of independent cycles in the vertical constraint graph is reduced can be done by noting only its subgraph, when a pair of nets assigned to logically equivalent terminals are interchanged. Experimental results have indicated that this proposed algorithm is efficient.

Recently, multi-trace impedance inversion has attracted great interest in seismic exploration because it improves the horizontal continuity and fidelity of the inversion results by exploiting the lateral structure information of the strata. However, computational inefficiency affects its practical application. Furthermore, in terms of vertical constraints on the model parameters, it only considers smooth features while ignoring sharp discontinuity features. This leads to yielding an over-smooth solution that does not accurately reflect the distribution of underground rock. To deal with the above situations, we first develop a low-dimensional multi-trace impedance inversion (LMII) framework. Inspired by compressed sensing, this framework utilizes low-dimensional measurements in sparse space containing the maximum information of the signal to construct the objective function for multi-trace inversion, which can significantly reduce the size of the inversion problem and improve the inverse efficiency. Then, we introduce the elastic half (EH) norm as a vertical constraint on the model parameters in the LMII framework and formulate a novel constrained LMII model for impedance inversion. Because the introduced EH norm takes into account both the smoothness and blockiness of rock impedance, the constrained LMII model can effectively raise the inversion accuracy of complex strata. Finally, an efficient alternating multiplier iteration algorithm is derived based on the variable splitting technique to optimize the constrained LMII model. The performance of the developed approaches is tested using synthetic and practical data, and the results prove their feasibility and superiority.

An algorithm for finding a non-trivial lower bound for channel routing

An efficient merger of the channel routing theory and the genetic stochastic search introduces a new paradigm for VLSI channel routing. The feasibility of the paradigm is demonstrated by the first genetic router for Manhattan model channels which contain cyclic vertical constraints. The router has been implemented as a self contained genetic algorithm system. It creates an initial population without violations of constraints using the results of a new theory of locally optimal breaking of cyclic vertical constraints. The population size is problem instance dependent to provide for the preservation of the structural diversity which is built into the initial population. A new encoding scheme and novel crossover and mutation operators are introduced. Convergence rates to optimal solutions are excellent.

Study of algorithms and its design can be progressed in various dimensions. In this paper, we have a definite refinement of lower bound on the number of tracks required to route a channel. The attack is from a complementary viewpoint. Our algorithm succeeds to avoid all kind of approximation. The approach performs exact mapping of the problem into graphical presentation and analyzes the graph taking help of mimetic algorithm, which uses combination of sequential and GA based vertex coloring. Performance of the algorithm depends on how effectively mimetic approach can applied selecting appropriate values for the parameters to evaluate the graphical presentation of the problem. This viewpoint has immense contribution against sticking at local minima for this optimization problem. The finer result clearly exemplifies instances, which give better or at least the same lower bound in VLSI channel routing problem.Key wordsManhattan Routing modelChannel routing problemConstraint graphsMaximum Independent setMimetic algorithm

As fabrication technology advances, devices and interconnection wires are placed in closer proximity and circuits operate at higher frequencies. This results in crosstalk between wire segments. Work on routing channels with reduced crosstalk is a very important area of current research [3],[10]. We know that the crosstalk minimization problem in the reserved two-layer Manhattan routing model is NP-complete, even for the channels without any vertical constraints. Since minimizing crosstalk is NP-complete, several polynomial time heuristic algorithms for reducing crosstalk have been developed [8],[9], [15]. All the ideas that are introduced as heuristics are basically sequential in nature. In this paper we have developed two efficient heuristics to compute reduced crosstalk routing solutions in a distributed computing environment. Our proposed heuristics are much better in computational complexity than the existing sequential versions of the algorithms developed in [9], [15].KeywordsBlank SpaceWire SegmentDistribute Computing EnvironmentParallel Random Access MachineTotal SpanThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Resolution and representation of constraints on geometric and evolutive objects

Computing travel plans for desired trips in public transportation systems is not exactly the same as finding a shortest driving path in a given area. Path planning in the context of public transportation systems must consider the route constraint that public vehicles serve on particular paths and that passengers cannot order the drivers to change the bus routes. Explicit representation of the route constraint helps us to design efficient algorithms that focus on viable routes for computing travel plans of interest. This paper presents two strategies for capturing the route constraint. The first strategy employs connectivity matrices, and applies special properties of matrices for quickly identifying feasible travel plans for the desired trips. The second strategy uses hubs where many service routes concentrate for computing travel plans. Our algorithms perform very well in field tests.

YACR2 is a channel router that minimizes the number of through vias in addition to the area used to complete the routing in a two-layer channel. It can route channels with cyclic constraints and uses a virtual grid. YACR2 uses preferably one layer for the horizontal segments of the nets and the other for the vertical ones but it may require the routing of a few horizontal segments in the second layer. Experimentally YACR2 performs better than any of the channel routers proposed thus far both in terms of area used and through vias. It routed the Deutsch Difficult Example in density with substantially less vias than Burstein's hierarchical router and with the default parameter values in less than 3 s of CPU time on a VAX 11/780.

A digital BiCMOS cell generator that produces geometrical cell layout with electrically high performance is presented. The generator is based on a 4-row model in which p-MOSFETs and n-MOSFETs are laid on two middle rows and bipolar devices are laid on the top and bottom rows. The main operations involved in the generator include: (1) formation of MOS rows; (2) formation of bipolar device rows; (3) global routing; (4) routing over devices; and (5) channel routing. The generator handles typical constraints governing the placement and routing, such as area/shape, device matching, and routability constraints, as well as the constraints on timing delay for high speed circuits and user-specified I/O ports positions. The generator is linked to ChipGraph, an IC layout editor developed by Mentor Graphics, so that the designer can edit the resulting layout if necessary, and get the mask data in either GDS II or MCIF format for chip manufacture. The experimental results on several BiCMOS circuits are presented. >

We present a new center-referenced basis for representation of stereo correspondence that permits a more natural, complete and concise representation of matching constraints. In this basis, which contains new occlusion nodes, natural constrainsts are applied in the form of a trellis. A MAP disparity estimate is found using DP methodsin the trellis. Like other DP methods, the computational load is low, but it has the benefit of a structure is very suitable for parallel computation. Experiments are performed under varying degrees of noise quantity and maximum disparity, confirming the performance.KeywordsStereo visionconstraintscenter-referencetrellis

An n-layer gridless channel router is presented. Instead of the commonly used grid it uses a set of contours as a routing framework. The contours, together with a set of reserved areas, present short circuits and ensure routability of all nets. A compact routing can be expected, since the framework is a very adequate model of the physical channel. It is shown that this router is also versatile enough to handle the classic vertical constraint problem. The inherent flexibility enables a design rule driven tradeoff between the number of vias, the wire length, and the channel height. The behavior of the algorithm has been investigated for many different channels, including the well-known difficult example and its recent derivatives. Very competitive results have been achieved for channel height and via count.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Many program analyses are naturally formulated and implemented using inclusion constraints. We present new results on the scalable implementation of such analyses based on two insights: first, that online elimination of cyclic constraints yields orders-of-magnitude improvements in analysis time for large problems; second, that the choice of constraint representation affects the quality and efficiency of online cycle elimination. We present an analytical model that explains our design choices and show that the model's predictions match well with results from a substantial experiment.