Novel Sub-Harmonic Injection-Locked Balanced Oscillator

A low power, 2×2 V-band beamforming receiver array using a local-oscillator (LO) phase-shifting approach is presented in this paper. Significant power savings in LO routing is achieved using an 8th sub-harmonic injection locked oscillator (SHILO), used for both frequency-multiplication and programmable phase-shift to implement beamforming. SHILO generates mm-Wave phase shift of ±90°. For low power, a low-noise amplifier (LNA) and mixer are operated using 1.3 V, while SHILO operates at only 0.5 V supply. The receiver is fabricated in TowerJazz 0.13 μm SiGe BiCMOS process and occupies total area of just 1×2 mm2. A single receiver consumes 11.4 mW power, with a peak gain of 8.23 dB, minimum noise figure (NF) of 7.7 dB, and 3-dB bandwidth of >11 GHz. The 2×2 array achieves a peak-to-null ratio of 21 dB.

Coupled oscillator networks (CONs) occur in various domains such as biology and electronics. The nonlinear phenomenon of “injection locking” leads to frequency synchronization among the oscillators in a CON. In this chapter, we first obtain simplified tools to analyze the phenomenon of injection locking and present the Generalized Adler’s equation. The Generalized Adler’s equation is applicable for analyzing the injection locking in any type of oscillator. We demonstrate the use of Generalized Adler’s equation for injection locking analysis on a ring oscillator and a Hodgkin-Huxley neuronal oscillator. Next, we describe efficient system-level simulation techniques (synchronized steady state and transient) for coupled oscillator networks using the Perturbation Projection Vector (PPV) phase macromodel of the oscillator. The coupled oscillator simulation techniques are generic in nature and can be applied for the simulation of any coupled oscillator network, like the ones found in biological or electronic systems. We apply our system-level techniques on a −G m LC (harmonic) and a Hodgkin-Huxley (non-harmonic) CON.

FACTS devices are now recognised as a viable solution for controlling transmission voltage, power flow, dynamic response, etc. and represent a new era for transmission systems. It has been proved that the centre or midpoint of a transmission line is the optimal location for shunt FACTS devices or reactive power support and the proof is based on the simplified line model. The validity of the above optimal location of shunt FACTS devices is investigated, when the actual model of the line is considered. It is found that the FACTS device needs to be placed slightly off-centre to get the highest possible benefit. Both the power transfer capability and stability of the system can further be improved if the shunt FACTS device is placed at the new optimal point instead of at the midpoint of a line having some resistance. This finding contradicts the previous results found for the simplified line model.

Sub-harmonic pulse injection-locked oscillators are becoming attractive candidates for the design of clock multipliers and as building blocks of phase-locked loops. Unfortunately, due to the large amplitude of the injected signals, these circuits cannot be analyzed with conventional methods and very-time-consuming simulations are needed to determine their phase noise performance. Phase-noise simulations are particularly critical when the ratio N between the output and the injection frequency gets large. To address the above issue, this paper provides an efficient computation flow to derive the phase noise of pulse injection-locked oscillators. The flow simply requires the computation of the phase-domain response and the phase noise of the free-running oscillator. An analytical expression, herewith demonstrated and compared against commercial simulation tools, allows calculating the phase noise of the injection-locked oscillator for any frequency ratio N.

This paper presents a 60-GHz sub-harmonic injection-locked quadrature frequency synthesizer with subsampling operation. This allows the proposed synthesizer to achieve relatively lower in-band phase noise through the use of sub-sampling operation, as well as good out-of-band phase noise through the use of sub-harmonic injection. The proposed synthesizer has been implemented in a standard 65-nm CMOS technology. It can support all 60-GHz channels and achieves a phase noise of -115dBc/Hz at 10MHz offset. The sub-sampling operation helps reducing an integrated jitter from 12ps to 2.1ps. It consumes 20.2mW and 14mW from a 20GHz sub-sampling phase-locked loop (SS-PLL) and a quadrature injection-locked oscillator (QILO), respectively.

900MHz QPSK/O-QPSK transmitter suitable for biomedical high quality imaging application is presented. The phase modulation is achieved by directly modifying the self-resonant frequency of a sub-harmonic injection-locked oscillator through capacitor bank switching. Due to the simplicity of the proposed architecture, implemented in 0.18μm CMOS technology, it consumes very low power of 3mW and 5.88mW with 1.2V and 1.4V supply voltages respectively, while transmitting at 50Mbps data rate. The transmitter can deliver output power of −3.3dBm at 1.4V supply with an EVM of 6.6%.

Two-element arrays composed of closely-spaced antennas with mutual coupling have recently been investigated in conjunction with electrical coupling networks that amplify the phase difference in the measurements. These systems have biomimetic analogies to the hearing mechanism in small insects that exhibit exceptional direction finding capabilities. Several coupling networks have been considered with varying complexity and performance relative to the fundamental tradeoff between power extraction and phase difference amplification. In this paper we present a general design method that establishes the achievable region for the power extraction/ phase amplification tradeoff, and we present a four-port Pi coupling network that realizes the entire achievable region. An example illustrates the design method for two closely-spaced dipole antennas at 40 MHz.

A novel, to our knowledge, vibration measurement method based on an injection-locked optoelectronic oscillator (OEO) is proposed and experimentally demonstrated. The vibration is mapped into the phase difference between the optical carrier and the frequency-shifted light, which is realized by using a Mach-Zehnder interferometer with an embedded acousto-optic modulator. Then, based on an OEO loop, the optical phase difference is converted to the phase variation of the microwave oscillating signal. An injection-locking technology is adopted to suppress the phase noise so that the minimum detectable vibration can be enhanced. A proof-of-concept experiment is implemented. The frequency response of the system and the phase noise of the oscillating signal are measured, and the improvement of the side-mode suppression ratio is verified. The electrical spectra are measured when the vibration signal with different voltages and frequencies is imposed, which are consistent with the theoretical derivation. The vibration signal is reconstructed from the temporal waveform of the oscillating signal by a phase demodulation algorithm, and the high-frequency noise is eliminated by an undersampling method. In addition, the detectable frequency range is from 62.5Hz to 500kHz, and the measurement sensitivity is obtained as 1.31rad/V at 2kHz.

In this paper, the bandwidth-enhanced quadrature power splitter (QPS) and balun using metamaterial (MM) transmission lines (TLs) are presented. They consist of a Wilkinson power divider, a conventional TL, and a well-synthesized MM TL. Since the phase response of the MM TL can be arbitrarily synthesized, the slope of the phase-response curve of the MM TL can be achieved as the same as that of the conventional TL with a specified phase difference, such as 90° or 180°, over a wide frequency range. Two components are designed and implemented at 2 GHz and experimentally demonstrated. The QPS has an output amplitude imbalance of less than 0.9 dB and a phase error of less than ±5° from 1.1-3.5 GHz (104% relative bandwidth), while over the frequency range of 1.24-3.58 GHz (97% relative bandwidth), the balun has an output amplitude imbalance of less than 0.7 dB and a phase error of less than ±10°.

We propose a novel power splitter (or divider) comprising two back-to-back quarter-wavelength (λ/4) coupled lines (i.e. coupler). To improve the isolation between the output ports (i.e. ports 2 and 3), an isolation resistor R is included. Three power dividers are designed and implemented. To enhance the reflection coefficients, and S21 and S31 and their amplitude imbalance (AI) and phase difference (PD), the output ports transmission lines (TLs) of the first power divider (i.e. divider-1) with R of 100 Ω adopt tapered width from 8 to 3 μm. For contrast, the second power divider (i.e. divider-2) with R of 100 Ω uses tapered width from 8 to 3 μm for the input port (i.e. port 1) TL. To study the effect of R on the performance of the power divider, the third power divider (i.e. divider-3) has the same layout with divider-2 except R equal to 50 Ω. Prominent results are obtained. For instance, divider-1 occupies a small chip area of 0.026 mm2 (i.e. 2.3 × 10−4λ 0 2 ), one of the smallest normalized chip areas ever reported for millimeter-wave power dividers. Moreover, at 33 GHz, divider-1 achieves excellent S11 of − 13.1 dB, S22 of − 14 dB, S33 of − 14.2 dB, and S32 of − 17.9 dB, S21 of − 4.22 dB, S31 of − 3.99 dB, AI of − 0.23 dB, and PD of 2.1°. The remarkable results of the proposed power divider structure indicate that it is suitable for Ka-band and even higher frequency transceivers.

This brief presents a fully integrated frequency synthesizer for software-defined radios covering not only all the existing wireless standards from 47 MHz to 10 GHz [including 14-band multiband orthogonal frequency-division modulation (MB-OFDM) ultrawideband (UWB)] but also the gigabits per second wireless communication around 60 GHz. A dual-band quadrature output voltage-controlled oscillatior reconfigurable as either a one-port oscillator for low power consumption or a two-port oscillator for low phase noise is employed as the core to generate all the frequencies from 47 MHz to 6 GHz. A multimode x3/x5/x7 injection-locked frequency multiplier and a single-sideband mixer with a tunable transformer-based narrow-band load are proposed to generate the carrier frequencies for the 14 MB-OFDM and impulse UWB bands with fast settling time, low power, and small chip area. An automatic amplitude calibration (APC) technique is proposed to greatly increase the locking range of the subharmonic injection-locked oscillators with achieving a given output amplitude. Implemented in a 0.13- $\mu\mbox{m}$ CMOS process, the synthesizer prototype occupies an active area of 3 $\mu\mbox{m}^{2}$ , consumes 33–83 mW in total, and measures phase noise of −139.6 dBc/Hz at 3-MHz offset from a 1.7-GHz carrier.

This paper presents an ultra low power transceiver with 900MHz BPSK downlink and 225MHz ASK uplink using injection locking based architecture for a semi-active RFID sensor node. For BPSK demodulation, two second harmonic injection locked oscillators (ILO) are employed to convert BPSK signals to ASK signals, which are then demodulated by an envelope detector to baseband. The oscillating signal at one receiver ILO also injects to another transmitter ILO for accurate carrier generation to avoid local frequency synthesis circuits at both the transmitter and receiver. Designed in a 45nm CMOS technology, post-layout simulation indicates that the transceiver achieves downlink bit rate of 10Mb/s at the sensitivity of -40dBm and uplink bit rate of 10Mb/s at the transmitted power of -24 dBm with total power consumption of 631μW.

The design of quadrature signal generators is one of the most challenging issues in modern RF transceivers. After a brief review of conventional techniques, this paper presents injection locked oscillators as a viable alternative to achieve high performance and low power consumption. Two different architectures, realized in a 0.18 /spl mu/m CMOS technology, are presented and compared. The first shows excellent driving capability and simple design, the second lends itself to low power operation.

<p>This paper focuses on analyzing and evaluating impact of a Static Var Compensator (SVC) on the measured impedance at distance protection relay location on power transmission lines. The measured impedance at the relay location when a fault occurs on the line is determined by using voltage and current signals from voltage and current transformers at the relay and the type of fault occurred on the line. The MHO characteristic is applied to analyze impact of SVC on the distance protection relay. Based on the theory, the authors in this paper develop a simulation program on Matlab/Simulink software to analyze impact of SVC on the distance protection relay. In the power system model, it is supposed that the SVC is located at mid-point of the transmission line to study impact of SVC on the distance relay. The simulation results show that SVC will impact on the measured impedance at the relay when the fault occurs after the location of the SVC on the power transmission line.</p>

A new dual-band six-port circuit is proposed in this paper by using a coupled-line dual-band Wilkinson power divider and three dual-band branch-line couplers. Based on the traditional even- and odd-mode analysis and basic transmission line theory, the perfect matching between the sub-circuits is obtained and this six-port circuit is capable of operating at two arbitrary frequencies. Due to the realization of the traditional transmission lines, the phase differences between the output ports are the same at two different frequencies. For the purpose of demonstration, an example, which operates at 3 GHz and 5 GHz, is simulated in this paper. Good agreements between the calculated and simulated results verify our design.