Performance-optimized optical bidirectional backplane bus for multiprocessor systems

Optical technologies have received large interest in recent years for use in board-level interconnects. Polymer multimode waveguides in particular, constitute a promising technology for high-capacity optical backplanes as they can be cost-effectively integrated onto conventional printed circuit boards (PCBs). This paper presents the first optical backplane demonstrator based on the use of PCB-integrated polymer multimode waveguides and a regenerative shared bus architecture. The backplane demonstrator is formed with commercially-available low-cost electronic and photonic components onto conventional FR4 substrates and comprises two opto-electronic (OE) bus modules interconnected via a prototype regenerator unit. The system enables interconnection between the connected cards over four optical channels, each operating at 10 Gb/s. Bus extension is achieved by cascading OE bus modules via 3R regenerator units, overcoming therefore the inherent limitation of optical bus topologies in the maximum number of cards that can be connected to the bus. Details of the design, fabrication, and assembly of the different parts of this optical bus backplane are presented and related optical and data transmission characterisation studies are reported. The optical layer of the OE bus modules comprises a four-channel three-card waveguide layout that is compatible with VCSEL/PD arrays and ribbon fibres. All on-board optical paths exhibit insertion losses below 13 dB and intra-channel crosstalk lower than -29 dB. The robustness of the signal distribution from the bus inputs to all respective bus output ports in the presence of input misalignment is demonstrated, while 1 dB input alignment tolerances of approximately ±10 μm are obtained. The electrical layer of the OE bus modules comprises the essential driving circuitry for 1×4 VCSEL and PD arrays and the corresponding control and power regulation circuits. The interface between the optical and electrical layers of the bus modules is achieved with simple OE connectors that enable end-fired optical coupling into and out of the on-board polymer waveguides. The backplane demonstrator achieves error-free (BER <; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> ) 10 Gb/s data transmission over each optical channel, enabling therefore, an aggregate interconnection capacity of 40 Gb/s between any connected cards.

The drastically reduced costs and improved performance of fiber optic components in recent years offers an opportunity to economically incorporate high-bandwidth optical communication links within a large-scale multiprocessor system. In this paper, the design, implementation, and initial performance of a fiber optic bus for a tightly coupled multiprocessor system are discussed. This optical bus ulitizes a multiple fiber-multiple star configuration with data rates of up to 80 MHz. It transmits bus control line information by repetitively scanning the control lines and transmitting their states as a packet of bits. It is currently being used for a 30-processor system called the Heidelberg Polyp, which has a custom bus design. However, the design approach is a general one that could easily be adapted to other buses, especially asynchronous buses such as the VME bus.

A guided-wave optical backplane bus system intended for use in high-performance board-to-board interconnects is described. Its multiplexed polymeric holograms can implement optical signal broadcast between boards so that all boards share common optical channels. By introducing an active coupler to the doubly multiplexed hologram at the center board, signals received from any board can be rebroadcast to all other boards. We describe the design concepts for a centralized optical backplane and the resulting performance and assembly advantages over previously developed guided-wave and free-space optical backplane bus systems used for broadcasting signals. These advantages include equalized fan-out power, increased interconnect distance, and simpler fabrication.

We report a 1-D, 1 Gbit/sec, fully integrated 1-to-10 optical planar bus array. The optical bus is made out of a thin glass substrate in conjunction with a 1-D hologram array, integrated on the surface. Based on the dispersion relation, the angular misalignment can be used to determine the wavelength tolerance of the optical bus, which is a representation of its modulation bandwidth. Using the experimental results of the angular tolerance, which is determined to be 0.5 degree(s), it can be shown that a wavelength coverage of 42 nm is achievable when this optical bus is used. The corresponding frequency is 7.5 THz.

In this paper, an innovative 3-to-3 bi-directional optical bus architecture based on multimode polymer waveguides with embedded 45° micro-mirrors was successfully demonstrated. With a lithography-free imprinting process by high quality electroplated metallic mold, the device can be precisely replicated with a low fabrication cost. Superior to any point-to-point optical waveguide, the implemented optical bus structure is capable of broadcasting and receiving high speed data at 10 Gbit/sec among multiple points as a high performance optical backplane.

The primary technical challenge for optical backplanes involve the alignment and optical isolation of multiple data channels. Since most backplanes require data transfer rates greater than a single optical channel can costeffectively provide, multiple data channels is the common solution for higher aggregate transfer rates. Established optical alignment and isolation techniques include spatial separation of optical channels, use of lensing elements to focus specific transmitter outputs to specific receiver areas, use of differing wavelengths for adjacent channels with appropriate frequency filtering on receivers, and the use of "light guide tubes" for each channel. This presentation will examine another promising option, the use of "matched" Holographic Optical Elements (HOEs) to provide both cross channel optical isolation and to significantly relax traditional optical alignment requirements. Matched HOEs can both induce upon a transmitted optical stream, and then filter upon a received optical stream, a number of distinguishing characteristics such as wavelength, polarization, phase, and amplitude. Thus the use of a unique "matched HOE" pair with each transmitterreceiver pair of multiple optical data channels can provide an efficient mechanism to isolate individual data streams even when they may be physically coincident, such as in a length of fibre optic or when multiple free space data transmitters illuminate several channel's receiver elements. Thus, the alignment issue is relaxed from the usual constraint of attempting to physically separate channels to one where, as long as the receiver is within the optical cone of it's matched transmitting element, cross channel interference can be effectively eliminated.

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An infinitely scalable data-center using coherent optics-driven backplane that leads to supporting a series of optical buses is proposed. This architecture, called FISSION (Flexible Interconnection of Scalable Systems Integrated using Optical Networks), facilitates the creation of sectors of Ethernet switches connected in a non-blocking fashion and wired to the optical bus-based backplane. We have shown this architecture to be extremely scalable by incrementally adding any number of fiber-based backplanes without physical and protocol limitations. In this paper, we investigate how to load-balance across such a large data-center. We propose a load-balancing algorithm based on converting service requirements and intra-data-center statistics into natural language aids that fall into the premise of software defined networking within a data-center. The load balancing algorithm is thoroughly evaluated from the perspective of scalability, service support and blocking.

Multi-depot vehicle scheduling with multiple vehicle types on overlapped bus routes

Dielectric grating-based spoof surface plasmonic (SSP) structures are among the recent low-loss and subwavelength field-concentrating solutions for realizing high-density terahertz (THz) and sub-THz integrated circuits. In this paper, we report on a novel waveguide structure capable of supporting highly confined SSP mode while exhibiting much lower propagation loss compared to other similar SSP structures. The proposed structure is composed of two perfectly aligned identical silica ridges placed on the inner faces of the metallic plates of a parallel plate waveguide with a proper plate distancing in order to leave an empty gap region between the ridges. Each of the ridges embodies a periodic arrangement of high-resistivity silicon blocks with the same height as their own, although with smaller widths compared to their width. By performing modal analysis on the 2D and 3D structures of the proposed waveguide, its propagation properties are studied. It is observed that if the gap region is properly designed, a waveguiding structure with a subwavelength cross-sectional size around λ0/3×λ0/3, where λ0 is the free-space wavelength at the maximum frequency of operation, capable of providing a high degree of field confinement over a wide frequency bandwidth of nearly two octaves and with a very low propagation loss factor compared to similar SSP structures is achieved. Moreover, the performance of the proposed waveguide for implementing a 90° waveguide bend of the radius λ0/3, and for obtaining a spectroscopy-based refractive-index sensor is addressed. The results of our assessments suggest that the proposed waveguide can bring the state-of-the-art SSP designs yet another step closer to realizing ideal waveguiding structures for various applications in THz and sub-THz regimes.

Order statistics on optically interconnected multiprocessor systems

We provide the design of a co-polarized simultaneous transmit and receive (STAR) array antenna, aiming to address the issue of undesired isolation in the antenna domain of the millimeter-wave (mm-Wave) full-duplex co-polarized communication system. As the cornerstone for the design and development of the antenna, the guided-wave structures of the virtual-electric-wall (VEW)-based ridge substrate-integrated waveguide (RSIW) and ridge parallel plate waveguide (RPPW) are proposed and applied to the full-duplex antenna design. Compared with conventional RSIW, VEW-based RSIW has the merits of lower ohmic loss and releasing the fabrication tolerance in the array antenna. Additionally, on the basis of parallel plate waveguide (PPW), the proposed RPPW exhibits a Chebyshev filtering response. The radiating part of the proposed array employs a slot-pair array excited along orthogonal directions by using the preceding guided-wave structures. Among them, the RSIW array serves as the Tx antenna, and the RPPW array is regarded as the Rx antenna. To achieve co-polarized radiation patterns in the boresight direction, the substrate-integrated waveguide (SIW) feed network is integrated into the reverse side of the antenna, providing differential and common-mode excitations for the RSIW-excited and RPPW-fed arrays. Furthermore, the inter-port isolation is effectively ameliorated by inserting the mushroom-type metamaterial between linear arrays. As a proof-of-concept, a shared-aperture full-duplex array operating in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Q}$ </tex-math></inline-formula> -band is developed and fabricated to demonstrate the above concept by using standard printed circuited board technology. The measured overlapped impedance bandwidth covers from 38.18 GHz to 39.13 GHz. The measured Tx-to-Rx isolation is greater than 25.5dB in the Q-band. The measured peak gains in Tx- and Rx-mode are 18.4 dBi and 17.8 dBi. The simulation and measurement results show good consistency, verifying the effectiveness of the proposed array in inter-port isolation, array size, planarization, and lightweight, making it suitable for mm-Wave shared-aperture full-duplex communication systems.

To eliminate the intrinsic problem associated with electrical interconnects, processor-to- processor interconnects based on fiber optics are under development. The major bottleneck of fiber-based optical interconnects is their point-to-point characteristic which seriously limits their interconnectivity. As a result of the low interconnectivity, multiplexing/demultiplexing (e.g., 1:1024 and 1024:1) technology was employed to minimize optical channels. This approach significantly reduces the bandwidth of the data transfer rate. Moreover, it is incompatible with most of the IEEE standard buses (such as FASTBUS, VMEbus, and Futurebus). The high density highly distributed channel waveguide array presented in this paper is the only feasible solution to provide a lithographically defined optical interconnection network with full compatibility of IEEE standard and special purpose high performance bus systems.

A high-throughput optical image crossbar switch (OPIX) that uses a point light source array as the switching device is constructed. A prototype OPIX is used to create various switching patterns for two-dimensional images. The newly constructed OPIX is suitable for high-speed operation because it uses point light sources instead of an optical shutter array as the switching device. Since it is based on an imaging system, the OPIX has a large space-bandwidth product. The introduction of OPIX to optical image data buses of parallel optical processing systems is particularly significant.

As multiprocessing comes into the mainstream, the board-to-board interconnects become even more critical. In a shared-memory multiprocessing system, the shared bus topology is the preferred interconnect scheme because its broadcast nature can be effectively utilized to reduce communication latency, lessen networking complexity, and support cache coherence. In the electrical domain, however, a major performance bottleneck is anticipated due to the restricted bus bandwidth. In this paper, an innovative architecture, optical centralized shared bus, is proposed for use in the multiprocessing systems. This architecture utilizes the terascale bandwidth capacity of substrate-guided optical interconnects, while at the same time, retaining the essential merits of the shared bus topology. Thus, a smooth migration with substantial multiprocessing performance improvement is expected. A conceptual emulation of the shared-memory multiprocessing scheme is demonstrated on a generic PCI subsystem with an optical centralized shared bus. The objective of this effort is to prove the technical feasibility from the architecture standpoint.