POSTER

Multiplication is an important fundamental function in arithmetic operations. Multiplication-based operations such as Multiply and Accumulate(MAC) and inner product are among some of the frequently used computation Intensive Arithmetic Functions(CIAF) currently implemented in many Digital Signal Processing (DSP) applications such as convolution, Fast Fourier Transform(FFT), filtering and in microprocessors m its arithmetic and logic unit. Since multiplication dominates the execution tune of most DSP algorithms, so there is a need of high speed multiplier. Currently, multiplication time is still the dominant factor in determining the instruction cycle time of a DSP chip. The demand for high speed processing has been increasing as a result of expanding computer and signal processing applications. Higher throughput arithmetic operations are important to achieve the desired performance in many real-time signal and image processing applications . One of the key arithmetic operations in such applications is multiplication and the development of fast multiplier circuit has been a subject of interest over decades. Multiplier based on Vedic Mathematics is one of the fast and low power multiplier. Employing this technique in the computation algorithms will reduce the complexity, execution time, power etc. This vedic based multiplier is compared with binary multiplier(partial products method).

The 16 papers in this special issue focus on adaptive sparse representation of data and applications in signal and image processing.

On efficient computation of rational {1,2}-pseudo-inverses for multivariable rational matrix-valued functions and their applications

A Wavelet Transform (WT) is a mathematical technique that transforms a signal into different frequency components, each analyzed with a resolution that matches its scale. Wavelets are small waves with limited duration and they possess both time and frequency localization, which means they can capture both high-frequency and low-frequency information simultaneously. There are several types of wavelet transforms, and, depending on the application, one may be preferred to the others. For a continuous input signal, the time and scale parameters can be continuous leading to the Continuous Wavelet Transform (CWT) and Discrete wavelets. Image processing is a critical area in modern computing with applications ranging from medical imaging to remote sensing and computer vision. Traditional Fourier analysis has limitations in capturing localized features in images due to its global nature. Wavelet Transform (WT), with its multi-resolution and localized time-frequency representation, provides a powerful alternative for analysing and processing visual information. This paper presents a comprehensive overview of the theory of wavelet transforms, their mathematical foundations, and applications in image processing and signal processing, including compression of images, denoising and feature extraction from images.

Multi‐dimensional Discrete Fourier Transforms (DFTs) play an important role in signal and image processing applications. Image reconstruction is a key component in signal processing applications like medical imaging, computer vision, face recognition etc. Two dimensional fast Fourier Transform (2D FFT) and Inverse FFT plays vital role in reconstruction. In this paper we present a fast 64 × 64 point 2D FFT architecture based on radix‐43 algorithm using a parallel unrolled radix‐4 3 FFT as the basic block. Our radix‐4 3 architecture is a memory optimized parallel architecture which computes 64‐point FFT, with least execution time. Proposed architecture produces reordered output of both 64‐point one dimensional (1D) FFT and 64 × 64 point 2D FFT, without using any additional hardware for reordering. The proposed architecture has been implemented in UMC 40nm CMOS technology with clock frequency of 500 MHz and area of 0.841 mm 2 . The power consumption of proposed architecture is 358 mW at 500 MHz. Energy efficiency (FFTs computed per unit of energy) is 341 points/Joule. Computation time of 64 × 64 point FFT is 8.19 μs. ASIC implementation results shows better performance of proposed work in terms of computation time when compared with state‐of‐art implementation. Proposed architecture has also been implemented in Virtex‐7 FPGA which gives comparable area.

PrefaceThis issue of Proceedings gathers the papers presented at 2019 4th International Conference on Intelligent Computing and Signal Processing (ICSP 2019) held in Xi’an, China during March 29-31, 2019. ICSP 2019 is an international conference covering research and development in the field of intelligent computing and signal processing and participation from all over the world.More than 400 papers were finally accepted after a double blinded peer review process by international reviewers and academic committee members. Divided into 4 chapters, the papers provide a wide spectrum of researches on wide range of intelligent computing and signal processing. The chapters are devoted to Algorithm and Data Mining, Signal and Image Processing, Automation Engineering and Intelligent Application, Computer Modeling and Performance Structure. Specific research results by conference participants were presented and examined in the light of the frameworks outlined above, which is of interest to academics, researchers and professionals in this field.Two keynote speeches were presented from Prof. Weihua Zhuang, University of Waterloo, Canada, whose topic was about Service Provisioning in 5G Communication Networks; Prof. Nagula Sangary, University of Waterloo & Prudential Technology Ltd., whose topic was about Trends and Challenges in Terrestrial Satellite Wireless Communication Systems in mm-Wave range. All the talks were very impressive for the high level of professionalism, and in many cases original ideas and activities have been accomplished or proposed.List of Committees are availble in this PDF.

Neuro-Symbolic Artificial Intelligence (NeSyAI) is a paradigm that combines neural networks with symbolic reasoning, building upon foundations laid in the 1990s and early 2000s, yet gaining increased attention through practical applications. This paper provides a comprehensive review of NeSyAI techniques and their applications in advanced signal and image processing. The paper begins by introducing the fundamentals of NeSyAI and a taxonometry analysis, highlighting how it bridges the gap between data-driven learning and knowledge-based reasoning. It then surveys several key application domains, such as biomedical, autonomous robotics, and IoT, in order to understand the benefits and challenges of that integration. For each domain, how NeSyAI methods improve upon traditional purely neural or purely symbolic approaches is illustrated. A comparative analysis with conventional AI techniques is presented, underscoring the advantages of NeSyAI in terms of interpretability, generalization, and flexibility. The challenges that arise in developing NeSyAI systems, such as computational complexity, integration of heterogeneous models, and ethical considerations, are also discussed. Finally, future research trends in NeSyAI for signal and image processing, as well as the path toward more explainable and generalizable AI, are synthesized.

Graphics processing units (GPUs) are increasingly critical for general-purpose parallel processing performance. GPU hardware is composed of many streaming multiprocessors, each of which employs the single-instruction multiple-data (SIMD) execution style. This massively parallel architecture allows GPUs to execute tens of thousands of threads in parallel. Thus, GPU architectures efficiently execute heavily data-parallel applications. However, due to this SIMD execution style, resource utilization and thus overall performance can be significantly affected if computation threads must take diverging control paths. Control flow divergence in GPUs is a well-known problem: prior approaches have attempted to reduce control flow divergence through code transformations, memory access indirection, and input data reorganization. However, as we will demonstrate, the utility of these transformations is seriously affected by the lack of a guiding metric that properly estimates how control flow divergence affects application performance. In this paper, we introduce a metric that simply and accurately estimates performance of computation-bound GPU kernels with control flow divergence, and use the metric as a value function for thread re-grouping algorithms. We measure the performance on NVIDIA GTS250 GPU. For the tested set of applications, our experiments demonstrate that the proposed metric correlates well with actual GPU application performance. Through thread re-grouping guided by our metric, control flow divergence optimization can improve application performance by up to 3.19X.

Graphic Processing Units (GPUs) have evolved to provide a massive computational power. In contrast to Central Processing Units, GPUs are so-called many-core processors with hundreds of cores capable of running thousands of threads in parallel. This parallel processing power can accelerate the simulation of communication systems. In this work, we utilize NVIDIA's Compute Unified Device Architecture (CUDA) to execute two different sphere decoders on a graphic card. Both flat fading and frequency selective channels are considered. We find that the execution of the soft-sphere decoder can be accelerated by factors of 6-8, and the fixed-complexity sphere decoder even by a factor of 50.

Template matching has many applications in signal processing, image processing, pattern recognition, and video compression. This paper proposes a fast coarse-to-fine template matching algorithm for finding the exact best match, i.e., the match that may be found by a full search. This is obtained by pruning the number of candidates in the full search using the results of a coarse search. Experimental results show that speed ups of a couple of orders of magnitude can easily be achieved using this method for typical low-noise cases of two-dimensional (2-D) template matching.

Stationary reciprocal processes defined on a finite interval of the integer line can be seen as a special class of Markov random fields restricted to one dimension. Nonstationary reciprocal processes have been extensively studied in the past especially by Jamison et al. The specialization of the nonstationary theory to the stationary case, however, does not seem to have been pursued in sufficient depth in the literature. Stationary reciprocal processes (and reciprocal stochastic models) are potentially useful for describing signals which naturally live in a finite region of the time (or space) line. Estimation or identification of these models starting from observed data seems still to be an open problem which can lead to many interesting applications in signal and image processing. In this paper, we discuss a class of reciprocal processes which is the acausal analog of auto-regressive (AR) processes, familiar in control and signal processing. We show that maximum likelihood identification of these processes leads to a covariance extension problem for block-circulant covariance matrices. This generalizes the famous covariance band extension problem for stationary processes on the integer line. As in the usual stationary setting on the integer line, the covariance extension problem turns out to be a basic conceptual and practical step in solving the identification problem. We show that the maximum entropy principle leads to a complete solution of the problem.

Design of maximally flat IIR filters with flat group delay responses

We present some new experiments on self-diffraction in nematic liquid crystals and an extended static theoretical description of this effect. Our model gives some new insights and improvements to calculations carried out before. Using these calculations it was, e.g., possible to determine elastic constants in a pure optic way. For the static and dynamic measurements we designed a computer-controlled optical setup. It allows determination of the most interesting nonlinear optical properties of liquid crystals under variation of many parameters. The layout even allows application for any other nonlinear material. Especially modulation sensitivity, modulation transfer function and distribution of noise measured with just one setup are interesting for later application in optical signal or image processing. Furthermore, we present measurements one some new commercial nematic mixtures which show promising behaviour for future application in nonlinear optics. It was possible to verify our theoretical model with the experimental results.

. The development of an Image Processing (IP) application is a complex activity, which can be greatly alleviated by user-friendly graphical programming environments. Our major objective is to help IP experts reuse parts of their applications. A first work towards knowledge reuse has been to propose a suitable representation of the strategies of IP experts by means of IP plans (trees of tasks, methods and tools). This paper describes the CBR module of our interactive system for the development of IP plans. After a brief presentation of the overall architecture of the system and its other modules, we explain the distinction between an IP case and an IP plan, and give the selection criteria and functions that are used for similarity calculation. The core of the CBR module is a search/adaptation algorithm, whose main steps are detailed: retrieval of suitable cases, recursive adaptation of the selected one and memorization of new cases. The system’s implementation is presently completed; its functioning is described in a session showing the kind of assistance provided by the CBR module during the development of a new IP application.

An area-delay efficient single-precision floating-point multiplier for VLSI systems