RF Power Transistors

RF power amplifier circuits other than Class A have a previously unreported operating characteristic which can cause emitter-base reverse breakdown once each RF cycle. The breakdown is not necessarily observable at the external terminals of the transistor; it can be deduced from the observed emitter-base terminal voltage and base current and the transistor internal lead inductances and junction capacitances. Certain symptoms of RF power transistor deterioration and failure reported by other workers appear to be consistent with the possible effects of such repetitive breakdowns. Common-base amplifiers should be more likely to suffer from this problem than common-emitter amplifiers. Transistor specialists disagree in their predictions of whether such operation would damage the RF power transistor. Controlled experiments could provide definitive information as to the effects on the transistor of such operation.

LD MOSFET as large signal RF power amplifier has been characterized and modeled for high power and broadband RF amplifier. Large signal model has been derived and verified based on I–V characteristics and S-parameter data. Non-linier model has been used to model LD MOSFET large signal characteristics. Good fit of measured and simulation results of LD MOSFET I–V characteristics as well as S-parameter curves verified large signal model and extracted model parameters. The effect of transistor biases, V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> and V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</inf> to 2nd (IM2) and 3rd order (IM3) intermodulation distortion of LD-MOSFET (D2081UK) relative to fundamental output power have been obtained and verified. Highest level of IM3 was shown at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> = 1,6 V near threshold voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> = 1,4 V) and minimum level of IM3 at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> = 2 V, at input power, P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</inf> , of −30 dBm and load impedance, R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</inf> = 50 Ω. While the effect of V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</inf> shows maximum of IM3 at knee voltage and declining level at higher V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</inf> . The effect of varying load impedance, R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</inf> , to IM3, IM2 and fundamental levels has shown minimum dip of IM3 at R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</inf> = 31 Ω with gradual increase as load increasing above 50 Ω. The intersection point of 3rd order intermodulation (IP3) at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> = 2.2V shows higher power level of IP3=50dBm with input power of 18dB than level at V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> = 1.8V with IP3 of 46dBm. This behaviour of non-linearity effect of the transistor was verified and evaluated based on the large signal model of LD MOSFET device. Analysis of non-liniearity behavior based on LD MOSFET device structure and physics was carried out in comprehending the origin of non-linearity and in the implementation of linearization method.

Design and simulation of broadband 60W RF Amplifier using AlGaN/GaN HEMT die accomplished for 2,7GHz – 3,2GHz (S-Band) has been conducted. Load pull optimization and bias circuit based on λ/4 wave line stub on fully distributed element cross, line, have been implemented to achieve rf broadband characteristics in the S-band frequency range. In this research focused on design of bias circuit for 60W AlGaN/GaN RF High Power Amplifier. Co-simulation of the EM simulation based on MoM FEM (Method of moment Finite Element method) and Harmonic Balanced simulation has been further carried out to the layout of the bias circuit to optimization. AlGaN/GaN HEMT die wire-bonded to the CoB (Chip-on-Board) PCB was included in the simulation. The AlGaN/GaN RF High Power Amplifier has delivered S <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</inf> gain of 11.164 dB and 13.81dB at 2.7GHz and 3.3GHz, respectively.

Turkish Accelerator and Radiation Laboratory in Ankara (TARLA) is an oscillator mode IR-FEL facility which is under construction since 2011. ELBE licensed superconducting modules housing TESLA RF cavities have been manufacturing for one year and the first module will be delivered in 2015. He Cryogenic System has also started to be manufacturing at similar time with the accelerator structures. It will be delivered in 2014. High Power RF amplifiers are started to tender procedures and delivery time is planning as 2015. The installation of high power transmission lines have to be completed at the same time with the delivery date of HPRF amplifiers to test the cavities and amplifiers. In this study, the final structural design of high power RF transmission lines and design parameters of RF amplifiers for TARLA is discussed.

Introduction While wireless communications standards may come and go with developments in the latest digital coding technology, or the liberation of new fragments of the electromagnetic spectrum, the common denominator among the various communications systems is the power amplifier. Over the last few decades, the transition from vacuum tubes and other forms of amplification to solid state devices has been almost complete, especially at power levels less than 1 kW. Nowadays, at the heart of the power amplifier, we find the power transistor. In the world of RF wireless communications, the base-stations and long range transmitters use silicon LDMOS (laterally-diffused MOS) high power transistors almost exclusively. In addition to modern cellular communication systems, LDMOS devices are also used in a wide range of applications requiring radio-frequency power amplification: HF, VHF, and UHF communications systems; pulsed radar; industrial, scientific and medical (ISM) applications; avionics; and most recently in WiMAX™ communication systems. The frequency range of these applications is from a few megahertz and up to 4 GHz. While LDMOS technology is pre-eminent in high-power RF and lower frequency microwave applications, a wide variety of compound (III–V) semiconductors are used as effective power amplification devices, especially for application frequencies above about 5 GHz, and also for lower power applications such as cellular handsets, Bluetooth™ and other wireless local area networks (WLANs), which generally demand output powers of about 1 watt or below.

In the recent years, there has been an increased focus on RF power amplifiers for communications especially for wireless applications. The main reasons of focus include high integration of power amplifier and low cost of production. To be able to reach the goal some theory on RF power amplifiers is necessary. The different classes of operation are explained, then the principles of impedance matching is discussed. This includes the development of the simulated load-pull method and synthesis of impedance matching networks. Then the biasing of the power amplifier is discussed along with the stability issues. RF power amplifier designing, simulation and implementation at 5MHz is described in this thesis. The issues of modeling a complete power amplifier are treated. This includes modeling of the circuit, the passive devices on-chip and off-chip as well as the package and PCB. To ease the design of power amplifier a design method is developed based on the theory and the experimental work. At last the experimental work is described. The first part is a linearization system based on simulation. Then the RF power amplifier designed during the project are introduced. The power amplifier shows superior performance when at its operating frequency 5MHz. The output power of this power amplifier is 50.419dB. The power amplifier utilizes the design method develop as well as the models described. The accurate modeling combined with superior performance proves the future of integrated RF power amplifiers for wireless communication.

RF transistors can be found in several present day electronics including mobile radio and telecommunication applications, TV & radio broadcast, avionics, radar and defense communications as well as industrial, scientific, medical (ISM) and broadcast applications. The increasing demands for data anywhere/anytime (mobile internet) requires increased deployment of wireless communication infrastructure. This has pushed upwards across the supply chain (suppliers and customers alike). At the core are RF power amplifiers (PA) with a very costly design, hence important to get it right as rework may not be possible. The assembly of RF power transistors in PA modules is the back-bone of these applications. Such modules are usually generating high power (> 100 watts) with different package outlines and lead configuration. The high power demands excellent thermal management, else product performance and lifetime (reliability) are compromised. As a consequence, the transistors are often packaged in "chunky" S OT outlines, with a cerami c/plastic body and a metal flange. Packaging such RF power modules (or PA) has historically been achieved with bolt down devices, where only the leads of the components were soldered (more akin to manual assembly operations). A thermal compound was used underneath the transistor. High volume assembly is a basic capability (with automation a necessity) to meet industry demand. There are a variety of issues to consider module assembly since there are strong interplay between design, materials and process in order to achieve the desired performance (electrical, thermal, mechanical, and reliability). Due to thermal management requirement, the transistors are normally soldered directly onto the pallet (laminate bonded onto a heat sink) with the leads and SMDs on to the laminate on the pallet. Base on the SOT outline (i.e. gull wing), a cavity or pedestal is required in the pallet with a cut-out in the laminate. Each PA module will be different in i.e. size, weight, materials, number of transistors, board construction with no two modules the same. With such spectra of possibilities in the module design and permutations on assembly processes, the paper outlines and addresses the key issues to consider and approach to achieve robust PA modules assembly. It includes but not limited to substrates, solders, heat sinks, plating, board design and reflow soldering (assembly process flow). Key to achieving the robust assembly process is an iterative approach with feedback at each step in the process including a modeled reflow profiling. In addition, a novel use of Rth (thermal impedance) in combination to acoustic microscopy / x-rays to assess the quality of the soldered interface is presented. The solder volume is key to accommodate manufacturing tolerances and solder joint reliability. Additionally, the issues presented constitute a "toll-box" for PA module assembly, including microwave pallet modules with matched input/output impedance.

With the high interest in digital modulation techniques which are very sensitive to the PA nonlinearity, modern wireless communication systems require the usage of linearization techniques to improve the linear behavior of the RF power amplifier. The powerful and cheap digital processing technology makes the digital predistortion (DPD) a competitive candidate for the linearization of the PA. This thesis introduces the basic principle of DPD, its implementation on FPGA and the adaptive DPD system. The linearization of 4 PAs with DPD technique has been introduced: for the hybrid class AB PA operating at 2.6 GHz with a WiMAX testing signal, 33.7 dBm average power, 29.6 % drain efficiency, 13 dB ACPR and 9 dB NMSE improvement have been obtained; for the hybrid Doherty PA operating at 3.4 GHz with an I/Q testing signal, 35.0 dBm average power, 36.8 % drain efficiency, 12 dB ACPR and 13 dB NMSE improvement have been obtained; for the MMIC class AB PA operating at 7 GHz with an I/Q testing signal, 29.4 dBm average power, 25.7 % drain efficiency, 12 dB ACPR and 12 dB NMSE improvement have been obtained; for the two-stage PA operating at 24 GHz with an I/Q testing signal, 23.5 dBm average power, more than 14.0 % drain efficiency, 11 dB ACPR and 11 dB NMSE improvement have been obtained. The DPD algorithm has been implemented on FPGA with two methods based on LUT and a direct structure with only adders and multipliers. The block RAM on the FPGA board is chosen as the table in the LUT methods. The linearization performance for these three methods is similar. The test PA is the hybrid Doherty PA mentioned above and the test signal is the I/Q signal with 7.4 dB PAPR. 35.1 dBm average power, 36.8 % efficiency, 11 dB ACPR and 11 dB NMSE improvement have been obtained. The cost of logic resources for the direct structure method is the largest with 1,172 flip-flops, while the number of flip-flops for the two LUT methods are 263 and 583, respectively. A new adaptive algorithm has been proposed in this thesis for the adaptive DPD system. This new algorithm improves the performance in extracting the model parameters in complex number domain. With the experimental data from a combined class AB PA, the final accuracy of the model extracted by the new algorithm has been improved from -20 dB to about -40 dB and the converge speed is faster

Power amplifier (PA) behavior is inextricably linked to the characteristics of the transistors underlying the PA design. All transistors exhibit some degree of memory effects, which must therefore be taken into account in the modeling and design of these PAs. In this paper, we will present new trends for the characterization, device modeling, and behavioral modeling of power transistors and amplifiers with strong memory effects. First the impact of thermal and electrical memory effects upon the performance of a transistor will be revealed by comparing continuous wave and pulsed RF large-signal measurements. Pulsed-RF load-pull from the proper hot bias condition yields a more realistic representation of the peak power response of transistors excited with modulated signals with high peak-to-average power ratio. Next, an advanced device modeling method based on large-signal data from a modern nonlinear vector network analyzer instrument, coupled with modeling approaches based on advanced artificial neural network technology, will be presented. This approach enables the generation of accurate and robust time-domain nonlinear simulation models of modern transistors that exhibit significant memory effects. Finally an extension of the X-parameter (X-parameter is a trademark of Agilent Technologies Inc.) behavioral model to account for model memory effects of RF and microwave components will be presented. The approach can be used to model hard nonlinear behavior and long-term memory effects and is valid for all possible modulation formats for all possible peak-to-average ratios and for a wide range of modulation bandwidths. Both the device and behavioral models have been validated by measurements and are implemented in a commercial nonlinear circuit simulator.

Turkish accelerator and radiation laboratory (TARLA) is an accelerator based oscillator mode free electronlaser (FEL) facility under construction. The acceleration beamline includes a fundamental buncher (FB) in order to confine the electron beam into a compressed bunch. In this study, we demonstrate the commissioning tests of 500 W RF amplifier powering FB and present the phase stability dependence on the pressure and temperature of the water cooling line under long time run conditions.As the disturbing effects break down the synchronization between the particle and RF power during acceleration, the reasons disquieting the stability of the RF amplifier are investigated. One reason which causes disturbance in the stability is the variation in the phase of the output power. Phase variation of the output power of the RF amplifier which was measured as $\sim$10 deg/$^{\circ}$C in average initially, which was beyond permitted variation levels by the controller electronics, namely the low level RF system (LLRF), is decreased to less than $\sim$0.45 deg/$^{\circ}$C by incorporating a phase shifter. In addition, this phase variation reduction is accompanied with a reflected power at the output of the RF amplifier decline from 4.3 W (~36.33 dBm) down to 3 mW (~4.7 dBm) by utilizing a circulator, which is also important and desirable in terms of protection of the electronics in the long term run. As ensuring phase stability in the output power is very important, this work may serve as a guide since the documentation regarding the output power dependence of the water cooling line for long term run is very limited.

This paper reviews the history, evolution, and applications of silicon microwave & RF power transistors and electric power devices. The current status of silicon microwave & RF power transistors (BJT, DMOSFET, SIT) and a new kind of electric power device - RSD in HSRI are mainly presented. Important techniques for manufacturing such power devices are introduced. Future trends of such power devices are given briefly.

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

This research article presents the comprehensive design and analysis of a 2.45 GHz RF power amplifier operating at 40 dBm using GaN technology. The amplifier is built around the CGH40010F transistor and employs a Linearization with Nonlinear Components Method (LINC) for enhanced linearity. The study outlines the design methodology, including the selection of the CGH40010F transistor and the application of the LINC technique. It investigates the amplifier's performance characteristics, including power output, linearity, and efficiency at the 2.45 GHz frequency. The findings reveal a robust Class-AB GaN power amplifier capable of delivering 40 dBm of power while maintaining excellent linearity, making it suitable for demanding RF applications. The utilization of GaN technology and the LINC method demonstrates the potential for achieving high-performance amplifiers in modern wireless communication systems. In conclusion, this article provides valuable insights into the design and linearization of high-power GaN amplifiers, showcasing the capabilities of the CGH40010F transistor and the effectiveness of the LINC technique for achieving superior performance in RF power amplification.

Most existing behavioral models of the radio frequency (RF) power amplifiers assume that power amplifiers are memoryless devices. But in broadband communication systems, memory effects of the RF power amplifiers are significantly observed. The traditional memoryless models can no longer accurately depict the input-output relationship of power amplifiers. This paper investigates power amplifiers memory effects and a pre-distortion method is proposed for linearizing RF power amplifiers with memory effects. A valid behavioral model based on the Volterra series is suggested to treat memory effects. Since the characteristics of amplifiers change during transmission time, a recursive least squares algorithm with size- fixed observation matrices is developed to update the parameters of the proposed power amplifiers model. The identification algorithm can decrease computational complexity and data storage space and facilitate real-time online identification. Simultaneously, the pre-distortion model is constructed to simulate. Simulation results show that the proposed method can effectively compensate for the nonlinear distortion and memory effects of RF power amplifiers. The model's accuracy is used to evaluate power amplifiers memory effects by the enormalized mean square error (NMSE). In the end, simulation and evaluation of this pre-distortion system proceeded, and the power spectral density estimation was also applied to calculate the adjacent channel power ratio.

Although more reliable than vacuum tubes when properly applied, transistors are considerably more sensitive to abuse. When used in RF power amplifiers, they are likely to be subjected to conditions which might cause failure by second breakdown or over-dissipation. Protection against second breakdown is generally afforded by operation with supply voltages sufficiently below the breakdown level. The brute force approach to avoiding over-dissipation by limiting maximum input power to a level which can never cause over-dissipation is effective, but prevents realization of more than a small fraction of the transistor's capabilities. The transistor can be operated at a higher power level and remain protected by using circuitry which measures the power output and device temperature and adjusts the power input limit accordingly. In effect, the circuitry measures the temperature, computes the maximum permissible device dissipation at that temperature, and adjusts the power input so that the difference between power input and measured power output does not exceed the computed maximum permissible device dissipation. The use of this type of protection in one case has resulted in safe operation at 200% more power output than would have been permissible with the brute force approach.