Unseen emitter-base breakdown in RF power amplifiers- a possible hazard

Theoretical analysis of PM and AM noise introduced by common base (CB) bipolar transistor amplifier and comparison of CB and common emitter (CE) amplifiers are presented. The analysis is based on the approach and the models developed and used in the papers (1997, 1998). Power spectral densities (PSD) of PM and AM noises of CB amplifier (both wideband and 1/f type) are found as functions of a harmonic signal frequency, available power of the signal source and parameters of biasing circuits. Comparison of PM and AM noises, introduced by CB amplifier and CE amplifier with unbypassed emitter resistor is also presented and discussed. PM noise of the amplifiers is discussed taking into consideration available power of signal source that is necessary to provide the same output voltage across the same load impedance.

With the high interest in digital modulation techniques which are very sensitive to the PA nonlinearity, modern wireless communication systems require the usage of linearization techniques to improve the linear behavior of the RF power amplifier. The powerful and cheap digital processing technology makes the digital predistortion (DPD) a competitive candidate for the linearization of the PA. This thesis introduces the basic principle of DPD, its implementation on FPGA and the adaptive DPD system. The linearization of 4 PAs with DPD technique has been introduced: for the hybrid class AB PA operating at 2.6 GHz with a WiMAX testing signal, 33.7 dBm average power, 29.6 % drain efficiency, 13 dB ACPR and 9 dB NMSE improvement have been obtained; for the hybrid Doherty PA operating at 3.4 GHz with an I/Q testing signal, 35.0 dBm average power, 36.8 % drain efficiency, 12 dB ACPR and 13 dB NMSE improvement have been obtained; for the MMIC class AB PA operating at 7 GHz with an I/Q testing signal, 29.4 dBm average power, 25.7 % drain efficiency, 12 dB ACPR and 12 dB NMSE improvement have been obtained; for the two-stage PA operating at 24 GHz with an I/Q testing signal, 23.5 dBm average power, more than 14.0 % drain efficiency, 11 dB ACPR and 11 dB NMSE improvement have been obtained. The DPD algorithm has been implemented on FPGA with two methods based on LUT and a direct structure with only adders and multipliers. The block RAM on the FPGA board is chosen as the table in the LUT methods. The linearization performance for these three methods is similar. The test PA is the hybrid Doherty PA mentioned above and the test signal is the I/Q signal with 7.4 dB PAPR. 35.1 dBm average power, 36.8 % efficiency, 11 dB ACPR and 11 dB NMSE improvement have been obtained. The cost of logic resources for the direct structure method is the largest with 1,172 flip-flops, while the number of flip-flops for the two LUT methods are 263 and 583, respectively. A new adaptive algorithm has been proposed in this thesis for the adaptive DPD system. This new algorithm improves the performance in extracting the model parameters in complex number domain. With the experimental data from a combined class AB PA, the final accuracy of the model extracted by the new algorithm has been improved from -20 dB to about -40 dB and the converge speed is faster

RF power amplifiers use a wide range of active devices, such as vacuum tubes and transistors (usually BJTs or MOSFETs). Vacuum tubes, still widely used in high-power RF amplifiers.

In the recent years, there has been an increased focus on RF power amplifiers for communications especially for wireless applications. The main reasons of focus include high integration of power amplifier and low cost of production. To be able to reach the goal some theory on RF power amplifiers is necessary. The different classes of operation are explained, then the principles of impedance matching is discussed. This includes the development of the simulated load-pull method and synthesis of impedance matching networks. Then the biasing of the power amplifier is discussed along with the stability issues. RF power amplifier designing, simulation and implementation at 5MHz is described in this thesis. The issues of modeling a complete power amplifier are treated. This includes modeling of the circuit, the passive devices on-chip and off-chip as well as the package and PCB. To ease the design of power amplifier a design method is developed based on the theory and the experimental work. At last the experimental work is described. The first part is a linearization system based on simulation. Then the RF power amplifier designed during the project are introduced. The power amplifier shows superior performance when at its operating frequency 5MHz. The output power of this power amplifier is 50.419dB. The power amplifier utilizes the design method develop as well as the models described. The accurate modeling combined with superior performance proves the future of integrated RF power amplifiers for wireless communication.

RF transistors can be found in several present day electronics including mobile radio and telecommunication applications, TV & radio broadcast, avionics, radar and defense communications as well as industrial, scientific, medical (ISM) and broadcast applications. The increasing demands for data anywhere/anytime (mobile internet) requires increased deployment of wireless communication infrastructure. This has pushed upwards across the supply chain (suppliers and customers alike). At the core are RF power amplifiers (PA) with a very costly design, hence important to get it right as rework may not be possible. The assembly of RF power transistors in PA modules is the back-bone of these applications. Such modules are usually generating high power (> 100 watts) with different package outlines and lead configuration. The high power demands excellent thermal management, else product performance and lifetime (reliability) are compromised. As a consequence, the transistors are often packaged in "chunky" S OT outlines, with a cerami c/plastic body and a metal flange. Packaging such RF power modules (or PA) has historically been achieved with bolt down devices, where only the leads of the components were soldered (more akin to manual assembly operations). A thermal compound was used underneath the transistor. High volume assembly is a basic capability (with automation a necessity) to meet industry demand. There are a variety of issues to consider module assembly since there are strong interplay between design, materials and process in order to achieve the desired performance (electrical, thermal, mechanical, and reliability). Due to thermal management requirement, the transistors are normally soldered directly onto the pallet (laminate bonded onto a heat sink) with the leads and SMDs on to the laminate on the pallet. Base on the SOT outline (i.e. gull wing), a cavity or pedestal is required in the pallet with a cut-out in the laminate. Each PA module will be different in i.e. size, weight, materials, number of transistors, board construction with no two modules the same. With such spectra of possibilities in the module design and permutations on assembly processes, the paper outlines and addresses the key issues to consider and approach to achieve robust PA modules assembly. It includes but not limited to substrates, solders, heat sinks, plating, board design and reflow soldering (assembly process flow). Key to achieving the robust assembly process is an iterative approach with feedback at each step in the process including a modeled reflow profiling. In addition, a novel use of Rth (thermal impedance) in combination to acoustic microscopy / x-rays to assess the quality of the soldered interface is presented. The solder volume is key to accommodate manufacturing tolerances and solder joint reliability. Additionally, the issues presented constitute a "toll-box" for PA module assembly, including microwave pallet modules with matched input/output impedance.

The trends in RF power amplifier (RFPA) modules for handsets are optimization of active device technology, circuit topology and packaging to enhance cost, size, performance, and ease of implementation. For the package in RFPA module manufacturing, device-to-board attach solder reflow condition and moisture sensitivity level (MSL) are the most challenging areas for further improvement in thermal management due to "lead-free" application which causes catastrophic failure by high temperature application. In consequence, we have been faced with industrial requirements to improve both MSL and reflow temperature without any catastrophic phenomena such as solder extrusion and solder flow in RFPA modules. This paper discusses various considerations to define critical factors that will affect thermal and moisture induced stress in RFPA modules in long term reliability assurance at the package design stage. On the analysis of severe failure mechanisms in RFPA modules, we identified the cross effects on various characteristics of moisture induced package failures caused by the alloy composition of component terminations, behaviors of component attachment materials for active/passive, and substrate metallization with its own material. Also, best raw material combinations and critical consideration factors for package integrity of RFPA module with MSL reliability are discussed.

This paper describes an envelope predistortion linearizer scheme that uses integrated analog components for the low cost implementation of intermodulation distortion product (IMDs) reduction in RF power amplifiers (RFPAs). Integrated logarithmic amplifiers & phase detectors are used to sample the input and output signals before and after the RFPA to measure the complex gain & phase information, which is used to control an integrated pre-distorter integrated circuit (IC) that contains adjustable gain & phase components within a single IC package. Comparisons of a range of well-known and updated RFPA behavioral models are evaluated to determine the most suitable behavioral model for this linearization scheme. The simulation model also allows for the addition of RFPA memory effects and driver & RFPA noise figures to be included and compared. All component models are based on parameters extracted from device data sheets for the driver & RFPA, thus minimizing the need for special measurements.

To satisfy the continuously increasing demand for high data rates and mobility required by new wireless applications, the 5G has gained much attention recently. Radio frequency power amplifiers (RF-PAs), as one of critical components of 5G transmitter system, are becoming a hot issue. In this paper, the statistical analysis on RF PA papers shows the research on RF-PAs in Asia-Pacific and cooperation between different affiliations and countries are gradually becoming more prominent, showing the globalization trend of RF PA research and the 5G technologies. The decreased research cycle of RF PA shows the processes of research on PA and 5G technologies are speeding up. Some promising RF-PA technologies for 5G wireless communication system are also been discussed.

The developments in RF power transistor technology makes solid state transmitters economically attractive for UHF DTV terrestrial transmissions. These transmitters will probably use silicon bipolar, MOS or silicon carbide static induction transistors (SIT) in the RF power amplifiers. This paper examines these RF transistor technologies. In addition, this paper provides an overview of a typical DTV solid state transmitter. The authors have conducted DTV transmission tests and demonstrations using a silicon carbide, solid state transmitter. This paper provides a brief description of these tests.

The transmission phase variations versus gain in common emitter and common base amplifiers are analyzed revealing that these stages can be tuned to yield opposite phase characteristics versus gain. By cascading these two stages, e.g., on the basis of a cascode, and optimizing added feedback elements, it is possible to compensate these phase variations. A universal analysis based on bipolar transistors is derived. However, the insights can be mapped to other transistors such as field-effect transistors. The analysis is verified by implementation of a low-noise cascode amplifier in 0.25-mum silicon germanium heterojunction bipolar transistors. At 50-Omega terminations, 1.6-V supply voltage, 1-mA current consumption, and a gain of 7 dB plusmn 0.25 dB, a noise figure of less than 3.2 dB, and a third-order output intercept point of -3 dBm are measured within a frequency range from 5.2 to 5.9 GHz. For a gain control range of 12 and 20 dB, the transmission phase variations are reduced to 3deg and 6deg, respectively, which is around a factor of 7 better than for a conventional noncompensated cascode topology. The fully integrated circuit is well suited for wireless local area network systems applying adaptive antenna combining and operating in accordance to the 802.11 a/n standards.

Turkish accelerator and radiation laboratory (TARLA) is an accelerator based oscillator mode free electronlaser (FEL) facility under construction. The acceleration beamline includes a fundamental buncher (FB) in order to confine the electron beam into a compressed bunch. In this study, we demonstrate the commissioning tests of 500 W RF amplifier powering FB and present the phase stability dependence on the pressure and temperature of the water cooling line under long time run conditions.As the disturbing effects break down the synchronization between the particle and RF power during acceleration, the reasons disquieting the stability of the RF amplifier are investigated. One reason which causes disturbance in the stability is the variation in the phase of the output power. Phase variation of the output power of the RF amplifier which was measured as $\sim$10 deg/$^{\circ}$C in average initially, which was beyond permitted variation levels by the controller electronics, namely the low level RF system (LLRF), is decreased to less than $\sim$0.45 deg/$^{\circ}$C by incorporating a phase shifter. In addition, this phase variation reduction is accompanied with a reflected power at the output of the RF amplifier decline from 4.3 W (~36.33 dBm) down to 3 mW (~4.7 dBm) by utilizing a circulator, which is also important and desirable in terms of protection of the electronics in the long term run. As ensuring phase stability in the output power is very important, this work may serve as a guide since the documentation regarding the output power dependence of the water cooling line for long term run is very limited.

This paper reviews the history, evolution, and applications of silicon microwave & RF power transistors and electric power devices. The current status of silicon microwave & RF power transistors (BJT, DMOSFET, SIT) and a new kind of electric power device - RSD in HSRI are mainly presented. Important techniques for manufacturing such power devices are introduced. Future trends of such power devices are given briefly.

The paper provides an overview of the state of the art of RF power transistors. Several material issues relevant to RF power devices are discussed and recently published performance data of different RF transistor types is presented. Future requirements and challenges for RF transistors based on the latest issue of the ITRS (open to public access since Dec. 2005) are reviewed.

Wavelength division multiplexing (WDM) optical interconnect technology offers an effective solution for addressing the ever-increasing data traffic. Microring modulators (MRMs), owing to their high bandwidth, compact footprint, and inherent wavelength selectivity, have become key building blocks in WDM systems. However, the limited free spectral range (FSR) of MRMs restricts the number of available wavelength channels and the corresponding overall data rate capacity in WDM systems. In this study, we propose an optimized Bezier-bent MRM, in which the device radius is reduced to 3 μm to significantly enhance the FSR. The proposed MRM operates without the need for a DC bias voltage and an RF amplifier, exhibiting a low insertion loss of 0.4 dB, an ultrawide FSR exceeding 4 THz, and a high electro-optic bandwidth of over 110 GHz. Back-to-back (BtB) transmission experiments demonstrate that the modulator supports 400 Gbps PAM-8 data transmission under a driving voltage of only 1 V, satisfying the 7% hard-decision forward error correction (HD-FEC) bit-error-rate (BER) threshold of 3.8 × 10–3. Owing to the compact-radius design, the junction capacitance is substantially reduced, enabling an exceptionally low modulation power consumption of 0.2 fJ/bit. The proposed MRM presents significant potential for dense integration in future optical communication systems.

This paper presents the dc and high-frequency performances of laterally diffused metal–oxide–semiconductor (LDMOS) transistors with superjunction (SJ) structures. The SJ-LDMOS transistors were fabricated using a 0.5-µm CMOS process. By utilizing a modified SJ/RESURF layout (Type I) or a tapered SJ layout (Type II) in our devices, better high-frequency performances and higher breakdown voltages are achieved compared with conventional SJ counterpart, owing to the suppression of the substrate-assisted depletion effect and the reduction of the drain resistance. For Type I device with an optimal SJ layout dimension, the cutoff frequency and the breakdown voltage are 3.7 GHz and 68 V, respectively. For Type II device with a smallest p-pillar width near the drain, they can be enhanced further and reach to 4.9 GHz and 83 V. These experimental results suggest that the SJ-LDMOS can be used in the RF power amplifiers.