The Role of Non-Positional Arithmetic on Efficient Emerging Cryptographic Algorithms

Fully Homomorphic Encryption (FHE) permits processing information in the form of ciphertexts without decryption. It can ensure the security of information in common technologies used today, such as cloud computing, the Internet of Things, and machine learning, among others. A primary disadvantage for its practical application is the low efficiency of sign and comparison operations. Several FHE schemes use the Residue Number System (RNS) to decrease the time complexity of these operations. Converting from the RNS to the positional number system and calculating the positional characteristic of a number are standard approaches for both operations in the RNS domain. In this paper, we propose a new method for comparing numbers and determining the sign of a number in RNS. We focus on the even ranges that are computationally simple due to their peculiarities. We compare the performance of several state-of-art algorithms based on an implementation in C++ and relatively simple moduli with a bit depth from 24 to 64 bits. The experimental analysis shows a better performance of our approach for all the test cases; it improves the sign detection between 1.93 and 15.3 times and the number comparison within 1.55–11.35 times with respect to all the methods and configurations.

A methodical FHE-based cloud computing model

Residue number system (RNS) representations that contain redundant moduli have been extensively studied with regard to their error checking properties. A second form of redundancy in RNS, that of redundant residues, has been applied in certain application contexts to gain speed and cost benefits. Such applications are developed in an ad hoc manner and there does not exist a theoretical framework for the latter variety of redundant RNS. We develop a theory of RNS representations with redundant residues and show how representation parameters affect the speed and complexity of various arithmetic operations. The theory parallels that of redundant signed-digit representations in that at issue are choice of 'residue sets' (akin to digit sets), encoding of residue sets, conversions between residue sets with different degrees of redundancy, including none, and algorithms for arithmetic on redundant-residue operands.

Fully homomorphic encryption (FHE) and zero-knowledge proofs (ZKPs) are emerging as solutions for data security in distributed environments. However, the widespread adoption of these encryption techniques is hindered by their significant computational overhead, primarily resulting from core cryptographic operations that involve large integer arithmetic. This paper presents a formalization of multi-word modular arithmetic (MoMA), which breaks down large bit-width integer arithmetic into operations on machine words. We further develop a rewrite system that implements MoMA through recursive rewriting of data types, designed for compatibility with compiler infrastructures and code generators. We evaluate MoMA by generating cryptographic kernels, including basic linear algebra subprogram (BLAS) operations and the number theoretic transform (NTT), targeting various GPUs. Our MoMA-based BLAS operations outperform state-of-the-art multi-precision libraries by orders of magnitude, and MoMA-based NTTs achieve near-ASIC performance on commodity GPUs.

Public‐key cryptosystems such as elliptic curve cryptography (ECC) and Rivest–Shamir–Adleman (RSA) are widely used for data security in computing systems. ECC provides a high level of security with a much smaller key than RSA, which makes ECC a preferred choice in many applications. This study proposes a multi‐key ECC based on the residue number system. The proposed architecture employees deep pipelining to allow the concurrent encryption of 21 keys. The proposed architectures are implemented on two different field programmable gate array (FPGA) platforms and results are compared with existing ECC architectures. The proposed implementation on Virtex‐7 FPGA achieves a throughput of 1816 kbps at a clock frequency of 73 MHz.

The work is devoted to the study of the properties of the left-shift operator $Q_{s}^{*}$-representation of real numbers and the study of the type of distribution of the sequences produced by the corresponding operator. The $Q_{s}^{*}$-representation of real numbers is a natural generalization of the classical s-representation and is topologically similar to the latter. E. Borel's classic result that almost all numbers are s-normal was over time translated into the terms of uniformly distributed sequences produced by the left-shift operator of the digits of the corresponding representation. It was proved that a number is s-normal only when the corresponding sequence generated by this number in the sense of the left shift operator is uniformly distributed. Despite the topological similarity between the $Q_{s}^{*}$-representation of real numbers and the classical s-representation, proving similar results for the former requires fundamentally new approaches that include the use of the apparatus of ergodic theory. The absence of the effect of metric transitivity of the appearance of digits, which is characteristic of the classical s-representation, does not allow the use of appropriate approaches to the $Q_{s}^{*}$-representation. The construction of normal numbers in various representation systems is a separate non-trivial problem and is the subject of many studies. In many cases, criteria for the normality of numbers, which can have a continuous structure (similar to the classical criteria of uniform distribution of the sequence) or a discrete structure, are useful for constructing the corresponding numbers. This paper presents generalizations of discrete criteria for the normality of numbers, which applied both to the classical s-representation and to the $Q_{s}$-representation of real numbers (the latter is a partial case of the $Q_{s}^{*}$-representation).

In the Taguchi’s experimentations, orthogonal arrays, interaction tables, and linear graphs are provided for planning experiments, but they become quite unwieldy when the number of runs is large. The purpose of this article is to propose a quick and easy method for obtaining two‐factor interaction columns in two‐level orthogonal arrays. Geometrical designs proposed by Plackett and Burman are two‐level orthogonal arrays and can be obtained very easily by a successive doubling method. Based on the property of doubling, a NR method using a number representation system whose base is a power of 2 is derived in this article for obtaining two‐factor interaction columns in geometrical designs. Furthermore, since Taguchi’s two‐level orthogonal arrays are obtainable by successive doubling with some column permutations, it is shown that their two‐factor interaction columns can be obtained directly by using the NR method without looking up tables.

The Residue Number System (RNS) is a numeral representation enabling for more efficient addition and multiplication implementations. However, due its non-positional nature, modular reductions, required for example by Elliptic Curve (EC) Cryptography (ECC), become costlier. Traditional approaches to RNS modular reduction resort to the Montgomery algorithm, underpinned by large basis extensions. Recently, Hybrid-Positional Residue Number Systems (HPRs) have been proposed, providing a trade-off between the efficiency of RNS and the flexibility of positional number representations. Numbers are represented in a positional representation with the coefficients represented in RNS. By crafting primes of a special form, the complexity of reductions modulo those primes is mitigated, relying on extensions of smaller bases. Due to the need of crafting special primes, this approach is not directly extensible to group operations over currently standardised elliptic curves. In this paper, the Hybrid-Polynomial Residue Number System (HyPoRes) is proposed, enabling for improved modular reductions for any prime. Experimental results show that the modular reduction of HyPoRes, although at most 1.4 times slower than HPR for HPR-crafted primes, is up to 1.4 times faster than a generic RNS approach for primes of ECC standards.

Security in embedded systems is of critical importance since most of our secure transactions are currently made via credit cards or mobile phones. Power analysis-based side channel attacks have been proved as the most successful attacks on embedded systems to retrieve secret keys, allowing impersonation and theft. State-of-the-art solutions for such attacks on public key cryptographic algorithms, such as elliptic curve cryptography, mostly in software, hinder performance and repeatedly attacked using improved techniques. To protect these public key ciphers from both simple power analysis and differential power analysis, as a hardware solution, we propose to take advantage of the inherent parallelisation capability in multi-modulo residue number systems (RNS) architectures to obfuscate the secure information. Random selection of moduli is proposed to randomly choose the moduli sets for each key bit operation. This solution allows us to prevent power analysis, although still providing all the benefits of RNS. In this study, the authors show that differential power analysis, cross correlation analysis and correlation power analysis for a simple binary double-and-add operation are thwarted using their solution.

In Residue Number System (RNS), a large integer is represented as a set of smaller integers called residues. Redundant Residue Number System (RRNS) is obtained by adding some redundant residues which brings in error detection and error correction capability. This capability makes RRNS a promising way to provide a very fast arithmetic in the field of digital computers. At the receiver, RRNS codes are decoded using Chinese Remainder theorem (CRT). An alternative scheme called Mixed Radix Conversion (MRC) is also used which results in low decoding complexity when compared to CRT. This paper presents a single bit error correction algorithm using RRNS. This algorithm doesn't require table lookup which helps to save memory during implementation. Representative examples are given.

We propose in this paper a new algorithm and architecture for performing divisions in residue number systems. Our algorithm is suitable for residue number systems with large moduli, with the aim of manipulating very large integers on a parallel computer or a special-purpose architecture. The two basic features of our algorithm are on one hand the use of a high-radix division method, and on the other hand the use of a floating-point arithmetic that should run in parallel with the modular arithmetic.

In many applications integer computations are to be performed modulo some given constant. One such area is cryptology, where often multiplications, inversions, and exponentiations are to be performed modulo some very large integer. Hence we shall here investigate algorithms for such operations in their own right, but also because these can be used as primitives for the implementation of multiple modulus systems, also denoted residue number systems and abbreviated to RNSs. Here an integer is represented by a set of residues (the values of the integer modulo a set of given integer moduli, often chosen to be prime numbers).

The residue number system (RNS) allows high accuracy integer-valued arithmetic operations to be decomposed into independent (carry-free), low accuracy computations that can be performed in parallel. The RNS thus provides an attractive alternative to weighted number systems (e.g., binary or decimal) for high speed numerical computing1. The residue number representation is completely specified by a set of relatively prime moduli. The overall dynamic range is given by the product fo the moduli. Although this dynamic range can be arbitrarily high, the dynamic range required in any individual subcalculation is commensurate only with the associated modulus. The RNS also leads to a reduction in the growth of the total number of combinatorial logic elements required to perform a calculation via truth table approach. Specifically, the RNS exhibits additive growth in spatial complexity with input word size, contrasted by multiplicative (exponential) growth for weighted number systems.

The authors discuss employing alternative number systems to reduce power dissipation in portable devices and high-performance systems. They focus on two alternative number systems that are quite different from the conventional linear number representations, namely the logarithmic number system (LNS) and the residue number system (RNS). Both have recently attracted the interest of researchers for their low-power properties. The authors address aspects of the conventional arithmetic representations, the impact of logarithmic arithmetic on power dissipation, and discuss the low-power aspects of residue arithmetic.

We present an algorithm for simultaneous conversions between a given set of integers and their Residue Number System representations based on linear algebra. We provide a highly optimized implementation of the algorithm that exploits the computational features of modern processors. The main application of our algorithm is matrix multiplication over integers. Our speed-up of the conversions to and from the Residue Number System significantly improves the overall running time of matrix multiplication.