Thermal management and concurrent system design of a wearable multicomputer

Layer-by-layer assembled phase change composite with paraffin for heat spreader with enhanced cooling capacity

Hydronic radiant floor heating systems are recognized as an efficient means of heating residential and commercial buildings. These systems utilize water flowing in tubes to move thermal energy from a heat source to a radiant panel located beneath the floor of the room being heated. The efficiency of such systems depends on many factors but a major concern is the ability of the radiant panel to remove heat from the water tubes and spread it effectively across the floor. Conventional radiant panels use aluminum heat spreaders to do this. Much work has been done to determine the overall performance of rooms heated by radiant panels, but little work has been done to measure the thermal performance of heat spreaders in these panels. This paper describes the development of a test method, using thermal imaging of test panels, to measure the performance of these heat spreaders. This method is used to determine the thermal performance of commercially available aluminum heat spreaders and of advanced heat spreaders made from flexible graphite. Graphite heat spreaders have found wide acceptance in a variety of electronic applications including plasma and LED displays, laptop computers and cell phones. This paper also examines the thermal properties of graphite that make it attractive as a radiant panel heat spreader. The development of high thermal conductivity, flexible graphite spreaders for various radiant panel applications is described. These graphite heat spreaders improve the performance of radiant panel systems and allow the use of high efficiency, low temperature heat sources.

Electronic thermal packaging design continues to look for novel solutions for enhancing the performance of microelectronic cooling solutions. Driven by increasing thermal performance requirements, particularly in densely packaged militarized electronic systems and other high density or extreme use products, thermal designers are showing that to achieve the necessary cooling, combinations of existing technologies may offer further enhancement than has already been demonstrated. This paper discusses the performance characteristics of a single phase, pumped liquid cooling system (LCS) employed in cooling microprocessors and considers the effects of including solid state cooling (a.k.a thermoelectric cooling) in conjunction with the pumped liquid system. The thermal performance of a baseline LCS without TEC is compared to the performance of a LCS with a TEC combined with two alternative "flux transformer" heat spreaders. The two alternative flux transformers included a solid copper plate and vapor chamber heat pipe. Each "flux transformer" was sandwiched between the concentrated thermal load of the microprocessor and the TEC. The paper discusses the predicted thermal performance for the various systems as well as presenting experimental results. In demonstration, the experimental results show that the addition of TEC's coupled with the vapor chamber heat pipe "flux transformer" provided the most favorable improvement in system performance over the power dissipation range tested. As the TEC electrical power was increased, the temperature gradient across the TEC's increased reducing their coefficient of performance. Eventually, the combined TEC and vapor chamber heat pipe flux transformer solution matched, and then exceeded the heat sink temperature achievable with a conventional single phase pumped liquid cooling system. For microprocessor and ASIC heat dissipations of up to 175 watts, this particular pumped liquid system incorporating TEC's coupled with a vapor chamber heat pipe flux transformer can significantly reduce processor temperatures.

A new fractional non-Fourier (Cattaneo) photovoltaic (PV) model is presented to enhance the thermal performance of a PV system combined with a heat spreader (HS). The fractional Cattaneo model is shown to be effective in examining transient processes across the entirety of a PV system, in contrast to the conventional Fourier model’s inability to predict system performance. Consequently, a comparison is conducted between the classical Fourier model with the fractional Fourier and fractional Cattaneo models for the PV system. The impact of using an aluminum heat spreader, with rectangular and trapezoidal shapes, has been developed under hot and cold climate conditions. The findings show that adding a trapezoidal heat spreader reduced the cell temperature by 20 K in summer and 12 K in winter. The reduction in the PV temperature led to an enhancement in daily average power by approximately 28% and 37% in hot and cold weather, respectively. Moreover, economic, exergoeconomic, and enviroeconomic assessment is introduced. The outcomes revealed that the electrical production costs of the rectangular and trapezoidal HS systems are 0.272 and 0.214 $/kWh, respectively, while about 0.286 $/kWh for the conventional PV panel. Based on the environmental study, the estimated CO2 reduction for PV, PV with rectangular HS, and PV with trapezoidal spreader is 0.5504, 0.7704, and 0.8012 tons, respectively. Finally, real experimental data are used to validate the fractional Cattaneo model. The results demonstrate that there is a great fitting with the measured data, with errors in PV power and exergy efficiency of just 0.628% and 3.84%, respectively, whereas their corresponding values for the classical model are 5.72 and 13.13%.

The 45。heat spreading angle is familiar among thermal designers. This angle has been used for thermal design of electronic devices, and provides a heat spreading area inside a board, e.g. printed circuit board, which is placed between a heat dissipating element and a relatively large heat sink. By using this angle, the heat transfer behavior can be estimated quickly without using high-performance computers. In addition, the rough design can be made easily by changing design parameters. This angle is effective in a practical situation; however, the discussion has not been made sufficiently on the applicability of the 45。heat spreading angle. In the present study, therefore, the extensive numerical investigation is conducted for the rational thermal design using the 45。heat spreading angle. The two-dimensional mathematical model of the board is considered; the center of the top is heated by a heat source while the bottom is entirely cooled by a heat sink. The temperature distribution is obtained by solving the heat conduction equation numerically with the boundary conditions. From the numerical results, the heat transfer behavior inside the board is shown and its relation with the design parameters is clarified. The heat transfer behavior inside the 45。heat spreading area is also evaluated. The applicability is moreover discussed on the thermal resistance of the board obtained by the 45。heat spreading angle. It is confirmed that the 45。heat spreading angle is applicable when the Biot number is large, and then the equations are proposed to calculate the Biot number index to use the 45。angle. Furthermore, the validity of the 45。heat spreading angle is also confirmed when the isothermal boundary condition is used at the cooled section of the board.

As products become ever more diversified, their life cycles are becoming shorter. To reduce production costs, increased process automation and concurrent design are priorities. Therefore, a collaborative integrated design system is crucial in the mold design and manufacturing process. This research develops a collaborative navigation system for concurrent mold design within the computer-aided design (CAD) browser, using Pro/Web.Link as the core tool. Providing both concurrent engineering and collaborative design functions, the navigation system is capable of assisting designers in accomplishing 3D mold development efficiently and accurately with the help of the standard component library and design decision-making system. The results show significant time savings over other mold design process methodologies.

The development of high power and compact size semiconductor packages lead to the challenge in the need of high thermal dissipation design. For package level thermal solution, metal (especially copper) heat spreader and metal/metal-oxide filler thermal interface material are widely adopted. However, the thermal performance of packages is limited by isotropic conductive behavior of most of these materials. The thermal conducting performance could be further improved by directing the heat transportation in the direction desired, for instances the in-plane dissipation for heat spreader and the out-of-plane dissipation for thermal interface material. This present study reported the successful adoption of anisotropic thermal conductive pyrolytic graphite sheet as heat spreader and vertically aligned graphite sheet as thermal interface material in semiconductor package, individually. The Joint Electron Device Engineering Council standard still air junction to ambient measurement experiment shows that a flip chip ball grid array package incorporated with a pyrolytic graphite sheet as heat spreader improved thermal resistance of the module by 20%. The thermal dissipation behavior of the module was simulated with a well validated computational thermal dynamics model based on the experimental results. The anisotropic thermal conductive vertically aligned graphite sheet was also adopted as thermal interface material to replace the nowadays grease type thermal interface material. A thermal test chip assembled large size high performance flip chip ball grid array package mounted on a Joint Electron Device Engineering Council defined 4 layers thermal test printed circuit board was chosen as the test vehicle for thermal interface material performance test. The junction to case measurement experiment shows that the package with the anisotropic conductive thermal interface material improved the thermal resistance by 40%. Some novel designs were proposed basing on the application of this anisotropic thermal conductive material as validated by thermal simulation study. Package design guideline basing on the implementation of the anisotropic thermal conductive material will be discussed in this paper.

The design and development of a 68-lead nonhermetic leaded chip carrier (CC) suitable for Packaging a high-speed bipolar gate array device with several watts of power dissipation are covered. This CC was designed to make use of thin-film hybrid assembly technology with a package outline generally consistent with the JEDEC Leaded Type A Standards. The CC is compatable with different silicon integrated circuit (SIC) attachment methods and provides high thermal performance. The CC was constructed using titanium/palladium/gold thin-film circuitry on 99.5 percent alumina, with package leads attached to the thin-film circuit by thermal compression bonding. The assembly of the silicon device to the ceramic involved epoxy die bonding and thermosonic gold wire bonding. The majority of the work on the CC was performed with a thermal test chip. The assembled CC device was coated with RTV and an epoxy for environmental protection, and the external leads were formed around a plastic insert to meet the JEDEC outline. An aluminum heat spreader was attached to the back surface of the ceramic. A surface solder method for the attachment of the CC to a printed wiring board (PWB) was developed. The fatigue resistance of the solder joints was demonstrated to be adequate. Temperature rise versus power measurements were made on CC's with and without heat spreaders and on a CC/PWB assembly. From the data, the thermal · resistances of the packages were determined and used in defining a simple model of the CC package and a CC/PWB package combination. Depending on the environment of the CC device, a forced air velocity range was determined to maintain chip junction temperatures below allowed maximums. It was determined that the thermal performance of the CC packaged device would be satisfactory for use with a 2-W chip in a moderate forced air environment.

In this study, thermal design and thermal management for a low-cost photonic integrated circuits (PIC) platform is proposed and analyzed. The involved PIC platform is targeted for various applications including optical communications, optical interconnects, signal processing and sensing. The module considered in this study consists of a rigid PCB made of FR4 material and a silicon photonics ICs platform on which a laser diode chip, a driver chip, and a trans-impedance amplifier (TIA) chip are jointed using solder balls. A kovar case is chosen for the module. For the thermal design and thermal management, two objectives are involved in this study. The first one is to reduce the thermal resistance from junction to ambient and the other one is to reduce the thermal cross talk between the driver/TIA chips and laser source chip. The following accomplishments are achieved in this study. The overall junction to ambient thermal resistance is reduced to a certain level and meets the design target. The thermal cross effect between the driver/TIA chips and the laser source chip is reduced by cutting a slot in the silicon photonic platform and implementing separated heat spreaders for these chips.

Evaluation of analytical models for thermal analysis and design of electronic packages

In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for high-performance chip-multiprocessor (CMP) design. We propose a new approach, called ParThermPOF, to build the parameterized thermal performance models from the given architecture thermal and power information. The new method can include a number of parameters such as the locations of thermal sensors in a heat sink, different components (heat sink, heat spread, core, cache, etc.), thermal conductivity of heat sink materials, etc. The method consists of two steps: first, response surface method based on low-order polynomials is applied to build the parameterized models at each time point for all the given sampling nodes in the parameter space. Second, an improved generalized pencil-of-function (GPOF) method is employed to build the transfer-function based behavioral models for each time-varying coefficient of the polynomials generated in the first step. Experimental results on a practical quad-core microprocessor show that the generated parameterized thermal model matchs the given data very well. ParThermPOF is very suitable for design space exploration and optimization where both time and system parameters need to be considered.

The author demonstrates the natural extension of the box structure theory and techniques of system development to concurrent system design. The semantics and syntax of box structures for designing concurrency are presented. Concurrent box structure designs for several concurrent system environments are shown. Extensions to more complex environments are suggested. >

Thermal Management optimization for data centers, including prediction of airflow and temperature distributions, is generally an extremely time-consuming process using full-scale CFD analysis. Reduced order models are necessary in order to provide real-time assessment of cooling requirements for data centers. The use of a simulation-based Artificial Neural Network (ANN) is being investigated as a predictive tool. A model for a basic hot aisle/cold aisle data center configuration was built and analyzed using the commercial software FloTHERM. The flow field and temperature distributions were obtained for 100 representative sets of operating conditions using the CFD package. The Latin Hypercube Sampling technique was employed to select values for three design variables: plenum height, percentage open area of the perforated tiles and air leakage fraction. The FloTHERM results were used to generate a database for the ANN training. The CFD results from 85 cases were used for training and 16 cases were used for validation. A multivariate mapping between the input design variables and output variables (individual tile flow rates and maximum rack temperatures) was obtained. Good agreement (0.5% average relative error) was obtained between the ANN model predictions and the CFD results. These preliminary results are promising and show that an ANN based model may yield an effective real-time thermal management design tool for data centers.

A thermal solution for an array of voltage transformer modules which are cooled by a large area, common aluminum heat spreader for a high end server was evaluated using an in situ, capacitive bond line thermal measurement technique. The method measures the capacitance of a non-electrically conducting thermal interface material (TIM) between the electronic module and heat spreader to quantify the TIM bond line effective thickness during assembly and operation. The thermal resistance of the TIM has the same geometric dependence as the inverse of capacitance, therefore, the capacitive technique also provided a monitor of the thermal performance of the interface. This technique was applied to measure the bond line in real time during the assembly of the heat spreader to an array of 37 modules mounted on a printed circuit board. The results showed that the target bond lines were not achieved by application of a constant force alone on the heat spreader, and guided an improved assembly process. The mechanical motion of the TIM was monitored in situ during thermal cycling and found to fluctuate systematically from the hot to cold portions of the thermal cycle, either compressing or stretching the TIM respectively. The capacitive bond line trend showed thermal interface degradation vs. cycle count for several modules which was confirmed by disassembly and visual inspection. Areas of depleted TIM ranged as high as 25% of the module area. Several design and material changes were shown to improve the TIM stability. Power cycling tests were run in parallel to the thermal cycle tests to help relate the results to field performance. The capacitance technique enabled the development and verification of a thermal solution for a complex mechanical system early in the development cycle.

Traditional approaches to addressing issues of concurrency rely on mechanisms added to standard imperative languages such as Java, such as “synchronized” methods and blocks, combined with a “wait/notify” mechanism used to block and awaken processes when a shared resource is not in an acceptable state. The problem with this approach, however, is that mutable state is potentially accessible via many paths, and each such path must be analyzed for possible race conditions, deadlocks, and safety violations.The root cause of many concurrency problems is attributable to shared, mutable state. In light of this, two approaches to mitigating concurrency problems are immutable variables and state isolation within distinct concurrent actors. Erlang, a language developed at Ericsson for distributed, fault-tolerant switches, is a language supporting both approaches. This paper reports on an experiment to include Erlang as part of an existing course on concurrent systems design. This version of the course is currently underway, and the Erlang material is being introduced as this is written. Results from the approach will be ready well before the conference, and should serve as an inspiration (or warning) to others considering such a change.