Threading Dislocation Densities in GaAs Grown on Reduced Area Si Substrates

This paper reports on a new approach for reducing the threading dislocation density in GaAs on Si. We have used InxGa1-xAs/GaAs strained-layer superlattices (SLSs) grown on GaAs/Si at 300°C by migration-enhanced epitaxy as threading dislocation barriers. Different from conventional high-temperature-grown SLSs, the low-temperature-grown SLSs are only slightly relaxed by misfit dislocation formation at GaAs/SLS interfaces. Thus, considerable strain can be accumulated in SLS. In addition, new threading dislocation generation due to the misfit dislocation can be suppressed. These factors lead to effective threading dislocation bending and to significant reduction in the dislocation density. For the samples with a SLS of x=0.3, the average etch-pit density is 7×104 cm-2, which is the lowest value ever reported.

Evolution of threading dislocations in MOCVD-grown GaN films on (1 1 1) Si substrates

Epitaxial lateral overgrowth (ELO) has been used to reduce threading dislocation (TD) densities in GaN. This paper reports transmission and scanning electron microscopy studies of TDs in GaN films grown by ELO on GaN nanocolumns produced either during growth by MBE (method 1), or by self‐organised patterning on a uniform layer grown by MOCVD (method 2). In method 1, isolated nanocolumns grew without TDs, but some TDs formed when nanocolumns coalesced. Although some of these TDs extended through the overlayer, extensive lateral migration of others, depending on the dislocation type, led to dislocation annihilation, lowering the overall TD density. In method 2, a similar process of lateral migration of TDs was observed during ELO, resulting in a continuous GaN overlayer with TD densities less than 108 cm–2. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Reducing threading dislocation density in GaSb photovoltaic devices on GaAs by using AlSb dislocation filtering layers

Low threading dislocation Ge on Si by combining deposition and etching

The influence of annealing conditions on the crystallinity of Ge deposited on Si(001) is investigated. Ge deposited with postannealing at 800 °C and 850 °C, five cycles of postannealing at 750 °C and 850 °C (temperature-swing postannealing) and several cycles of annealing at 800 °C or 850 °C during the Ge growth by interrupting the deposition step (cyclic annealing) are compared. To check the threading dislocation density (TDD) of the deeper part of the Ge, thinning by HCl vapor phase etching (VPE) followed by Secco defect etching is performed for 5 μm thick Ge of all three annealing variants. By comparing the TDD of the same Ge thickness with and without HCl VPE, TDD reduction by VPE is observed for the sample using the cyclic annealing process only. Lower TDD is observed at higher postannealing temperature. By the five cycles of temperature swinging, TDD becomes around a half compared to conventional postannealing at 850 °C. In the case of the cyclic annealing process significant improvement of TDD is observed with increasing Ge thickness. Even at a maximum temperature of 800 °C, the same or lower TDD levels were observed for higher than 2 μm thick Ge compared to that with five cycles of temperature-swing postannealing. For the sample with cyclic annealing at 800 °C, a lower Si diffusion length into Ge is also observed for the cyclic annealing process indicating a lower thermal budget. A lower amount of tilted Ge planes at the interface is confirmed showing higher crystal quality also in the deeper part of the Ge layer.

To fabricate deep-ultraviolet (DUV) LEDs with high efficiency, the crystallinity of AlGaN must be improved, which is strongly influenced by the quality of the underlying AlN template. Face-to-face annealed sputter-deposited AlN templates (FFA Sp-AlN) on sapphire substrates have achieved screw and edge threading dislocation densities (TDDs) as low as 10⁴cm⁻² and 10⁷cm⁻², respectively. The reduction of TDDs in FFA Sp-AlN and the resulting surface flattening of AlₓGa₁₋ₓN layers grown on it play critical roles in enhancing the external quantum efficiency (EQE). Following MOVPE homoepitaxial AlN growth, the FFA Sp-AlN exhibits an atomically smooth surface morphology. The EQE of UV-C LEDs fabricated on FFA Sp-AlN increased as the TDDs decreased. A maximum EQE of 8.0% and output power of 6.6mW at a 20mA injection current were achieved, with a peak emission wavelength of 263nm. Furthermore, we successfully fabricated LEDs with emission wavelengths of 230nm and 236nm on FFA Sp-AlN templates.

GaN/sapphire layers have been grown by Metal Organic Vapour Phase Epitaxy (MOVPE). An amorphous silicon nitride layer is deposited using a SiH4/NH3 mixture prior to the growth of the low temperature GaN buffer layer. Such a process induces a 3D nucleation at the early beginning of the growth, resulting in a kind of maskless ELO process with random opening sizes. This produces a significant decrease of the threading dislocation (TD) density compared to the best GaN/sapphire templates. Ultra Low Dislocation density (ULD) GaN layers were obtained with TD density as low as 7×107cm−2 as measured by atomic force microscopy (AFM), cathodoluminescence and transmission electron microscopy (TEM). Time-resolved photoluminescence experiments show that the lifetime of the A free exciton is principally limited by capture onto residual donors, similar to the situation for nearly dislocation-free homoepitaxial layers.

Heterojunction bipolar transistors (HBTs) with GaAs0.825P0.175 bases and collectors and In0.40Ga0.60P emitters were integrated monolithically onto Si substrates. The HBT structures were grown epitaxially on Si via metalorganic chemical vapor deposition, using SiGe compositionally graded buffers to accommodate the lattice mismatch while maintaining threading dislocation density at an acceptable level (∼3 × 106 cm−2). GaAs0.825P0.175 is used as an active material instead of GaAs because of its higher bandgap (increased breakdown voltage) and closer lattice constant to Si. Misfit dislocation density in the active device layers, measured by electron-beam-induced current, was reduced by making iterative changes to the epitaxial structure. This optimized process culminated in a GaAs0.825P0.175/In0.40Ga0.60P HBT grown on Si with a DC current gain of 156. By considering the various GaAsP/InGaP HBTs grown on Si substrates alongside several control devices grown on GaAs substrates, a wide range of threading dislocation densities and misfit dislocation densities in the active layers could be correlated with HBT current gain. The effect of threading dislocations on current gain was moderated by the reduction in minority carrier lifetime in the base region, in agreement with existing models for GaAs light-emitting diodes and photovoltaic cells. Current gain was shown to be extremely sensitive to misfit dislocations in the active layers of the HBT—much more sensitive than to threading dislocations. We develop a model for this relationship where increased base current is mediated by Fermi level pinning near misfit dislocations.

The effect of varying threading dislocation densities on the internal quantum efficiencies (IQEs) of InGaN quantum wells (QWs), with and without intentionally created “V-pits,” is reported here. InGaN QW samples grown on GaN-on-sapphire templates with threading dislocation densities of <1 × 108 and <1 × 109 cm−2 are compared, with and without GaN/InGaN superlattice (SL) layers incorporated to intentionally open up the threading dislocation cores and form large-size “V-pits.” The formation of “V-pits” is confirmed by cross-sectional transmission electron microscopy to initiate from threading dislocations in the SL layers. The densities of the pits are confirmed by plan-view SEM to agree with the substrate threading dislocation densities. The experimental room temperature IQEs of the “V-pit” QW samples are enhanced to 15% ± 1% compared to 6% ± 2% for conventional QW samples. Both conventional and “V-pit” samples show insensitivity to the magnitude of the dislocation densities with respect to IQE performance, while the “V-pit” samples show shifts in the peak emission wavelengths compared to the conventional samples, attributed to strain modulation. This study provides additional understanding of the causes of the observed insensitivity of the IQEs to different threading dislocation densities.

Line, point and surface defect morphology of graded, relaxed GeSi alloys on Si substrates

The high density of threading dislocations, often leading to the formation of invertedhexagonal pits in InGaN/GaN heterostructures on sapphire substrates, lowersthe radiative efficiency of light emitting devices. In this study, a cracked AlGaNtemplate has been implemented as a strain-relaxed layer for subsequent growth ofInGaN/GaN heterostructures. The detailed electron microscopy and surface topographicanalyses show that such a template has led to a reduction of threading dislocationdensity especially for screw dislocations and V-pits in the overgrown InGaN/GaNlayers. The relaxed regrowth of such heterostructures also leads to an improvedcrystalline quality and a higher In incorporation in InGaN. The improvement inthe optical and structural quality of these InGaN/GaN layers is investigated bymeans of photoluminescence spectroscopy and transmission electron microscopy.

We report on the reduction of the threading edge dislocation density of Al 0.15 Ga 0.85 N buffer layers for efficient 350nm light-emitting diodes (LEDs). Structures were grown by metalorganic vapor phase epitaxy (MOVPE) on (0001) sapphire substrates using three-dimensional (3D) facetted GaN nucleation islands. The flattening of the overgrowing AlGaN buffer layers could be controlled by choosing appropriate growth conditions resulting in smooth surfaces. High-resolution X-ray diffraction (HRXRD) ω-scans show that a prolonged 3D growth phase leads to a narrowing of the asymmetric diffraction peaks and hence to an effective reduction of the density of edge-type threading dislocations. Photoluminescence (PL) and electroluminescence (EL) measurements show directly the beneficial effect of the improved crystal quality on the optical emission properties. The output power of LED structures grown on an optimized buffer was increased by a factor of 6 compared to structures grown on a two-dimensional (2D) low Al content AlGaN nucleation layer.

Development of analytical model for strained silicon relaxation on (100) fully relaxed Si 0.8Ge 0.2 pseudo-substrates

We have grown blue light-emitting diodes (LEDs) with low threading dislocation densities (TDDs) by using SiN interlayers on Si (111) substrates. Our growth technique using SiN layers makes it possible to decrease twist components (edge-type threading dislocation components). The edge-type TDDs are almost the same values as those of LEDs grown on Al₂O₃ (0001) substrates. EQE of LEDs grown on Si (111) substrates increases with decreasing edge-type dislocation in the low-current-density region, and the EQE of the sample with low TDD is almost as high as that of the LED grown on an Al₂O₃ (0001) substrate at room temperature. It is found that the hot/cold factors (HCFs) of LEDs grown on Si (111) substrates increase with decreasing edge-type dislocations in the low-current-density region, but are less than those of an LED grown on an Al₂O₃ (0001) substrate. Time-resolved photoluminescence (TRPL) shows that the dominant origin of the thermal quenching is edge-type dislocations in our samples, but other defects such as screw-type dislocations also contribute to it. We also found the fluctuated emission patterns consisting of bright and dark areas originated from the difference of Shockley–Read–Hall (SRH) type defect densities in the multi-quantum wells (MQWs) grown on Si (111) substrates. The bright areas spread, and the configurations of the bright areas change into ring-like patterns with reducing edge-type TDDs. We suggest that the internal quantum efficiency (IQE) of dark areas should be promoted to improve the performance of the MQWs grown on Si (111) substrates.