Topological formulas for switched capacitor networks

The paper describes an extension of Moschytz and Brugger's signal-flow graph analysis of switched capacitor (SC) networks. The approach is based on the application of the ‘direct topological rules’ of graph theory. The method enables speedy hand analysis of general SC networks of medium complexity, and is especially effective for the analysis of passive SC circuits. To become familiar with the writing by-inspection of the driving-point and transfer functions, the first part of the paper briefly reviews the direct analysis of reciprocal networks.

This article proposes an enhanced non-isolated high-gain DC-DC converter for interfacing renewable energy sources (RESs). This converter utilizes active switched-inductor (ASL) and switched-capacitor (SC) networks in which the ASL network increases the voltage gain. Furthermore, using the SC network as a multiplier cell helps to reach a high voltage conversion ratio with a proper duty cycle. The main advantages of the proposed converter are the high voltage gain, continuous input current, and low voltage stress on the semiconductor switch and the passive component. Since the voltage stress of the semiconductor element is low, a low ON-state resistance switch is used, which leads to reduced conduction losses. Comprehensive analysis of the steady-state operation in continuous conduction mode (CCM), inductor and capacitor design, and a comparison considering other similar topologies are presented in this article. Also, the parasitic elements are assumed to calculate the DC-Voltage gain and the efficiency of the converter. Finally, simulation results are presented in the PSIM environment to validate the feasibility of the proposed converter.

Switched capacitor network has been widely used in power electronic circuits. Under the same input voltage and switch duty cycle, buck-boost converter with switched capacitor network can achieve better voltage-drop effect. Based on peak current controlled buck-boost converter with switched capacitor network, a model of discrete iterative mapping, this paper studies the entropy characteristics to analyze the nonlinear dynamic behavior of the converter. First, two-dimensional entropy of the converter is obtained, which reflects the overall statistical characteristics. Then, the numerical sequence distributions of buck-boost converter with switching capacitor network are also analyzed under different load resistors. Finally, the nonlinear dynamical analysis for the converter is verified by experimental results.

In this paper, we present a new method of analysis of switched-capacitor networks (SCN) based on the concept of capacitorswitch (CS) blocks. The combination of any capacitor and its related switches in the SCN is considered as an integral component and the nodes within the combination can be discarded. The size of the admittance matrix is thus great reduced. By this method the time- and frequency-domain responses can be computed efficiently with no limitations on the circuit topology, switching phase, or duty cycle.

The solvability problem of a linear active network is approached from a purely topological point of view using the two‐graph method. It can be said that a topological condition for the solvability is the existence of a common tree of the voltage and current graphs. A few conditions for the existence of a common tree are derived. If there exists no common tree, subgraphs which cause the nonexistence can be distinguished, and a partition of two‐graphs can be introduced. The partition has similar properties to the principal partition of a graph or the canonical form of a bipartite graph, and a structure of two‐graphs represented by a partial ordering of sets of edges can be defined. An algorithm to find the partition and a common tree, if one exists, or if no common tree exists, a tree of one of the graphs which has as many common edges as possible with a tree of the other graph, is given. The decomposition of the coefficient matrix accompanying the structure is discussed, and algorithms to determine the decomposition is given.

This paper presents a novel approach to the exact design of first- and second-order Bode-type variable-amplitude (VA) bilinear-LDI switched-capacitor (SC) equalizers. The proposed design approach is based on the realization of the VA equalizer transfer function as the transfer function of a frequency-independent two-terminal-pair SC network at its input terminal-pair when its output terminal-pair is terminated in a (frequency-dependent) SC one-terminal-pair realization of the dual of the equalizer shaping impedance function. The resulting first-order equalizers produce fan-shaped lowpass or highpass magnitude-frequency responses, while the resulting second-order equalizer produces a bump-shaped (bandpass) magnitude-frequency response. The salient feature of the proposed SC equalizers is that only a single variable capacitor is required to control the fan amplitude in the first-order equalizers and the bump amplitude in the second-order equalizer. Moreover, these equalizers remain BIBO stable for all possible values of the variable capacitor. In addition, they exhibit the important practical feature that a geometrically symmetric change in the value of the variable capacitor causes a corresponding arithmetically symmetric change in the logarithmic magnitude-frequency response of the VA equalizer. An application example is given to illustrate the main results.

The philosophy, theory and numerical techniques required in the development of a contemporary suite of simulators for switched network and mixed-mode analysis are described in detail. The evolution of a general simulator, SCNAP4, from earlier software is outlined, and comprehensive sensitivity analysis of switched capacitor (SC) and switched current (SI) networks is shown, together with full noise analysis for large SC and SI networks. An extension into semi-symbolic analysis of non-ideal SC and SI circuits is shown to be feasible, with good accuracy being maintained for large networks. The highly efficient techniques are then utilised for large signal distortion analysis and implemented in the SCNAPDIS simulator. The natural progression of the software development subsequently leads to SCNAP5, which interfaces with the commercial logic simulator Verilog to produce a most effective mixed-mode simulator capable of delivering very detailed analysis of mixed-mode SC and SI circuits. In the development of this latest suite of SCNAP software much effort has been directed towards producing highly efficient algorithms, very versatile packages and a uniform structure with a simple user interface. All the software is written in C. A variety of examples are given to illustrate the wide range of application of the software.

The paper is an extension of the simplified design oriented analysis of Switched Capacitor (SC) networks proposed by Zhou [1], Five more commonly used SC elements and their z-domain equivalent admittances are presented. Using these simplifies the analysis of SC networks.

Automatic symbolic analysis of SC networks using a modified nodal approach

Traditional two-dimensional (2-D) switched-capacitor filters require very large line-memories mainly because of the oversampled characteristic of the signal, both at the input and at the output. By bringing the output sampling rate closer to the Nyquist signal bandwidth it is possible to reduce considerably the line-memory requirements, and thus saving silicon area for cheaper integrated circuit implementation. Besides, lower output sampling rates also contribute for ease of signal digitization and processing and economy of signal transmission. Such operation of reducing the sampling rate from the input to the output can be achieved using appropriate 2-D decimating filters which, besides the required baseband filtering, should also provide the necessary antialiasing filtering. This paper describes new switched-capacitor networks and design techniques that can efficiently implement such 2-D decimating filtering functions, both with finite impulse response and infinite impulse response with separable denominator. They are based on extensions of conventional multirate switched-capacitor polyphase networks and offer simple, systematic synthesis procedures which significantly extend the currently available design techniques for 2-D analog filters.

Quantifying the importance of specific types of higher-order structures in complex networks

Switched capacitor (SC) architectures for online solving of nonlinear optimization problems are proposed, and their properties are investigated. The proposed circuit structures are suitable for VLSI MOS implementations since they use switched-capacitor techniques. The structures exhibit a high degree of modularity, and a relatively small number of basic building blocks (computing cells) are required to implement many effective and powerful optimization algorithms. Basic mathematical operations, e.g. multiplication, addition, and nonlinear scaling transformation, are accomplished using advanced SC techniques. The validity and performance of the circuit structures are illustrated by intensive computer simulations using TUTSIM and NAP programs. >

The power generated by a PV array is affected by several factors such as the intensity of solar radiation, the temperature, and the shade cast by solar radiation on the solar panels’ surface. In order to provide the maximum electrical power, it is important to understand the characteristics of a PV system. In this paper, a simulator to observe the characteristics of solar panels is modeled and designed by utilizing tungsten-halogen lamps as a lighting source. The use of halogen lamps ensures that the solar panels’ output signal does not have a large ripple. It differs from other lamps, such as LEDs, which can generate greater ripples in solar panel output signals. Voltage sensors and current sensors are used to obtain the desired values of voltage and current parameters. The characteristics of solar panels with different combinations of lighting can be observed using a Personal Computer (PC) both in the form of tables and graphics with the help of the Parallax Data Acquisition tool (PLX-DAQ). According to the results of the test, the simulator can operate properly, and the measured parameter value can be monitored in realtime in the form of current and voltage graphs.

Switched-capacitor networks (SC networks) deserve attention, since they provide an optimum method for implementing precision filters in a monolithic integrated circuit. Classical SC networks contain capacitors and two- phase switches (see [1–4]). In certain applications it is preferable to use multiphase networks (see [5]), but the methods for analyzing them are complex (see [1]). The present paper proposes a comparatively simple method for the mathematical description of multiphase SC networks. It is a generalization of the method of analysis developed in [2]. Moreover, the present work emphasizes the fact that SC networks belong to a more general class of discrete time-varying networks.

Second-order function realisation with switched-capacitor network and unity-gain amplifiers