Towards a Categorical Framework for Verifying Design and Implementation of Concurrent Systems

Using Failures and Category Theory to Verify Process Communications between Design and Implementation of Concurrent Systems

High‐level language primitives for concurrent programming exist in languages such as Ada and Modula‐2. However, each of these languages provides only a single means for specifying multitasking and synchronization, essential in the implementation of concurrent systems. The SR language provides several mechanisms for specifying multi‐tasking and synchronization, so it can be used to explore the performance of various communication techniques.This paper presents performance results for SR's multi‐tasking and synchronization mechanisms and discusses the effects of the generated code, the run‐time support and the hardware on these results. These results are compared with those for similar mechanisms in other languages, leading to some general conclusions about the performance of process communication primitives. These performance results can be used by programmers to make design choices that allow systems programs written in high‐level languages to meet real‐time performance specifications.

The specification and implementation of a class of concurrent systems is investigated in this paper using PARLOG as the implementation language, guided by specifications in CCS. This class of systems is restricted to an illustrative subset, including buffers and queues. A comparison is made between the computational models of concurrency that are expressed by each language. Illustrative programs are given which highlight the differences in operational behaviour between programs in the two languages. We investigate the ways in which equivalences in CCS programs may be used to compare PARLOG programs, and the areas of PARLOG programming which are not covered by this comparison. The advantages and disadvantages of CCS compared with PARLOG as a ‘specification-implementation’ language are discussed.

The lack of formalism and rigor in existing multi-agents models often leads to ambiguities and different interpretations. Those weaknesses combined with the inherent complexity of multi-agents systems generate many problems in their development process. Using formal notations to specify multi-agents systems’ behavior makes it possible to produce precise description. This also offers a better support to their verification and validation process. The Maude language, based on rewriting logic, presents a rich notation supporting formal specification and implementation of concurrent systems. In this paper, we demonstrate the feasibility and the interest of formalizing the behavior of DIMA model’s agents with the Maude language. The elaborated formal approach captures the inherent aspects of a DIMA model. The generated Maude descriptions have been validated using the platform supporting this language. Moreover, the proposed approach is generic and extensible. It offers, in particular, the advantage of being applicable to all multi-agents systems based on DIMA architecture and presents interesting extension possibilities.

Process algebra provides essential tools for studying concurrent systems. An important branch of process algebra is value passing CCS. However, value passing CCS lacks not only action refinement, which is an essential operation in the design of concurrent systems, but also non-interleaving semantics, which is appropriate to specify the partial order and equivalence relations. In this paper, we will define action refinement and non-interleaving semantics by valued stable event structures and valued labeled configuration structures in which special valued actions will be executed. The refinement operation and semantics are useful for the hierarchical design methodology in value passing CCS, e.g. top-down system design.

Agent technology is widely recognized as a new paradigm for design of concurrent software and systems. The aim of this paper is to give a mathematical foundation for design and analysis of multi-agent systems by means of a Petri-net-based model. The proposed model, called PN 2, is based on place/transition nets (P/T nets), which is one of the simplest classes of Petri nets. The main di.erence between PN 2s and P/T nets is that each token, representing an agent, is also a P/T net. State equation and invariants are known as standard techniques for the analysis of P/T nets. As the first step of mathematical analysis of PN 2s, we define these for PN 2s, and show how the invariants are computed in an efficient way.

In this work, having in mind the construction of concurrent systems from components, we discuss the difference between actions and events. For this discussion, we propose an(other) architecture description language in which actions and events are made explicit in the description of a component and a system. Our work builds from the ideas set forth by the categorical approach to the construction of software based systems from components advocated by Goguen and Burstall, in the context of institutions, and by Fiadeiro and Maibaum, in the context of temporal logic. In this context, we formalize a notion of a component as an element of an indexed category and we elicit a notion of a morphism between components as morphisms of this category. Moreover, we elaborate on how this formalization captures, in a convenient manner, the underlying structure of a component and the basic interaction mechanisms for putting components together. Further, we advance some ideas on how certain matters related to the openness and the compositionality of a component/system may be described in terms of classes of morphisms, thus potentially supporting a compositional rely/guarantee reasoning.

PN (PN) are tools for the analysis and design of concurrent systems. There is a formal theory, which supports PN. An extension of PN is Petri Nets with Clocks (PNwC). PNwC are useful to model systems with temporal requirements via specification of clocks, using temporal invariants for the places and temporal conditions in the transitions. Using invariants in places allows the specifications of hard deadlines constrains (upper bound constrains): when a deadline is reached the progress of time is blocked by the invariant and the action becomes urgent. An algorithm for the analysis of a PNwC has been proposed in [1]. The algorithm is oriented to the verification and correction of errors in the modelling of the time variable. The algorithm generates information about temporal unreachable states and process deadlocks with temporal blocks. Also, it corrects places invariants and transitions conditions. We present here a formalism for PNwC based on Timed Graphs. The analysis algorithm is presented here using the formalism. We show here how Petri Net theory can be joined with Timed Graph theory to construct a formalism, which supports a tool for the analysis of models of concurrent process with real time specification.

As critical computer systems continue to grow in complexity, the task of showing that they execute correctly becomes more difficult. For this reason, research in software engineering has turned to formal methods, i.e., rigorous approaches to demonstrating the correctness of software systems. Unfortunately, the formal methods currently used in the design of concurrent systems do not provide any mechanisms for specifying and reasoning about the mapping of software to hardware. As a result, architectural constraints, even though they play an important role in the design process, are left out of the formal framework. We show how to state architectural constraints in a formal notation, how to prove that programs are allocated correctly to the underlying architecture, and how to factor architectural considerations into a program derivation process which uses a mixture of specification and program refinements. The approach is illustrated by the derivation of two related programs that solve the same problem but are designed to work on distinct architectures.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The author demonstrates the natural extension of the box structure theory and techniques of system development to concurrent system design. The semantics and syntax of box structures for designing concurrency are presented. Concurrent box structure designs for several concurrent system environments are shown. Extensions to more complex environments are suggested. >

This paper studies the problem of verifying linearizability at runtime, where one seeks for a concurrent algorithm for verifying that the current execution of a given concurrent shared object implementation is linearizable. It shows that it is impossible to runtime verify linearizability for some common sequential objects, regardless of the consensus power of base objects. Then, it argues that actually a stronger version of the problem can be solved, if linearizability is verified indirectly. Namely, it shows that (1) linearizability of a class of concurrent implementations can be strongly verified using only read/write base objects (i.e. without the need of consensus), and (2) any implementation can be transformed to its counterpart in the class (which implements the same object) using only read/write objects too. As far as we know, this is the first runtime verification algorithm for any correctness condition that is fully asynchronous and fault-tolerant. As a by-product, a simple and generic methodology for deriving self-enforced linearizable implementations is obtained. This type implementations produce outputs that are guaranteed linearizable, and are able to produce a certificate of it, which allows the design of concurrent systems in a modular manner with accountable and forensic guarantees. These results hold not only for linearizability but for a correctness condition that includes generalizations of it such as set-linearizability and interval-linearizability.

The paper examined the problem of modeling and design of software computer systems. The article briefly describes the content aspects of the various stages of the implementation of software complexes and systems. The methodology of research and analysis of systems, which uses the method of computer simulation modeling, is given. The aim of the work is to create a new universal approach to the design and implementation of software systems of various levels of complexity. During the study, the following general scientific methods were used: system analysis, synthesis, formalization, modeling, decomposition, structuring, description, comparison. The materials used in the study were: computers and software development tools. As a result of the study proposed a universal agent-module approach to the design and implementation of software systems based on simulation agent-based modeling. The study presents the processes of modeling and designing software systems, their stages, and the possibility of their integration within the described approach. Examples of formal model and structure of the software system under design based on the agent-module approach are presented. The proposed approach can be used in the process of software development at the initial stages related to modeling and designing of software systems. Integration of modeling and design stages in the proposed approach will significantly reduce software development time and simplify the design process by making it clearer and more formalized. Materials of the article are of scientific and practical value for a wide range of specialists interested in system analysis, modeling, design and implementation of software systems.

Welcome to the DATE 08 Conference Proceedings. DATE combines the world's favourite electronic systems design conference and Europe's leading international exhibition for electronic design, automation and test, from system level hardware and software implementation right down to integrated circuit design. The DATE 08 event features a technical program with 77 sessions covering the latest developments in system design and embedded software, IC design/test methodologies and EDA tools, together with an exhibition with the leading EDA, silicon and IP providers showing their new products and services. Challenges that you all face or soon will face in your daily practice are the increasing design complexity of highly integrated systems, the introduction of reconfigurability and embedded software, and the control of power and variability in nanometer IC designs. All these issues will be addressed in this year's DATE event. For the 11th successive year DATE has prepared an exciting technical programme, with the help of the more than 400 members of the Technical Programme Committee, who dedicated their time to thoroughly review the 839 submissions in 37 topics, ranging from system level down to circuit design and covering all the most relevant application domains. The submissions are organised in 4 major areas: D --- Design Methods, Tools, Algorithms and Languages A --- Application Design T --- Test Methods, Tools and Innovative Experiences E --- Embedded Software After a thorough review and selection process (with an average of 5 reviews per paper), finally 198 regular papers were selected for presentation at the conference. Additionally, there are 46 Interactive Presentations that are organised in 5 IP sessions. Together with the invited special sessions (panels, embedded tutorials and hot topic sessions), this has resulted in a high-quality technical program. The technical program provides a wide but high-quality coverage of design, design automation and test topics, from the system level to the integrated circuit level. Compared with previous years, submissions in the Embedded Software track has increased by 50%, showing a clear trend towards a comprehensive system design focus with integrated hardware and software solutions. DATE has established itself firmly as a true Electronic System Design Conference. This year the conference is held in Germany, at the ICM in Munich and spans an entire working week from Monday March 10 to Friday March 14. On Monday, eleven pre-conference tutorials will be given. The three-full day tutorials cover topics of great interest for system design. The first tutorial deals with techniques to automatically realising embedded system from high-level functional models. The second tutorial addresses the different issues related to communication based design and architectures in automotive electronic systems. The third tutorial discusses several key concepts on system-level design and application mapping for wireless and multimedia MPSoC architectures. Furthermore, eight half-day tutorials are also given, which cover a wide spectrum of topics on specification, modelling, design and test. The main conference opens on Tuesday March 11, with two very interesting and complementary keynote speeches. Dominique Vernay, Chief Technical Officer for Thales, will talk about the challenges of embedded systems design, and Giovanni de Micheli, Professor at EPFL, will present his views on designing micro/nano systems for a safer and healthier tomorrow. On the same day, the Executive Track offers a series of business panels with executives discussing hot topics in design: the perils of 45 nanometers, the changes in EDA strategies from IDM, to fablite to fabless, and embedded systems level design strategies. DATE 08 will again offer two specific days related to special themes. On Wednesday March 12, a special full-day track is devoted to Automotive Electronics---Software and Architecture. This special-day track will focus on the challenges faced by the automotive supply chain with particular attention to system and software architecture design. It provides a comprehensive analysis of the evolution of automotive architectures, including ECUs, sensors and communication standards and discusses how new methods, tools and standards for interoperability and component-based design can deal with the increasing complexity of software systems and their need for reliability and guaranteed timely behaviour. In addition, it addresses to what degree existing standards, including AUTOSAR and FLEXRAY and model-based development, can support the development of safety and time-critical software. On Thursday March 13, a second special full-day track focuses on Dependable Embedded Systems. This track will address both conceptual and applied issues for design, analysis and validation of dependable embedded systems. The utility of embedded systems and services is based, in large part, on our depending on their sustained functionality in spite of the encountered operational or malicious disruptions. As the number of transient and also permanent disruptions (given the decreasing device geometries, higher device density, lower voltage latching, faster clocks etc) is expected to increase substantially, this will not only be a key issue for the hardware community but also the systems community in general. Solutions using a combination of hardware and software might be more effective than hardware-only or software-only solutions. This track focuses on both conceptual and applied issues for design, analysis and validation of dependable embedded systems. Besides these special tracks, the main conference is organized in six parallel tracks of sessions, three devoted to design methods, tools, algorithms and languages, one to application design, one to test methods, tools and innovative experiences, and finally one to embedded software. The presentations of the selected regular papers in these parallel tracks are complemented by nine Special Sessions and two Invited Industrial Sessions. The special sessions are organized in the form of panels, hot topics, and embedded tutorials. The topics to be covered include quantitative evaluation for embedded systems design, design and manufacturing at 32 and 22nm, software for wireless networked embedded systems, test challenges for low power devices, quantitative productivity measurement in IC design, and 3D Integration. The two invited industrial sessions deal with industrial system designs in transportation and information technologies. To emphasise that DATE is the major event for the designers, DATE 08 features also invited sessions where Europe's famous consumer industry presents their best designs and design practices. Friday March 14 is the day for the DATE workshops. DATE 08 offers workshops on current and emerging important issues in design, test, EDA and software to complement the regular conference. They provide a unique opportunity for the various research and design communities to spend a day discussing the latest and the best, sharing their experiences and visions. This year's workshop program includes eight workshop themes. Four workshops are related to software engineering, ranging from dependable software to modelling, analysis and development tools. Four other workshop themes cover a variety of topics such as the impact of process variations on design and test, the merging world of Nano-Electro-Mechanical Systems, new directions in high level synthesis, and heterogeneous reconfigurable hardware. Each workshop features presentations, invited or submitted, from highly distinguished academic and industrial researchers. Finally, throughout the conference days, DATE offers a comprehensive overview of commercial design and verification tools in its large exhibition hall. Exhibitors include EDA vendors, silicon, FPGA and IP providers showing their new products and services. In addition, there is an Exhibition Theatre featuring talks from engineering managers of the leading electronic manufacturers on first-hand design experiences of commercial EDA tools. New this year is the European projects village where different European and large government funded projects will be able to show their ongoing research and results to the design community and have the opportunity for internal meetings and discussions. The DATE week will be also an opportunity for students and universities to show their research work, through the PhD Forum on Monday evening and the University Booth where hardware and software demonstrations will be shown by different universities on a rotation schedule. The DATE 08 event's program will be particularly attractive to industrial designers, at analog, IC, FPGA and embedded system level, as well as software designers, to researchers and academics as well as to design managers, and an increasing attendance is expected. We therefore invite you to take full advantage of the many opportunities offered to you by DATE 08, to extend your knowledge and/or business in electronic system's design and to exploit the abundant networking possibilities offered to socialise with colleagues, including fringe meetings and a memorable social party with bands and dancing. We hope that you will all enjoy the DATE 08 Conference and Exhibition.

The Design Realization, Evaluation And Modelling (DREAM) system is an automated support system for designers of large-scale, concurrent software systems. DREAM is intended to facilitate the orderly development of such software systems by supporting high-level, abstract design descriptions and the successive modification and elaboration of incomplete descriptions. DREAM also provides a basis for formulating arguments regarding the correctness of an evolving design at any stage during its development.We begin this paper by presenting a viewpoint which has served to motivate our work in developing the DREAM system. Next we will describe DREAM itself, and its associated design language (the DREAM Design Notation or DDN). This discussion will highlight the major features of DREAM and the approach to software system design which DREAM supports. Finally, we will present a simple example of a DREAM design description. This should serve to illustrate both the specifics of the DREAM Design Notation and also the application of DDN to the description of concurrent software system designs.

Purpose: This study aims to design the flow of the e-budgeting system to develop the village financial system, as well as to increase transparency and accountability of the web-based budget system and minimize the occurrence of corruption loopholes in the village. Method: The design system uses the waterfall method to analyze a model systematically. The model development step starts with the design of the system, database, menu structure, and interface. The design of the e-budget information system is built using PHP and MySQL programming in the form of web-based applications. Results: This study developed a web-based e-budgeting application using the waterfall method to manage village finances. The online system increases flexibility, allowing access from any device. It runs smoothly on computers, with all menus functioning as designed, and is expected to simplify village financial management. Limitations: The researchers’ capability in designing the system is not optimal, as the researchers do not have the basis of informatics engineering, so the results obtained and delivered are not too detailed. Contributions: This system is expected to be useful to facilitate the process of financial management at the village government level. Novelty: The novelty of this study lies in the design of a village e-budgeting system with features like automatic Standard Unit Price calculation, automated tax management, and tracking of village income (PADes) for transparency. This application aims to enhance financial management, ensuring transparency and accountability in the village.