A High-Precision Current-Mode Bandgap Reference With Low-Frequency Noise/Offset Elimination

Based on the 180 nm CMOS process, a high-precision current mode bandgap reference with ultra-low temperature drift coefficient was designed. The temperature coefficient of the current mode bandgap reference is analyzed, and a current mode curvature correction technology based on the parabolic current correction architecture is proposed to correct the temperature drift coefficient of the output voltage of the current mode bandgap reference, and the curvature compensation module uses only 6 MOS transistors, which consumes less than 200 nA current, and optimizes the temperature coefficient of the bandgap reference output voltage by 96%. The circuit does not use any trimming techniques, which reduces the chip area, reduces the cost of chip mass production, and greatly reduces the temperature drift coefficient over a wide temperature range. The supply voltage is in the range of $1.2 \mathrm{~V}-2.5 \mathrm{~V}$, the bandgap reference has a stable output of 0.6 V, a linear regulation of 0.2%, and a temperature drift coefficient of only $0.303 \times 10^{-6} /{ }^{\circ} \mathrm{C}$ in the range of $-40^{\circ} \mathrm{C}-125^{\circ} \mathrm{C}$. At an ambient temperature of $27^{\circ} \mathrm{C}$, the quiescent current is 50.4 uA, and the chip area is $0.3 \mathrm{~mm} \times 0.1 \mathrm{~mm}$.

Ultra-low-power (ULP) sensor technologies for the future internet of things have presented challenges in ULP implementation of reference circuits while keeping traditional requirements of stable performance. For voltage reference circuits, as an essential block in SoCs to generate various internal supply voltages, the bandgap voltage-reference (BGVR) scheme has been widely used since it provides a well-defined value with strong immunity to process/voltage/temperature variations. Nanowatt-consuming BGVR circuits have been recently proposed using a capacitor network [4] and a leakage-based proportional-to-absolute-temperature (PTAT) circuit [5]. On the other hand, the current reference circuit that is required to set internal bias current still presents difficulties in achieving both stable performance and ULP consumption. The general approach to building a current reference is to use a BGVR with additional resistors for V-to-I conversion. Though it can provide a well-defined stable current reference, it also requires excessively large resistance for ULP consumption. Another approach is a CMOS-based current reference circuit that tries to make the exponential term in the subthreshold current equation constant or temperature-independent, hence reducing process and temperature dependencies. While CMOS reference circuits have achieved ULP implementations, the current is still determined by a number of process and design parameters, resulting in large sensitivity to process variations. This paper presents a sub-10nW bandgap-reference (BGR) circuit that implements both voltage and current references in one circuit. The BGR circuit is implemented with a 0.18µm CMOS process and generates voltage and a current references of 1.238V and 6.64nA while consuming 9.3nW. The voltage and current references show standard deviations of 0.43% and 1.19% with temperature coefficients of 26ppm/°C and 283ppm/°C, respectively.

In this paper, a Bandgap reference (BGR) with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is presented. On the basis of first-order temperature-compensated BGR, a complementary curvature-compensation technique (CCCT) is realized by using the saturation region current characteristics of PMOS transistors with proportional to absolute temperature (PTAT) bias voltage. Besides, in addition to the effect of cascode structure and the isolation of the current amplifier, the PSRR of proposed BGR is further improved by adopting self-bias power supply with feedback. The presented BGR is implemented in a standard 0.35 μm BCD process. The post-simulation results show that the TC of the BGR is 4.740 ppm/∘C with a 2.50V average output voltage, and the PSRR is up to -78.5dB.

Bandgap reference (BGR) circuits are widely used due to their stable output voltage over process, supply voltage and temperature variations. Reference voltage stability is critical for data-acquisition applications and lower supply voltages can reduce the power of mixed-signal systems. However BGR for analog circuits is one of the bottlenecks for sub-1V supply operation because BGR supply voltage is limited by V EB +V DS [1]. V EB refers to the emitter-base voltage of a pnp transistor which is limited to ~0.6 to 0.7V due to silicon junction cut-in voltage, while V DS is the drain-source saturation voltage of a current-mirror. The BGR temperature dependence is decided by the weighted sum of proportional-to-absolute-temperature(PTAT) and complementary-to-absolute-temperature (CTAT) terms. An alternative PTAT generator can be implemented by dV GS (gate-to-source voltage difference) of a MOS pair in subthreshold [2]. The CTAT generator can be implemented by special devices or using the gate-source voltage V GS of subthreshold MOSFETs. Although the V GS of a subthreshold MOSFET is smaller than emitter-base voltage of a pnp transistor, the MOSFET model inaccuracy in the subthreshold region and high process-dependent characteristic of MOSFET gate-source voltage induces high variation for voltage reference circuits.

A new 1-V high precision second-order compensated bandgap voltage reference (BGR) is presented in this paper. It utilizes a conventional first-order current-mode BGR to balance the Complementary to Absolute Temperature (CTAT) voltage component of a forward biased BJT with a Proportional to Absolute Temperature (PTAT) voltage. The residual second-order error is corrected by the difference of two CTAT voltages with different non-linear terms through control of the collector currents of BJTs. All the circuits are designed using a standard 0.18μm CMOS process. The post-simulation results show that the maximum temperature coefficient (TC) of the proposed BGR at 1 V power supply is 2.5 ppm/°C over temperature range of −40 °C to 125 °C. The line regulation is 0.23 mV/V over supply range of 0.9 V–2 V. The low frequency power supply rejection of the circuit is −53 dB at 1 V power supply.

This paper presents a high wide band power supply rejection ratio (PSRR) current mode bandgap reference (BGR) with a fast startup performance. The BGR includes three main enhancement techniques to improve the PSRR. The proposed design is implemented in 130nm CMOS technology. It only consumes 50μA from a 1.8V supply. The BGR provides 850mV reference voltage and has a power supply rejection ratio (PSRR) of 130dB from DC to 100Hz and more than 110dB till 100MHz. The temperature coefficient (TC) is 10 ppm/°C from -40°C to 125° C. The Bandgap start-up time is 70ns.

A voltage reference circuit is an essential block of a system to generate various internal voltages. Since it consumes static power in standby modes, it plays an important role in energy management of battery-limited applications. The bandgap reference (BGR) has been a widely used approach since it provides a well-defined large value ($\sim 1.15\text{V}$) with strong immunity to process, supply and temperature changes. Recently proposed BGR approaches achieved a great reduction of power consumption by taking only complementary-to-absolute-temperature (CTAT) quantity from a PN junction while they obtained proportional-to-absolute-temperature (PTAT) quantity from alternative CMOS circuits such as a CTAT divider [1]or leakage-based two diodes [2, 3]. However, these BGR schemes are formed with multiple branches fed from a supply voltage above 1.4V and require power consumption of order larger than 10nW. To further reduce power consumption, threshold-based reference approaches with CMOS-only circuits have been proposed [4, 5]. However, generation of a practical voltage level by up-scaling of a threshold-based reference also causes an amplification of the uncertainty by the same factor. I addition, though [4]has successfully achieved sub-nW power consumption, the threshold voltage eventually suffers from a large sensitivity to process variation because the threshold voltage is affected by process and design parameters. To reduce the effect of process variation, [5]proposed a PMOS-only circuit. However, it requires a different body biasing for a threshold difference that is needed to generate a non-zero reference.

As a way of generating high precision voltage reference, bandgap voltage reference is a very important module in the analog integrated circuits and mixed-signal integrated circuits to provide a temperature and power supply insensitive output voltage. The bandgap voltage reference circuit presented here in this paper is an improved conventional bandgap reference circuit. A self-biasing structure and a current mirror structure are used. It can get the PTAT(Proportional to absolute temperature) current, and then get the voltage that is proportional to temperature. The output voltage of an Op-amp is adopted as the op-amp's offset voltage to make the power consumption lower, and high value polysilicon resistors of low temperature coefficient are used to reduce the impact of resistor drift on the circuit. The errors caused by current mismatch is eliminated in the improved CMOS bandgap, and at the same time the DC PSRR (power supply rejection ratio) is increased because of the increase of the feedback factor.

The design of a novel all-MOS low-power bandgap reference in an open loop topology is described. A forward biased p-n junction with complementary to absolute temperature coefficient (CTAT) is combined with a cascade of Self-Cascode MOSFET (SCM) structures providing a proportional to absolute temperature (PTAT) voltage to create the bandgap voltage reference. Using the Advanced Compact MOSFET (ACM) model the design of the cascade of SCMs is fairly straightforward. The design methodology is based on the concept of inversion level using current as the main variable. At room temperature, the nominal output reference voltage is 1.32V, and the total current consumption is 65nA (20nA for the current generator and 45nA for the bandgap reference itself). The circuit has been integrated in a 0.18μm standard CMOS process, and occupies an area of 0.01mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Power supply sensitivity is +/-0.7% from 1.55V (minimum operation voltage) to 3.3V After trimming, temperature compensation is attained with a total bandgap voltage variation of 0.6% from -40°C to 125°C, equivalent to 36ppm/°C.

Bandgap references (BGRs) are widely used to generate a temperature-insensitive reference voltage determined by the silicon bandgap. the BGR generally utilizes PN diodes to generate both of proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) quantities and combines them to eliminate the temperature dependency. Though the BGR provides a robust voltage or current reference with insensitivity to process, voltage and temperature variations that is superior to CMOS-only reference circuits, it has received little attention in ultra-low-power (ULP) sensor applications. While CMOS-only reference circuits have recently demonstrated nanowatt power consumption [1], BGR approaches still have two critical factors to preventing nanowatt consumption. One is that PTAT generation assumes sufficient forward bias, VD, of the PN junction to allow e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VD/(n·VT)</sup> to be much larger than 1 in the temperature range of interest, where n and VT (=kT/q) represent the ideality factor and the thermal voltage, respectively. In addition, the PTAT generation requires a start-up circuit to prevent the circuit from resting at the undesirable zero-bias condition. Since the start-up circuit utilizes a resistive voltage division between power rails, it consumes non-zero DC current, which must be larger than leakage current in order to ensure stable start-up operation. These two requirements for PTAT generation limit the use of BGRs in nanowatt ULP applications.

In this paper, we describe a sub 1 V bandgap voltage reference (BGR) in CMOS technology. The proposed topology is based on a current-mode bandgap structure that uses a transimpedance amplifier. A feedback control in the bandgap produces temperature compensation between a PTAT (Proportional To Absolute Temperature) current and a CTAT (Conversely proportional To Absolute Temperature) current derived from a nMOS threshold voltage. The proposed circuit was verified by extensive circuit simulations, using models, of a standard 0.18 /spl mu/m CMOS technology, with a power supply of 1 V. The variations of the output voltage over a typical temperature range (0 to 100/spl deg/C) were simulated to be less than 1%.

A new sub-1-ppm/°C curvature-compensated bandgap voltage reference (BGR) is presented in this paper. The Complementary to Absolute Temperature (CTAT) voltage component of a forward biased BJT is first well balanced with a Proportional to Absolute Temperature (PTAT) voltage, leaving only a high order logarithmic error with the form of TlnT. This residual non-linear error is corrected by a difference of two CTAT voltages with different non-linear terms through controlling the collector currents of BJTs, which can achieve an ideal non-linear compensation. All the circuits are designed in a standard 0.35-pm CMOS process. The post-simulation results show the proposed BGR achieves temperature coefficient (TC) of 0.7 ppm/°C over temperature range of −40 °C to 125 °C and power supply rejection (PSR) of −104 dB at 3.6 V power supply. The line regulation of the output reference voltage is 0.1 mV/V in the supply range of 24.5 V. The maximum dissipating current from the supply is 25.45 μA.

A novel bandgap reference (BGR) with low temperature and supply voltage sensitivity without any resistor, which is compatible with standard CMOS process, is presented in this article. The proposed BGR utilises a differential amplifier with an offset voltage proportional to absolute temperature to compensate the temperature drift of emitter–base voltage. Besides, a self-biased current source with feedback is used to provide the bias current of the BGR core for reducing current mirror errors dependent on supply voltage and temperature further. Verification results of the proposed BGR implemented with 0.35 µm CMOS process demonstrate that a temperature coefficient of 10.2 ppm/°C is realised with temperature ranging from −40°C to 140°C, and a power supply rejection ratio of 58 dB is achieved with a maximum supply current of 27 µA. The active area of the presented BGR is 160 × 140 µm2.

ABSTRACTA bulk-isolated curvature-compensated bandgap voltage reference (BGR) compatible with triple-well CMOS technologies is presented in this paper. Verification results of the proposed BGR implemented in a 0.35-µm 3.3-V triple-well CMOS technology demonstrate that the BGR achieves a reference voltage of 220.4 mV with an average temperature coefficient (TC) of 3.7 ppm/°C in the −40 to 130°C range with 8-bit trimming. The measured current consumption and power supply rejection of the circuit are 33.15 µA and −69.51 dB at 100 Hz, respectively (VDD = 3.3 V). The circuit is capable of operating with supply voltages down to 2 V and its line regulation is 0.16%/V over a voltage range from 2 to 3.6 V. The root mean square output noise voltage in the 0.1–10 Hz frequency range is 2.54 µV. Moreover, measurement results show that the substrate noise sensitivity at the BGR output improved more than 30 dB for frequencies up to 50 kHz, thanks to the employed block bulk isolation strategy, although the effective improvement is expected to be more than 75 dB without the coupling from the electrostatic discharge diode in the I/O pad.

SummaryVoltage references are typically designed by combining a complimentary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) voltage references. However, in contrast to conventional voltage references, the proposed circuit generates a voltage reference by subtracting two PTAT voltages, resulting in an extremely low process‐dependent voltage reference. A novel subtractor is also proposed for subtracting PTAT voltages, which is used to generate the reference voltage. The temperature coefficient of the proposed voltage reference is further improved using a novel PTAT slope compensation technique. The proposed voltage reference is a MOS‐only ultra‐low power circuit that works with sub‐bandgap supply voltage. Simulation results using UMC 0.18 m technology MOSFETs show that the proposed circuit has a line sensitivity of 0.5%/V, a temperature coefficient of 21.37 ppm/° C, a power consumption of 15.6 nW, and an output voltage variation of only 0.22% due to process variations.