An Electromagnetic Interference (EMI) Reduced High-Efficiency Switching Power Amplifier

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

Nowadays, piezoelectric actuators (PA) are used in fast power actuations and high power applications as requested in machine tools or helicopters flap applications. Regarding to the low power capability and high loss ratios of linear amplifiers, Switching Power Amplifiers (SA75X) is designed by Cedrat Technologies to drive piezoelectric actuators in such applications. The switching technique (up to 100 kHz) allows high current peaks required by impulse or by high frequency applications on large piezoelectric actuators (or actuators in parallel) and allows energy harvesting. Output voltage, current, and actuator position are monitored via controller board and using sensor feedbacks. Furthermore, the developed system (SA75X+actuators) can operate in open or closed loop system with an output signal frequency up to 1 kHz. The OEM version of the powerful switching amplifier (SA75D:20Amax) has a dimensions of 100x100x100mm, i.e. 1 litter, and a weight of 850g.The power ratio of this amplifier is thus of 1.5kVA/L and 1.75kVA/Kg. The output power capability, signal noise ratios, and control robustness of the SA75X justifies the proposed solution Theoretical, simulation, and experimental tests of the SA75D (20Amax) will be presented to improve the amplifier performances

The blower with Active Magnetic Bearing (AMB) has the advantage of high speed, high reliability, small size, good adaptability. Power amplifier is an important part of the magnetic bearing system, directly determines the magnetic bearing system performance. The three-level PWM signal generation algorithm is analyses in this paper, and the IR2113 gate driven circuits with a negative bias is designed, and build a three-level magnetic bearing power amplifier. The gate driven signal of circuit is test, and entire power amplifier tracking step signal and sinusoidal signal also be test, the test results indicate that the three-level power amplifier meet the design requirements. At last, the power amplifier application on the blowers with AMB successful. Introduction Active Magnetic Bearings (AMB) using electromagnetic force to suspend rotor, with no friction loss, no lubrication, high-speed, non-polluting characteristics.The blower with AMB has the advantage of high speed, high reliability, small size, good adaptability Power amplifier is an important part of the overall magnetic bearing system, directly determines the magnetic bearing system performance . Depending on the realization of the principle, magnetic bearings power amplifier divided into linear power amplifier and switching power amplifier. With respect to the linear power amplifier, switching power amplifier has the advantage of low power consumption and high conversion efficiency; occupy a dominant position in large power amplifiers. Switching power amplifier can be divided into two-level amplifier switching amplifier and three-level switching amplifier depending on the switching signal. In two-level switching amplifier, the magnitude of current ripple is related to the DC voltage. Increases the DC voltage to improve the dynamic characteristics of the system, it will increase the electromagnetic coil current ripple at the same time. The current ripple of three-level switching power amplifier is not only smaller than the two-level power amplifier, but also nothing affected by the DC voltage , and therefore more suitable for high-power active magnetic bearings. In this paper, using FPGA chip to generate three-level switching signals, half-bridge circuit using IGBT modules and IGBT gate drive circuit is designed based on the drive requirements. The Three-level PWM Signal Generation Algorithm: D2 L Drive circuit FPGA Current sensor feedback AD circuit A D1 Vref S1 S2 I Reference signal Q1

For the next generation applications in mobile communication, radar and satellite communication we need the devices that can operate at high frequencies and high power with minimum power consumption. There is a growing importance in the recent years for the development of GaN transistors.This paper presents design of the power efficient GaN based high power amplifier operating in the bandwidth of 5GHz – 7GHz based on a 12 Watt Discrete Power GaN on SiC HEMT from TriQuint. In this manuscript the design of RF power amplifier, its stability, input and output matching impedance and performance for 5-7GHz is presented. Design and simulations of the power amplifier are carried out using Advanced Design System (ADS). Simulation results of device stability, gain and Power Added Efficiency (PAE) shows good accordance with the specifications and parameters of the device.In the design process, for better correlation in measurement and simulation results precision of passive element models are specially considered. In 1 dB compression point for the designed high power amplifier, the experiment and the simulation results show a Power Efficiency of 68%.

High performance broadband distributed power amplifier (PA) design relies on the co-design of input signal distribution and non-isolated output combiner to take maximum advantage of the resulting load-pulling effects at both fundamental and higher harmonics. Due to the load-pulling and the need to consider higher harmonics, PA operation is not readily expressed analytically. In this work this is addressed by using a numerical linear multi-harmonic calculation method for rapid circuit evaluation and optimization. This linear approach targets good broadband performance without relying on nonlinear saturation effects. An initial investigation is performed to find suitable input network and output combiner topologies for a two-cell PA configuration. A demonstrator is then designed based on the findings, where a 3-dB hybrid coupler with an offset transmission line in one branch is used to produce a frequency dependent phase difference between transistor cells. Measuring the PA at 40-V supply and 1-dB compression the output power is in the 43–46 dBm range with corresponding efficiencies of 46–58% across 0.85–2.7 GHz, whereas saturated efficiencies are typically in the 60%-range. The simultaneous combination of high output power and high efficiency reported across 100% fractional bandwidth is state-of-the-art and clearly shows the merit of the proposed PA design approach.

Chapter 2 - Power amplifier fundamentals

This thesis researches the design of transceiver front-end RF amplifiers for Bluetooth applications in GPDK 45 nm CMOS technology. The target of the design was to minimize the transceiver's power consumption while achieving the best device operating performances. The design of a band-pass low noise amplifier (LNA) used for the receiver and the design of a power amplifier (PA) used for the transmitter were presented. Both amplifiers were designed in 45 nm CMOS technology with a DC supply voltage under 1.2 V to meet Bluetooth specifications at 2.45 GHz operating frequency. The LNA was designed to achieve a minimum small signal gain of at least 15 dB10 with a NF less than 2 dB10 and a reasonable input range for linearity at 1 mW operating power consumption. The PA was designed based on class E switching power amplifier configuration to achieve a minimum of 40% drain efficiency for 100 mW (Bluetooth Class 1) output power. Research on low power high performance Bluetooth device front-end RF amplifiers was conducted through studies of wireless communication modulation schemes, impedance matching networks, and trade-offs between performance parameters. In summation, this thesis searched for, explored, and analyzed possible methodologies that could be used to design RF CMOS amplifiers of Bluetooth applications.

This paper presents a CMOS inverter-like Class-D/E switching power amplifier (PA). The proposed amplifier operates in-between Class-E and Class-DE PAs. For proper operation of a Class-E PA, an RF choke (RFC) with large inductance value and high self-resonant frequency is necessary. A Class-DE PA does not require an RFC but requires a dead-time between OFF-ON transitions of the two switches. The proposed PA uses two complementary switches and requires neither an RFC nor a dead-time for its operation. For the same supply voltage and the load resistance, the voltage stress on each switching device in the proposed PA is less than the voltage stress in a Class-E PA. Design and simulation results of a prototype PA at 2.45 GHz with +20 dBm output power are presented.

An exact analytical approach to the design of a Class-E high frequency power amplifier is presented. The analysis will optimize the load network parameters at the output of the switching transistor, while accounting for harmonics injected into the circuit from the choke inductor, finite quality factor of the output load network, and an exponential decay of the drain/collector current during OFF state. Calculated power performances in terms of efficiency and Total Harmonic Distortion (THD) as a function of decay angle and finite choke inductance are presented.

We discuss the broadband design of high-efficiency GaN power amplifiers (PAs) using continuous modes. A Machine Learning approach to the full EM-based optimization of a hybrid design is first outlined and demonstrated experimentally. We then consider the challenges of achieving high efficiency in a broadband integrated PA, including the features of GaN transistors that facilitate broadband operation. It is shown that proper sizing of transistor can lead to an optimum load resistance close to 50fl, thereby extending the bandwidth of the output matching network of the PA in an integrated environment. We present techniques to realize the continuous-mode operation in an integrated GaN PA, with low loss and compact chip size. Finally, we show predicted results for the integrated GaN PA implementation.

: A key component of microwave telecommunication systems is the power amplifier (PA). The design parameters of a communication system, such as link performance, power budget, and thermal design are typically driven by the power amplifier's linearity, output power, and efficiency. These design parameters of PA are the key to ensuring an efficient system because the PA is the most power-consuming circuit in the communication system. In an effort to have students involved in this research area, the International Microwave Symposium (IMS) sponsored by IEEE Microwave Theory and Technique Society (MTT-S) has introduced a High Efficiency Power Amplifier Design Competition. In this report, we present a 2.8-GHz, 5-W, highly efficient PA based on a wide bandgap gallium nitride (GaN) high electron mobility transistor (HEMT) device (CGH 40010f from CREE). The PA design was presented at the 2010 IMS Student Design Competition and achieved the competition goal of output power greater than 5 W with a measured power added efficiency (PAE) of 61% at 2.8 GHz.

<?Pub Dtl=""?> Design equations and performance limits of Class-E power amplifiers at mm-waves, including the limitations imposed by active and passive devices in a given technology, are presented in this paper. A beyond nominal breakdown voltage Class-E design methodology for SiGe HBT power amplifiers is proposed to generate high output power while maintaining high Class-E efficiency. A mm-wave SiGe stacked Class-E architecture is also introduced to increase the overall voltage swing, with each series stacked device operating in the beyond nominal breakdown mode. The mm-wave beyond <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$BV_{\rm CEO}$</tex></formula> operation of SiGe HBTs has been demonstrated experimentally in an integrated 45 GHz Class-E power amplifier fabricated in a 0.13 µm SiGe BiCMOS process with 20 dBm measured output power at 31.5% peak power-added efficiency (PAE). The series stacking of mm-wave Class-E power amplifier concept is also verified by fabricating double-stacked and triple-stacked SiGe HBT power amplifiers in 0.13 µm SiGe BiCMOS process which demonstrate a measured output power of 23.4 dBm at 41 GHz with peak PAE of 34.9%. High power, highly efficient, switching power amplifier unit cells presented in this paper can facilitate realization of efficient Watt-level mm-wave digital polar transmitters.

Developments within modern nonlinear measurement systems offer an increasing degree of flexibility to the microwave power amplifier (PA) designer. The PA designer has historically been a driving factor in setting the development directions of new measurement systems, fueling the paradigm, that PA innovations largely push new measurement requirements. It would appear that measurement system manufacturers are now the ones pushing the technology envelope. This paper discusses current trends within modern nonlinear measurement systems to determine who is leading whom and whether the aforementioned paradigm is shifting.

A high efficient GaN HEMT power amplifier with a new topology is presented for to be used at 3.4-3.7 GHz band. Short sections of the Microstrip-lines are used as harmonic traps at the load network in order to improve the efficiency. The fabricated GaN HEMT amplifier delivers 37.5 dBm saturated output power and the maximum power-added efficiency of 80% and a maximum drain efficiency of 83% are obtained at 3.6 GHz. These values represent the state-of-the-art performance efficiencies at S-Band.

This paper introduces a novel approach for the realization of wide band ( octave) high-efficiency ( 95%) high Power Amplifiers (PAs). The proposed concept utilizes active harmonic injection to achieve the appropriate waveform shaping of the voltage/current waveforms necessary to deliver simultaneously both high power and high efficiency operation. The new PA structure thus consists of two parallel PAs where the main PA generates fundamental power and an auxiliary PA injects a harmonic signal at the output of the main PA to perform waveform shaping. An active harmonic injection PA circuit designed around the 10W GaN transistor is demonstrated, along with the basic mathematical analysis and computer simulation of this new mode of operation. The measured performance of the PA demonstrator realized at 0.9 GHz provided a drain efficiency of 74.3% at P1dB, validating the concept and its potential.