Challenges in 3D Process Simulation for Advanced Technology Understanding

A novel two-dimensional (2D) process simulator has been developed which can handle local oxidation, implantation through arbitrary mask edges, nonplanar surfaces, and high concentration diffusion. Through coupling of 2D process and device simulators, the sensitivity of perimeter junction capacitance and breakdown voltage to variations in boron channel-stop implantation dose and local oxidation time has been simulated for a standard NMOS technology. Experimental results using test structures have confirmed the simulations. It is shown that simple power-law dependencies as a function of the process variables give good agreement with the data.

Shrinking feature sizes, novel device designs as well as stress engineering increase the need for three- dimensional process and device simulations. We present several application examples for full 3D process and device simulations using Sentaurus TCAD, including a 3D NMOSFET with shallow trench isolations (STI), a PMOSFET device with SiGe pockets for stress engineering (similar to the structure presented in Ref. [1]) and a Omega-FinFET (similar to structures presented in Refs. [2,3]). TCAD simulations of the full process flow as well as of the electrical device characteristics are performed. We also show examples of 3D oxidation simulations with Sentaurus Process.

The application of parallel computers to reservoir simulation is studied with the aid of two recently introduced Multiple Instruction, Multiple Data (MIMD) computers. The problems posed by reservoir simulators are shown to be particularly well suited for such parallel computers* Fundamental parallel programming techniques using Fortran are presented for the Hetrogeneous Element Processor (HEP) produced by Denelcor and the iPSC Hypercube produced by Intel. These techniques are then applied to two of the most time consuming tasks in reservoir simulation: forming the matrix coefficients and producing a sparse matrix solution. The problem of parallel formation of sparse matrix coefficients is addressed for the single and multiphase cases using both black oil and compositional fluid models. Parallel sparse matrix solution is addressed by considering D4 ordered Gaussian elimination, and the multigrid, conjugate gradient, and Successive Over-Relaxation (SOR) methods. Three parallel algorithms based on SOR are developed to illustrate the possible diversity of parallel algorithms. The red-black and multicolored SOR methods which are often used on vector machines are shown to be easily adaptable to parallel MIMD machine. Matrix partitioning and a new method of iteration pipelining are also presented as parallel SOR methods. The various SOR algorithms, in parallel form, are mapped onto the HEP to illustrate the speedups currently possible on an MIMD machine. Projections are made on the future importance of these types of machines to reservoir simulation.

We discussed the optimization of structure and doping profile of bulk-FinFETs by using 3D process and device simulations. The channel profile was determined so as to realize higher drive current as well as lower punch-through current. The analysis of stress field for bulk-FinFETs and SOI-FinFETs revealed that the channel stress induced by a stress liner (SL) in the bulk-FinFET is larger than that for the SOI-FinFET. In addition, we applied a raised source/drain (RSD) structure to the bulk-FinFETs and optimized doping profile in the RSD region. The combination of stress liner and RSD structure is found to be efficient for improving drive current of a bulk-FinFET.

From the Publisher: This book presents for the first time a unified treatment of the physical processes, mathematical models and numerical techniques for circuit, device and process simulation. At the macroscopic level, linear and nonlinear circuit elements are introduced to yield a mathematical model of an integrated circuit. Numerical techniques used to solve this coupled system of one-dimensional equations are described. Microscopically, current flow within a transistor is modeled using the drift-diffusion and hydrodynamic partial differential equations systems. Finite difference and finite element methods for spatial discretizations are treated, as are grid generation and refinement and multilevel schemes. At the fabrication level, physical processes such as diffusion, oxidation and crystal growth are modeled using reaction, diffusion, convection equations. These models require multistep integration techniques and Krylov projection methods for successful implementation. Exercises, programming assignments and an extensive bibliography are included.

In this paper experiences in use and application of TCAD in fabrication environment of deep sub-/spl mu/m semiconductor devices is given. Thereby we do not limit ourselves to standard process and device simulation but we discuss also the extension to parameter extraction, ESD and SER simulations. The main goal is to show how one can get a benefit from TCAD and what should be the expectation regarding accuracy and capability to predict. The limits of TCAD and the current status of 3D process and device simulation are discussed at the end of the paper.

Process modeling is widely used in the design of both integrated circuits themselves and in the design of integrated circuit manufacturing processes. Director1 gives an overview of the roles of process, device, and circuit simulators in the overall design process. Process simulation has been used for many years for more mature processes such as oxidation, diffusion, and ion implantation, and the widely used computer simulation programs for these processes use physically based, first principles models.2,3 Simulation is also widely used to predict the performance of resist development, etching, and film deposition processes.4,5 However, the process simulation models which are currently used to predict the performance of these processes are not first principles models. The current generation of plasma etching and deposition models is based on heuristic rules which describe the propagation of a moving boundary rather than on the solution of the fundamental equations which describe the underlying, physical processes. In fact, the required input data for current plasma etching and deposition models are experimentally measured etch and/or deposition rate values.

This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004. The conference program included 7 invited plenary lectures and 82 contributed papers for oral or poster presentation, which were carefully selected out of a total of 151 abstracts submitted from 14 countries around the world. Like the previous meetings, SISPAD 2004 provided a world-wide forum for the presentation and discussion of recent advances and developments in the theoretical description, physical modeling and numerical simulation and analysis of semiconductor fabrication processes, device operation and system performance. The variety of topics covered by the conference contributions reflects the physical effects and technological problems encountered in consequence of the progressively shrinking device dimensions and the ever-growing complexity in device technology.

A standard format for transmitting profiles of semiconductor structures between sites and between tools is described. The standard, called the profile interchange format (PIF), is a flexible and hierarchical format, capable of storing descriptions of semiconductor structures such as those produced and used by process and device simulators. It can store detailed descriptions of the geometry, attribute profiles, material properties, and transient behavior of a single structure or a collection of structures. Two equivalent forms of the PIF are proposed to resolve conflicting demands placed on the format by its two primary uses, which are transmitting profiles between sites and local use as a database for process and device simulation. The 'intersite' form of the PIF, which can be viewed as an extension of the electronic design interchange between sites, most importantly, portability. The 'intertool' form of the PIF is, in concept, equivalent in descriptive capabilities to the intersite form, but is intended to accommodate the needs of profile interchange between tools, most importantly, efficient storage and access of data. The PIF in both modes can be extended and modified to accommodate local needs.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Circuit simulation is a widely used but computationally demanding tool for VLSI design. In this paper, the considerations in achieving performance improvement through parallelization on a shared-memory multiprocessor are addressed. The two main components that comprise the computational bulk of circuit simulation, namely, matrix assembly and sparse matrix solution, raise very different issues in their parallelization. Parallelizing matrix assembly involves using a sequence of lock-synchronized parallel loops. A theoretical prediction of the performance of such loops is developed and this prediction is then compared to actual performance on a variety of circuits. Two approaches to parallel sparse matrix solution are contrasted: 1) an efficient implementation of an earlier proposed fine-grained model that captures parallelism at the elemental-operation level, and 2) a newly proposed medium-grained scheme that represents the computation at the row-operation level. A performance-evaluation framework is developed to interpret measured speedup in terms of various relevant factors. While the fine-grained approach achieves somewhat better load-balancing and also slightly lower scheduling overheads due to judicious task-clustering, the medium-grained approach is shown to be consistently superior for large circuit matrices due to lower operand access costs and better vectorization potential. The techniques developed have been incorporated into a prototype parallel implementation of the production circuit simulator ADVICE on the Alliant FX/8 multiprocessor.

The article presents a construction method and an example of a model of a technical object operation process as well as the main stochastic assumption which is a mathematical model of an object state changes. The model of the operation process was built using an analysis of the state space and operation-related events of the analyzed technical objects. An example of numerical simulation of the technical object state change process as a tool to be used to support the analysis of the considered process. Numerical simulation of the stochastic process being a model of a technical object state change process makes it possible to determine the process characteristics impossible to determine in an analytical way.

In order to improve system performance of HTGR-GT(High Temperature Gas cooled Reactor- Gas Turbine) system, high strength/ high thermal conductivity alumina dispersed copper material(AL-25) is very attractive material for the application to the fine rectangular plate fin of the recuperate in HTGR-GT. However, it is believed to be difficult to process AL-25 to the fine rectangle plate fin mainly due to its brittleness. In present study, large scale deformation simulation of AL-25 thin plate under the fine fin process was performed by finite element method (FEM) to determine the best fin processing technique for the recuperate plate fin, and on the basis of these results, double action type plate fin processing device was fabricated and tested its processing performance with AL-25 thin plate specimens. The following conclusions were determined; (1) Process simulation of rectangular fine plate of 3mm height and 4mm pitch with 0.156mm thickness was performed by FEM and testified the effectiveness of the double action type plate fin processing technique for present purpose. With these results, the best processing condition of radius of the dies and clearance was derived as 0.8mm and 0.25mm, respectively. (2) In these process conditions, processing test of the rectangular fine plate of 3mm height and 4mm pitch was made successfully with 0.156mm thin plate AL-25 without crack and fracture. (3) The process simulation results of the change in thickness of thin plate AL-25 after processing shows very good agreement with the measuring data of the rectangular plate fins. These results indicated that double action process and simulation technique in present study can be applicable to process fine rectangular plate fin with vely brittle materials as AL-25.

This paper demonstrates a methodology for systematic calibration of models in process simulators and its impact on improvement of accuracy and predictive capability of a TCAD system. A software tool for calibration with numerical optimization has been developed and used to calibrate a transient enhanced diffusion (TED) model under low-dose implantation conditions. Using the calibrated model, predictive simulations were performed prior to SIMS measurements. The systematic calibration and its validation through independent experiments showed significantly improved accuracy and predictive capability of process and device simulation system.

The state of the art in the field of process and device simulation at Harris Semiconductor, universities, and vendors is reviewed. Particular emphasis is on interrelationships between these groups and between the supporters of the simulation tools at Harris and Harris process/device designers. Simulation of one of the advanced processes is discussed in detail to show how important simulation has become to process development and to illustrate many of the points discussed. Availability of the source code to the companies has allowed Harris programmers to make several incremental improvements at user's request in the time needed. Some of these enhancements are also discussed. >

In this paper, we will give our view of the role of TCAD in the industrial technology development process, as well as of the division of labor between industrial TCAD, vendors of commercial TCAD software, and academia. Furthermore a list of model shortcomings is presented that — we feel still — prevent broad productive use of TCAD in industrial technology development. In the end we will define our primary demands for future development work on process and device simulation by vendors and institutes and our vision of the role of TCAD frameworks.