Process and device simulation at Harris Semiconductor

A novel two-dimensional (2D) process simulator has been developed which can handle local oxidation, implantation through arbitrary mask edges, nonplanar surfaces, and high concentration diffusion. Through coupling of 2D process and device simulators, the sensitivity of perimeter junction capacitance and breakdown voltage to variations in boron channel-stop implantation dose and local oxidation time has been simulated for a standard NMOS technology. Experimental results using test structures have confirmed the simulations. It is shown that simple power-law dependencies as a function of the process variables give good agreement with the data.

Shrinking feature sizes, novel device designs as well as stress engineering increase the need for three- dimensional process and device simulations. We present several application examples for full 3D process and device simulations using Sentaurus TCAD, including a 3D NMOSFET with shallow trench isolations (STI), a PMOSFET device with SiGe pockets for stress engineering (similar to the structure presented in Ref. [1]) and a Omega-FinFET (similar to structures presented in Refs. [2,3]). TCAD simulations of the full process flow as well as of the electrical device characteristics are performed. We also show examples of 3D oxidation simulations with Sentaurus Process.

This paper describes advances and remaining challenges in unstructured 3D meshing techniques for both process and device simulations and parallelization of the process simulator FLOOPS. The meshing is performed using a point cloud manager to create points and an unstructured tetrahedral mesher. Distributed parallel techniques are used to parallelize the sparse matrix assembly and solution for 3D process diffusion simulations.

A standard format for transmitting profiles of semiconductor structures between sites and between tools is described. The standard, called the profile interchange format (PIF), is a flexible and hierarchical format, capable of storing descriptions of semiconductor structures such as those produced and used by process and device simulators. It can store detailed descriptions of the geometry, attribute profiles, material properties, and transient behavior of a single structure or a collection of structures. Two equivalent forms of the PIF are proposed to resolve conflicting demands placed on the format by its two primary uses, which are transmitting profiles between sites and local use as a database for process and device simulation. The 'intersite' form of the PIF, which can be viewed as an extension of the electronic design interchange between sites, most importantly, portability. The 'intertool' form of the PIF is, in concept, equivalent in descriptive capabilities to the intersite form, but is intended to accommodate the needs of profile interchange between tools, most importantly, efficient storage and access of data. The PIF in both modes can be extended and modified to accommodate local needs.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004. The conference program included 7 invited plenary lectures and 82 contributed papers for oral or poster presentation, which were carefully selected out of a total of 151 abstracts submitted from 14 countries around the world. Like the previous meetings, SISPAD 2004 provided a world-wide forum for the presentation and discussion of recent advances and developments in the theoretical description, physical modeling and numerical simulation and analysis of semiconductor fabrication processes, device operation and system performance. The variety of topics covered by the conference contributions reflects the physical effects and technological problems encountered in consequence of the progressively shrinking device dimensions and the ever-growing complexity in device technology.

In this paper, we will give our view of the role of TCAD in the industrial technology development process, as well as of the division of labor between industrial TCAD, vendors of commercial TCAD software, and academia. Furthermore a list of model shortcomings is presented that — we feel still — prevent broad productive use of TCAD in industrial technology development. In the end we will define our primary demands for future development work on process and device simulation by vendors and institutes and our vision of the role of TCAD frameworks.

Process modeling is widely used in the design of both integrated circuits themselves and in the design of integrated circuit manufacturing processes. Director1 gives an overview of the roles of process, device, and circuit simulators in the overall design process. Process simulation has been used for many years for more mature processes such as oxidation, diffusion, and ion implantation, and the widely used computer simulation programs for these processes use physically based, first principles models.2,3 Simulation is also widely used to predict the performance of resist development, etching, and film deposition processes.4,5 However, the process simulation models which are currently used to predict the performance of these processes are not first principles models. The current generation of plasma etching and deposition models is based on heuristic rules which describe the propagation of a moving boundary rather than on the solution of the fundamental equations which describe the underlying, physical processes. In fact, the required input data for current plasma etching and deposition models are experimentally measured etch and/or deposition rate values.

In this paper experiences in use and application of TCAD in fabrication environment of deep sub-/spl mu/m semiconductor devices is given. Thereby we do not limit ourselves to standard process and device simulation but we discuss also the extension to parameter extraction, ESD and SER simulations. The main goal is to show how one can get a benefit from TCAD and what should be the expectation regarding accuracy and capability to predict. The limits of TCAD and the current status of 3D process and device simulation are discussed at the end of the paper.

Combined process modeling and subthreshold device simulation

From the Publisher: This book presents for the first time a unified treatment of the physical processes, mathematical models and numerical techniques for circuit, device and process simulation. At the macroscopic level, linear and nonlinear circuit elements are introduced to yield a mathematical model of an integrated circuit. Numerical techniques used to solve this coupled system of one-dimensional equations are described. Microscopically, current flow within a transistor is modeled using the drift-diffusion and hydrodynamic partial differential equations systems. Finite difference and finite element methods for spatial discretizations are treated, as are grid generation and refinement and multilevel schemes. At the fabrication level, physical processes such as diffusion, oxidation and crystal growth are modeled using reaction, diffusion, convection equations. These models require multistep integration techniques and Krylov projection methods for successful implementation. Exercises, programming assignments and an extensive bibliography are included.

Integration of process, device and circuit simulation tools is desirable in modern process development and circuit design, as it allows rapid assessment of the impact of a new process or process change on circuit performance, [1]. This paper presents an efficient scheme for the extraction of MOSFET linear region SPICE level 3 parameters from numerical device simulations. Carrier concentrations, potential and mobility are used to derive a total of seven linear region parameters from three off-state bias points. This is in contrast to standard curve fitting techniques where twenty or, more on-state bias points would typically be used to obtain the required parameters.

New combined method for calibrating the parameters of 2D technological and electrophysical models of "software package for two-dimensional process and device simulation - MicroTec-3.02" was suggested in this paper. This calibrating is realized on basis of high-accuracy 1D doping profiles in the channel and source-drain areas of MOS-transistors which were calculated by "FACT" software package, as well as volt-ampere characteristics of researched devices, that were really measured.

Passivated emitter and rear cell (PERC) silicon solar cells are currently being migrated to mainstream production in recent years. However, emitter recombination loss has become the main limiting factor in the PERC devices. The emitter region is formed using ion implantation followed by a diffusion process, and the process variables such as dose (cm-2), energy (keV), diffusion time (s), and temperature (oC) play a crucial role in the formation of the emitter region with desired properties such as peak doping concentration as well as the thickness of emitter region. The influence of these process variables on the performance of PERC solar cell is not investigated in the literature using process and device simulations. Therefore, to examine the emitter region performance in terms of ion implantation dose of phosphorus, an industrial standard stacked nitride-based front and back dielectric antireflective coated PERC solar cell has been designed and simulated by using Silvaco TCAD based process and device simulators. The objective is to analyze the influence of ion implantation dose of phosphorus on the performance of the PERC device while keeping the rest of the process-related parameters intact. A comprehensive analysis of the proposed research work has been studied using the current density-voltage (J-V), EQE curves and photovoltaic (PV) parameters. The PERC solar cell exhibits the highest conversion efficiency of 25.2% at the optimized phosphorus dose of 5×1015 cm-2. The PERC device under consideration reflects short circuit current density (J SC ) of 41.78 mA/cm2, open-circuit voltage (V OC ) of 0.72 V, and fill-factor (FF) of 83.57%. The reported study may open a window for the experimental work to understand the influence of phosphorus ion implantation dose on the quality of the emitter region and for further enhancement of conversion efficiency of the PERC solar cell.

TCAD process and device simulations are used to gain physical understanding for the integration of laserannealed junctions into a 28 nm high-k/metal gate first process flow. Spike-RTA (Rapid Thermal Annealing) scaling used for transient enhanced diffusion (TED) suppression and shallow extension formation is investigated. In order to overcome the performance loss due to a reduced RTA, laser anneal (LSA) is introduced after Spike-RTA to form highly activated and ultra shallow junctions (USJ). In this work, the impact of different annealing conditions on the performance of NMOS and PMOS devices is investigated in terms of Vth and Ion/Ioff, considering lateral dopant diffusion and activation.

PurposeThe high computational effort of steady-state simulations limits the optimization of electrical machines. Stationary solvers calculate a fast but less accurate approximation without eddy-currents and hysteresis losses. The harmonic balance approach is known for efficient and accurate simulations of magnetic devices in the frequency domain. But it lacks an efficient method for the motion of the geometry.Design/methodology/approachThe high computational effort of steady-state simulations limits the optimization of electrical machines. Stationary solvers calculate a fast but less accurate approximation without eddy-currents and hysteresis losses. The harmonic balance approach is known for efficient and accurate simulations of magnetic devices in the frequency domain. But it lacks an efficient method for the motion of the geometry.FindingsThe three-phase symmetry reduces the simulated geometry to the sixth part of one pole. The motion transforms to a frequency offset in the angular Fourier series decomposition. The calculation overhead of the Fourier integrals is negligible. The air impedance approximation increases the accuracy and yields a convergence speed of three iterations per decade.Research limitations/implicationsOnly linear materials and two-dimensional geometries are shown for clearness. Researchers are encouraged to adopt recent harmonic balance findings and to evaluate the performance and accuracy of both formulations for larger applications.Practical implicationsThis method offers fast-frequency domain simulations in the optimization process of rotating machines and so an efficient way to treat time-dependent effects such as eddy-currents or voltage-driven coils.Originality/valueThis paper proposes a new, efficient and accurate method to simulate a rotating machine in the frequency domain.