Comparative analysis of two realizations for hybrid-ARQ error control

Convolutional code is a coding scheme used in communication systems including deep space communications and wireless communications.It provides an alternative approach to block codes for transmission over a noisy channel.The block codes can be applied only for the block of data.The Convolutional coding has an advantage over the block codes in that it can be applied to a continuous data stream as well as to blocks of data.Viterbi decoder employed in digital wireless communication plays a rife role in the overall power consumption of trellis coded modulation decoder.Power reduction in Viterbi decoder could be achieved by reducing the number of states.A pre-computation architecture with T-algorithm was implemented for this purpose, and when we compare this result with full Trellis Viterbi decoder, this approach significantly reduces power consumption without degrading decoding speed.Convolutional encoding with viterbi decoding is a powerful FEC technique that is particularly suited to a channel in which the transmitted signal is corrupted mainly by Additive White Gaussian Noise (AWGN).It operates on data stream and has memory that uses previous bits to encode.The Viterbi Algorithm (VA) is proposed, used for decoding a bit stream that has been encoded using FEC code.The Convolutional encoder adds redundancy to a continuous stream of input data by using a linear shift register.A pre-computation architecture with Viterbi algorithm is implemented for this purpose, Viterbi (Convolutional) encoder and Viterbi decoder are designed and implemented using FPGA technology, which are the essential blocks in digital communication systems.It is particularly suited to a channel in which the transmitted signal is corrupted mainly by AWGN.The Viterbi decoder of Constraint length 7 and code rate ½ is considered.The design is implemented using verilog on Xilinx Spartan 3E and advanced Spartan 6 board and the results and Comparisons are presented.

Convolutional coding and Viterbi decoding, along with binary phase-shift keyed modulation, is presented as an efficient system for reliable communication on power limited satellite and space channels. Performance results, obtained theoretically and through computer simulation, are given for optimum short constraint length codes for a range of code constraint lengths and code rates. System efficiency is compared for hard receiver quantization and 4 and 8 level soft quantization. The effects on performance of varying of certain parameters relevant to decoder complexity and cost is examined. Quantitative performance degradation due to imperfect carrier phase coherence is evaluated and compared to that of an uncoded system. As an example of decoder performance versus complexity, a recently implemented 2-Mbit/s constraint length 7 Viterbi decoder is discussed. Finally a comparison is made between Viterbi and sequential decoding in terms of suitability to various system requirements.

In this study, a power-efficient very large-scale integration (VLSI) implementation for the convolutional code decoder is presented. Based on the state transparent convolutional code definition, the receiving codewords are classified into non-erroneous and erroneous segments separately. Different from the conventional Viterbi decoder (VD), the authors use a low-complexity decoder, denoted as bit reverse decoder, to recover the non-erroneous segments using reverse operation with a little power consumption and present the segment-based VD to decode the erroneous codeword segments. Then, the clock-gating technique is employed to switch between segment-based VD and bit reverse decoder for power saving. To further reduce the power consumption, the authors group registers into several segments in the survivor memory unit of the segment-based VD and also apply clock gating to each segment individually. According to the number of consecutive erroneous codeword segments, the corresponding numbers of register segments in the survivor memory unit are enabled and other register segments are clock-gated to reduce the switching activities. Besides, our design determines the start and terminal states of the survivor path to obtain correct results of erroneous segments without bit-error rate degradation. As compared with other decoders, our design requires less power without decreasing the decoding performance.

The puncturing technique allows obtaining high-rate convolutional codes from low-rate convolutional codes used as mother codes. This technique has been successfully applied to generate good high-rate convolutional codes which are suitable for Viterbi and sequential decoding. In this paper, we investigate the puncturing technique for convolutional self-doubly orthogonal codes (CSO/sup 2/C) which are decoded using an iterative threshold-decoding algorithm. Based on an analysis of iterative threshold decoding of the rate-R=b/(b+1) punctured systematic CSO/sup 2/C, the required properties of the rate-R=1/2 systematic convolutional codes (SCCs) used as mother codes are derived. From this analysis, it is shown that there is no need for the punctured mother codes to respect all the required conditions, in order to maintain the double orthogonality at the second iteration step of the iterative threshold-decoding algorithm. The results of the search for the appropriate rate-R=1/2 SCCs used as mother codes to yield a large number of punctured codes of rates 2/3/spl les/R/spl les/6/7 are presented, and some of their error performances evaluated.

In this paper, the performance comparison of serially concatenated Recursive systematic convolutional (RSC) code system with Non-systematic convolutional (NSC) code system is conduct. The two models of serially concatenated convolutional code is tested over Additive White Gaussian (AWGN) channel, Binary Phase-Shift Keying (BPSK) modulation and Viterbi decoder using MATLAB simulation. In first model of serially concatenated convolutional code uses Recursive systematic convolutional (RSC) as outer and inner encoder. In second model of serially concatenated convolutional code uses Non-systematic convolutional (NSC) as outer and inner encoder. The outer and inner encoders are concatenated with the help of interleaver. For decoding a non-iterative Viterbi decoding scheme is performed with two Viterbi decoder are concatenated by de-interleaver. The MATLAB simulation results shows that the performance of RSC-RSC concatenated code gives the better bit error rate (BER) than the NSC-NSC concatenated code.

Consideration is given to the bit error probability performance of rate 1/2 convolutional codes in conjunction with quaternary phase shift keying (QPSK) modulation and maximum-likelihood Viterbi decoding on fully interleaved Rician fading channels. Applying the generating function union bounding approach, an asymptotically tight analytic upper bound on the bit error probability performance is developed under the assumption of using the Viterbi decoder with perfect fading amplitude measurement. Bit error probability performance of constraint length K=3-7 codes with QPSK is numerically evaluated using the developed bound. Tightness of the bound is examined by means of computer simulation. The influence of perfect amplitude measurement on the performance of the Viterbi decoder is observed. A performance comparison with rate 1/2 codes with binary phase shift keying (BPSK) is provided. >

In this paper, two novel interleaving schemes suitable for a convolutional code are given as the block interleaving scheme and bit interleaving scheme. Based on convolutional coding with Viterbi decoding, the anti-interference performance of the (2,1,3) convolutional code using these two schemes in a mobile image communication system is studied and compared with the performance using traditional periodic interleaving scheme. The simulation results show that periodic interleaving scheme is not suitable for a convolutional code. The reliability of an image transmission system in a fast fading mobile channel can be improved greatly by adopting the (2,1,3) convolutional code combined with block interleaving scheme or bit interleaving scheme as the anti-interference measure.

Use of the Viterbi decoder to decode the (63, 57) Hamming code is considered, Implementation and performance of systematic and nonsystematic codes are addressed. It is shown that a Viterbi decoder for the constraint length seven, rate- 1/2 convolutional code can be used to decode both systematic and nonsystematic (63, 57) Hamming codes, but an additional step is needed to complete the decoding of the systematic code. Bounds and simulation results for postdecoding bit-error probability are given and it is shown that the systematic code performs 0.4 dB better than the nonsystematic code. A heuristic explanation is provided.

The authors propose a novel control channel quality improvement scheme for satellite communication systems using a majority decision method over convolutional coding and Viterbi decoding channels. To improve majority decision performance, which is degraded by burst errors due to Viterbi decoding in conventional serial transmission methods, a parallel transmission method is proposed. The performance of the parallel and serial transmission methods has been analyzed, and experimenta have been carried out using rate 1/2 convolutional encoding and Viterbi decoding (constraint length 4 and 7). It is shown that the parallel transmission method has about 10/sup 10/ times lower block error performance at P/sub e/=1*10/sup -4/ than the conventional method. >

Since 1967, Viterbi decoder is considered to be the maximum-likelihood decoding algorithm for convolutional codes and codes with state machine representation. Distance-preserving mapping codes designed from the mapping of convolutional codes outputs to permutation sequences make use of constructions that help choosing the best mapping and improving the performance of Viterbi decoding by improving the distances metrics in the trellis diagram of the code. Combining these new designed codes with M-FSK modulation is to combat permanent frequency disturbances in power-line communications channel. The choice of the M-FSK detector also plays a role in the improvement of the decoding process at the demodulator. Viterbi's ratio Threshold test (VRTT) is modified to avoid the erasure detection, as we are not interested in such errors in our channel and to be considered as a soft decision detection for the envelope detector.

Maximum likelihood decoding of convolutional codes by Viterbi decoding method is an effective error correcting technique. However, little study on Viterbi decoding of high rate codes has been done since the number of paths entering each trellis state increases as the code rate increases. This paper presents a new maximum likelihood decoding of convolutional codes of rate (n ‐ 1)/n using a trellis. the trellis is drawn according to the state transitions of the syndrome former of the code, and has only one or two paths entering each state rather than 2n‐1 paths as in the case of conventional trellises. Thus, we can replace the 2n‐1‐ary comparisons at each state needed in the conventional Viterbi decoding for the code of rate (n ‐ 1)/n by binary comparisons. the implementation of maximum likelihood decoders for high rate convolutional codes is simplified greatly by this approach. Moreover, this decoding method shows the same performance as that of conventional Viterbi decoding method from the viewpoint of selecting the maximum likelihood code sequence.

Rapidly growing demand for high data rates in wireless communication systems is the cause of the merging of Multiple Input Multiple Output (MIMO) and Orthogonal Frequency Division Multiplexing (OFDM) techniques. MIMO-OFDM technique needs Radio Frequency (RF) front end in each antenna, which is not effective for large dimensional antenna size. Therefore, RF front end on the receiver side will be simplified using a single RF technique based on the Electrically Steerable Parasitic Array Radiator (ESPAR) antenna. In real life, a channel cannot be ideal. Therefore, before the signal is transmitted, that signal must be coded to minimized errors when the data transmission process. Convolutional code is a coding technique that can detect and correct error bit (error control coding) and that it is expected to reduce the quantity of Bit Error Rate (BER). In this research, a simulation is designed to analyze single RF performance on the MIMO-OFDM system using Vertical Bell Laboratories Space-Time (VBLAST) detection for convolutional code encoder and Viterbi decoder. The result simulation shows that the channel estimation technique works well on the MIMO-OFDM system using single RF, which is shown in the magnitude and phase curves against the subcarrier index between the theory channel and the estimated channel are at almost the same points. VBLAST-ZF detector performance is shown in the BER curve against SNR, where the difference BER value for SNR value 10 dB between the theory channel and the estimated channel is 0.001499. Channel coding technique using convolutional code encoder and Viterbi decoder with a rate of ½ works well on the MIMO-OFDM system using single RF which is shown in the BER curve against SNR, where BER value with coding technique is smaller than BER value without coding technique.

Convolutional codes are channel codes, which are extensively used in communication systems like GSM (global system for mobile communications) and Interim standard IS-95.We introduce a strategy to present convolutional codes to students learning wireless communication systems, digital communication or similar courses, without using mathematical structures.In this paper, we will discuss our method to implement convolutional encoding and Viterbi decoding to determine the bit error rate.We have compared its performance under different conditions.To exemplify and illuminate our approach, we have selected a communication channel with rate 1/3 convolutional code.Constrain length is three for both Viterbi hard decision decoding method and Viterbi soft decision decoding method.Results suggest that soft decision decoding has at least 3.24 dB improvements in SNR compared to hard decision decoding for same bit error rate.Also by using soft decision Viterbi decoding on AWGN channel, we have examined various convolutional codes for four different constrain lengths and rates.We find that the first code with rate 1/3 code and constrain length 3 has better bit error rate performance with respect to other coding methods.This means, it gives a lower bit error rate for the same value of signal to noise ratio used in other coding schemes.Thus, to achieve the same bit error rate the first code will require a lower SNR.A lower SNR means a lower transmitter power.However, if we use this code the bandwidth requirement is three times larger compared with an un-coded transmission.For the second coding scheme we have an increase in bandwidth by a factor of 2 and for the third and fourth coding scheme the increase factor is 1.5.We believe this approach and its corresponding results will expose students to conceptual and technical aspects of signal encoding and its analysis.

Utilization of error rectifying codes has demonstrated to be a compelling method to conquer information corruption in advanced correspondence channels. Convolution encoding with Viterbi unravelling is a ground-breaking strategy for forwarding blunder revision. Convolutions codes are one of the most generally utilized divert codes in reasonable correspondence frameworks. These codes are created with a solid scientific structure and are fundamentally utilized for ongoing error revision. Convolution codes convert the whole information stream into one single codeword. The encoded bits depend on the present info bits as well as on past information bits. The principle deciphering procedure for convolution codes depends on the broadly utilized Viterbi calculation. Convolution coding with Viterbi disentangling has been the transcendent FEC method utilized broadly in various applications to accomplish dependable information move, including computerized video, radio, versatile correspondence, and satellite correspondence. The goal of this undertaking is to structure and execute a convolution encoder of rate 1/3 and requirement length 5 and Viterbi decoder of rate 1/3 and imperative length 5 on FPGA equipment. The work additionally incorporates structuring a clamor module from which commotion can be presented in the encoded information for testing purposes. All modules are structured utilizing VHDL programming language and execute utilizing FPGA board. Programming Using FPGA is utilized to help power computation and performance analysis of Viterbi-Decoder.

The Viterbi algorithm is mostly used technique in the latest communication technology nodes to decode the convolutional codes. It is widely used in digital cellular, satellite communications and wireless Local Area Networks (LANs). In this work three different types of error detection schemes are discussed. Add-compare and select unit is iterative process in Viterbi decoder. Reduction of latency is achieved using the concept of Brent-Kung Adder. This scheme promotes the overall system performance by reducing the propagation delay. The merits of the proposed schemes are embedded with the design to detect and correct the transient and stuck-at-faults. The system functionality is verified using verilog HDL. The proposed architectures are simulated and synthesized in CADENCE [45nm technology] for Application Specific Integrated Circuit (ASIC) and FPGA (Virtex-6 family). In case of ASIC implementation, we achieve an improvement in delay by 12.39%, area by 11.43% for error detection and 5.83% in delay, 1.10% in area for error correction module. Also achieved an improvement in delay by 31.87%, area by 37.50% for error detection and 1.10% in delay, 5.83% in area for error correction over proposed error detection architecture in the FPGA implementation.