High Linear Voltage References for on-chip CMOS Temperature Sensor

SummaryVoltage references are typically designed by combining a complimentary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) voltage references. However, in contrast to conventional voltage references, the proposed circuit generates a voltage reference by subtracting two PTAT voltages, resulting in an extremely low process‐dependent voltage reference. A novel subtractor is also proposed for subtracting PTAT voltages, which is used to generate the reference voltage. The temperature coefficient of the proposed voltage reference is further improved using a novel PTAT slope compensation technique. The proposed voltage reference is a MOS‐only ultra‐low power circuit that works with sub‐bandgap supply voltage. Simulation results using UMC 0.18 m technology MOSFETs show that the proposed circuit has a line sensitivity of 0.5%/V, a temperature coefficient of 21.37 ppm/° C, a power consumption of 15.6 nW, and an output voltage variation of only 0.22% due to process variations.

To improve the performance of typical first-order bandgap references, a high precision bandgap voltage reference with second-order curvature correction is proposed in this paper. Utilizing a temperature independent current (has nothing to do with the temperature of first order) and a proportional to absolute temperature (PTAT) current, a proportional to the square of temperature (PTAT2) current can be generated, which can be further used to compensate the second-order term in the Taylor-series expansion of the diode voltage, and the precision of the voltage reference is improved. The design was verified in a Bi-CMOS process, and simulation results showed that the temperature of the designed voltage reference was 10 ppm/°C at the temperature range from −45°C to 125°C and the consumed current was 7 µA at 5V supply voltage.

Two original superior-order curvature-corrected voltage references was presented. In order to improve the temperature behavior of the circuits, double differential structures was used, implementing the linear and the superior-order curvature corrections. An original CTAT (complementary to absolute temperature) voltage generator was proposed, using exclusively MOS transistors biased in weak inversion for a low power operation of the voltage reference. The superior-order curvature-correction was implemented by taking the difference between two gate-source voltages of subthreshold-operated MOS transistors, biased at drain currents having different temperature dependencies: PTAT (proportional to absolute temperature) and PTAT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The SPICE simulations confirm the theoretical estimated results, showing temperature coefficients under 11 ppm/K for an extended input range 173K < T < 423K and for a supply voltage of 2.5V and a current consumption of about 1muA

A complementary metal oxide semiconductor (CMOS) voltage reference with a logarithmic curvature-correction will be presented. The first-order compensation is realised using an original offset voltage follower (OVF) block as a proportional to absolute temperature (PTAT) voltage generator, with the advantages of reducing the silicon area and of increasing accuracy by replacing matched resistors with matched transistors. The new logarithmic curvature-correction technique will be implemented using an asymmetric differential amplifier (ADA) block for compensating the logarithmic temperature dependent term from the first-order compensated voltage reference. In order to increase the circuit accuracy, an original temperature-dependent current generator will be designed for computing the exact type of the implemented curvature-correction. The relatively small complexity of the current squarer allows an important increasing of the circuit accuracy that could be achieved by increasing the current generator complexity. As a result of operating most of the MOS transistors in weak inversion, the original proposed voltage reference could be valuable for low-power applications. The circuit is implemented in 0.35 μm CMOS technology and consumes only 60μA for t = 25°C, being supplied at the minimal supply voltage V DD = 1.75V. The temperature coefficient of the reference voltage is 8.7 ppm/°C, while the line sensitivity is 0.75 mV/V for a supply voltage between 1.75 V and 7 V.

A CMOS-based temperature sensor is proposed for low-voltage and low-power on-chip thermal monitoring applications. The proposed temperature sensor converts a proportional to absolute temperature (PTAT) current to a PTAT frequency using an integrator and hysteresis comparator. In addition, it operates in the subthreshold region, allowing reduced power consumption. The proposed temperature sensor was fabricated in a standard 90 nm CMOS technology. Measurement results of the proposed temperature sensor show a temperature error of between −0.81 and +0.94°C in the temperature range of 0 to 70°C after one-point calibration at 30°C, with a temperature coefficient of 218 Hz/°C. Moreover, the measured energy of the proposed temperature sensor is 36 pJ per conversion, the lowest compared to prior works.

As a way of generating high precision voltage reference, bandgap voltage reference is a very important module in the analog integrated circuits and mixed-signal integrated circuits to provide a temperature and power supply insensitive output voltage. The bandgap voltage reference circuit presented here in this paper is an improved conventional bandgap reference circuit. A self-biasing structure and a current mirror structure are used. It can get the PTAT(Proportional to absolute temperature) current, and then get the voltage that is proportional to temperature. The output voltage of an Op-amp is adopted as the op-amp's offset voltage to make the power consumption lower, and high value polysilicon resistors of low temperature coefficient are used to reduce the impact of resistor drift on the circuit. The errors caused by current mismatch is eliminated in the improved CMOS bandgap, and at the same time the DC PSRR (power supply rejection ratio) is increased because of the increase of the feedback factor.

ABSTRACTThis paper proposes a nanowatt voltage reference (VR) with temperature coefficient compensation. All transistors work in the subthreshold region. The complementary‐to‐absolute‐temperature (CTAT) voltage and proportional‐to‐absolute‐temperature (PTAT) voltage are mainly generated by two NMOS transistors with different threshold voltages. At the same time, a simple temperature compensation circuit is designed to optimize the temperature coefficient at high temperatures, so that the proposed VR circuit can generate a reference voltage with a wider temperature range and a lower temperature coefficient. The proposed VR circuit is implemented using a standard 0.18‐μm CMOS process with an active area of only 0.022 mm2. The postlayout simulation results show that the proposed VR circuit generates a reference voltage of 308.21 mV at room temperature. Its temperature coefficient is 6.4 ppm/°C over a temperature range of −40°C°C–140°C, with a power consumption of 7.4 nW. The voltage line sensitivity (LS) is 0.098%/V, and the power supply ripple rejection (PSRR) is −72 dB @DC and −42 dB @10 MHz.

In this paper, we describe a sub 1 V bandgap voltage reference (BGR) in CMOS technology. The proposed topology is based on a current-mode bandgap structure that uses a transimpedance amplifier. A feedback control in the bandgap produces temperature compensation between a PTAT (Proportional To Absolute Temperature) current and a CTAT (Conversely proportional To Absolute Temperature) current derived from a nMOS threshold voltage. The proposed circuit was verified by extensive circuit simulations, using models, of a standard 0.18 /spl mu/m CMOS technology, with a power supply of 1 V. The variations of the output voltage over a typical temperature range (0 to 100/spl deg/C) were simulated to be less than 1%.

An high-resolution CMOS temperature sensor with high linearity in the range from 20°C to 90°C is presented. The circuit uses substrate bipolars as temperature transducers. The temperature sensor consists of two building blocks: a Proportional To Absolute Temperature (PTAT) voltage generator and a differential amplifier. The second block is necessary to obtain reasonable voltage level that can be either read with a simple setup using it as analog input for an ADC. The simulation predictions are confirmed with experimental data resulting from the IC fabricated in a standard 0.35µm CMOS technology.

A curvature-compensated CMOS voltage reference using [formula omitted] characteristics

Localized data conversions for sensors placed under harsh environmental conditions often require Analog to Digital Converters (ADC) capable of working under wide operating temperature range. Even though the fastest analog to digital converter, flash ADC is omitted from the high temperature regime due to the requirements of reference voltage source, reference voltage divider and a comparator array capable of providing stable operation under wide operating temperatures. A CMOS Schmitt inverter-based internal reference comparator array for flash ADC which is efficient in terms of area and power consumption, capable of working under wide temperature range is presented in this paper. The proposed idea replaces the reference voltage source, resistive reference voltage divider and differential comparator array of a conventional flash ADC by an array of suitably sized Schmitt inverters. The circuit was simulated for static and dynamic characteristics with gpdk 180 nm library using cadence virtuoso simulation suite. The voltage transfer characteristic curve (VTC) of the proposed comparator array was found invariable when a temperature sweep in the range of −40 to 170 degree Celsius was performed. Each of the comparator in the proposed array consumes a silicon area of 40.68 and the average dynamic power consumption per cycle is estimated as 103.1 uW.

Presents a new all-MOS circuit technique for very-low-voltage proportional-to-absolute temperature (PTAT) references. Optimization of supply scaling below the sum of threshold voltages is based on log companding and implemented by operating the MOSFET in weak inversion. The key design equations for current (/spl mu/A) and voltage (sub-100 mV) references and their standard deviations (around 5%) are derived by analytical analysis. Two sub-1-V sub-5-/spl mu/W integrated PTAT references are presented and exhaustively tested for 1.2- and 0.35-/spl mu/m very large scale integration technologies. Both designs report good agreement between analytical, simulated, and experimental data, exhibiting PSRR(DC)+>60 dB. Hence, the resulting PTAT circuits are suitable for very-low-voltage system-on-a-chip applications in digital CMOS technologies.

This paper proposes a MOSFET-based all-digital temperature sensor fabricated in a standard 55-nm CMOS process. The temperature sensing elements of the sensor are composed of ring oscillators, which convert temperature information into frequency information. The frequency ratio’s proportional to absolute temperature (PTAT) feature is generated by using two separate frequency oscillators with varied temperature sensitivity. The frequency-to-digital converter (FDC) converts frequency information into digital representation without introducing any overhead reference clock. A die area of 1915µm2 is occupied, owing to the all-digital architecture. After two-point calibration, the proposed sensor achieves an error of -0.4°C∼+0.6°C throughout a temperature range of -40°C∼125°C. With the help of class-adjustable oscillators, the sensor can function in a wide supply voltage range from 0.5V to 1.2V. It obtains a resolution of 0.166°C at room temperature with a dissipation of 2.5µW.

This work presents a technique for temperature compensation of Silicon Piezoresistive Pressure Sensors (PPSs) based on a Proportional to Absolute Temperature (PTAT) Bias-Current circuit (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PTAT</sub> ). This technique is applied on the Multi-Stage Current-Mode Piezoresistive Pressure Sensor based on a 3-Terminal Pressure Sensor (3-TPS) that recently has been being studied as an alternative to the conventional Wheatstone Bridge and Transversal PPSs. The experimental maximum differential sensitivity of the sensor output current relative change, for 500μA constant bias current, amounts to 0.64%/psi @20°C. The sensor output current sensitivity temperature dependence, without compensation, amounts to 0.06μA/°C over a range from 20°C to 80°C. After compensation, the experimental results show a maximum deviation of 1.5% within the full scale output span. This efficient compensation was achieved using a PTAT bias current whose Temperature Coefficient (TC) amounts to 0.06μA/°C.

This article presents an uncooled monolithic resonant terahertz (THz) thermal detector using a standard 55 nm CMOS process without any postprocessing procedures. The detector is composed of a resonant loop antenna loaded with a polysilicon resistor and a proportional to absolute temperature (PTAT) sensor which is used as a temperature sensitive device. The basic operation principle, overall design considerations and relatively better measurement results are demonstrated. A maximum responsivity of 30.6 V/W and a minimum noise equivalent power (NEP) of 1.68 μW Hz for the thermal detector are measured at the operating frequency of 910 GHz.