Three-Junction Bandgap Circuit with Sub 1 ppm/°C Temperature Coefficient

This paper presents a general approach to extract V GO from the base emitter voltage of a bipolar transistor. V GO is the silicon bandgap voltage at zero Kelvin and it is a physical constant voltage independent of temperature. The proposed method can be implemented on any of the widely used Banba, Kuijk, Brokaw or resistorless structures to build voltage references with sub-ppm/°C temperature coefficient. One embodiment based on Kuijk structure is used to illustrate how the proposed V GO extraction can be realized. Error sources which can affect the voltage reference's performance are analyzed with a new base expansion and their effects on the temperature coefficient are minimized after the proposed two-temperature trimming. Transistor level simulations are run in GlobalFoundries 130nm process and simulation results show that the design can achieve 0.5 ppm/°C temperature coefficient from −40 °C to 125 °C.

In order to meet the market demand for wide temperature range and high precision bandgap voltage reference, this paper designs a bandgap reference with wide temperature range and low temperature coefficient. In this paper, the basic implementation principle of the bandgap reference is analyzed.On the basis of the traditional bandgap reference circuit structure,this design adds a trimming network and a temperature compensation network. A new Gaussian bell curve compensation technique is adopted to compensate the low temperature section, and the normal temperature section and the high temperature section respectively. Compared with the existing compensation technology, the versatility and the compensation effect is better. The designed circuit is designed and manufactured based on the Huahong HHNECGE0.35um process. The results show that the output voltage is 2.5V at 2.7V supply voltage and temperature range of -40-125°C.at typical process angle ,the temperature coefficient is 0.54618 PPm/°C,and is within 1PPm/°C at other process angles.

A curvature-compensated CMOS voltage reference using [formula omitted] characteristics

Localized data conversions for sensors placed under harsh environmental conditions often require Analog to Digital Converters (ADC) capable of working under wide operating temperature range. Even though the fastest analog to digital converter, flash ADC is omitted from the high temperature regime due to the requirements of reference voltage source, reference voltage divider and a comparator array capable of providing stable operation under wide operating temperatures. A CMOS Schmitt inverter-based internal reference comparator array for flash ADC which is efficient in terms of area and power consumption, capable of working under wide temperature range is presented in this paper. The proposed idea replaces the reference voltage source, resistive reference voltage divider and differential comparator array of a conventional flash ADC by an array of suitably sized Schmitt inverters. The circuit was simulated for static and dynamic characteristics with gpdk 180 nm library using cadence virtuoso simulation suite. The voltage transfer characteristic curve (VTC) of the proposed comparator array was found invariable when a temperature sweep in the range of −40 to 170 degree Celsius was performed. Each of the comparator in the proposed array consumes a silicon area of 40.68 and the average dynamic power consumption per cycle is estimated as 103.1 uW.

To improve the performance of typical first-order bandgap references, a high precision bandgap voltage reference with second-order curvature correction is proposed in this paper. Utilizing a temperature independent current (has nothing to do with the temperature of first order) and a proportional to absolute temperature (PTAT) current, a proportional to the square of temperature (PTAT2) current can be generated, which can be further used to compensate the second-order term in the Taylor-series expansion of the diode voltage, and the precision of the voltage reference is improved. The design was verified in a Bi-CMOS process, and simulation results showed that the temperature of the designed voltage reference was 10 ppm/°C at the temperature range from −45°C to 125°C and the consumed current was 7 µA at 5V supply voltage.

The mostly widely used lithium (Li) batteries, including lithium-ion (Li-ion) batteries, are activated via organic solvent based electrolytes that are highly flammable. The flammable electrolyte can potentially impose impediments to large-format battery device implementation because, under abuse conditions (e.g., internal short circuit, overcharge, crush, etc.), Li batteries can be hazardous due to heat generation which can potentially lead to toxic/flammable material release, fire and over-pressurization/explosion [1]. These hazards represent major concerns for power source platforms populated by personnel, sensitive equipment and/or vital structures. Recent high-profile incidents involving energy dense batteries (e.g., the Boeing 787 Dreamliner battery fire incident [2]) have increased public awareness of battery safety and resulted in intensified scrutiny for the processes used to develop, manufacture, certify and transport Li batteries. Here we present ADA efforts in the development of a Li battery technology comprised from a nonflammable, high performance, room temperature ionic liquid (RTIL)-based or hydrofluoroether (HFE)-based electrolytes and a nano-engineered, atomic layer deposition (ALD) functional material coated, high voltage, high energy density cathode (i.e., high voltage LiCoO2 or HV-LCO). We demonstrate that such combinations can afford a Li battery technology with an unprecedented high energy density (over state-of-the-art Li-ion or Li batteries), high rate capability, a wide operation temperature range, long cycle life at room temperature (RT) and temperature extremes and safety. Figure 1 shows electrolyte flammability test results. A lighter was used to ignite the electrolyte in a watch glass dish in open air. An organic solvent based, Li-ion battery baseline (conventional) electrolyte was ignited and self-burning when the ignitor was moved away. Each of the RTIL- and HFE-based electrolytes did not ignite and, no self-combustion was observed. Figure 2 shows discharge voltage profiles of Li/HV-LCO cells with RTIL- and HFE-based nonflammable electrolytes as a function of temperature. The cells were cycled between 3-4.6V. At RT, the cells delivered a high specific capacity/energy (> 200 mAh/g and > 800 Wh/kg, cathode active weight). At 50°C, the cells delivered a slightly higher (1-3%) specific capacity than RT. At -20°C, the cells were cycled at C/10 rate and delivered ~75% of the capacity at RT (~155 mAh/g). At -40°C, the cells were cycled at C/20 rate. The HFE-based electrolyte cell delivered a much higher specific capacity (66.5 mAh/g) than the RTIL-based (negligible). Figure 3 shows excellent rate capability of the RTIL-based electrolyte with 85% capacity retention at 10C rate. Figure 4(a) shows high voltage cycle life between 3-4.6V at RT for pristine LCO and HV-LCO based Li cells using the RTIL-based electrolyte. The pristine LCO cells experienced a rapid capacity fade while the HV-LCO cells demonstrated excellent cycle life stability with > 92% capacity retention after 100 cycles. We attribute the excellent HV-LCO high voltage cycle performance to the ALD functional material coating on LCO; this coating effectively suppresses the degradation root cause, i.e., the Co4+ dissolution and hexagonal to monoclinic phase transition [3]. We also evaluated cycle life at an extreme high temperature of 75°C. Figure 4(b) shows high voltage cycle life test data for pristine LCO and HV-LCO based lithium cells using RTIL-based electrolyte with additives. The cells were cycled between 3-4.5V. The pristine LCO based cell still faded much more quickly than the HV-LCO based cell; the latter exhibited an extraordinary high voltage high temperature cycle resiliency (97% capacity retention after 30 cycles, vs. 75% of the pristine LCO) even at the extreme high temperature of 75°C. We attribute the outstanding cycle stability at 75°C to the synergistic benefits of nano-engineered cathode and passivation protection from the electrolyte additives. Our study highlights the importance of combining high performance, safe electrolyte with nano-engineered cathode (e.g., ALD nano-engineered LCO) to render the resultant lithium battery with unprecedented energy density (gained from the high voltage operation), high rate capability, safety (nonflammability) and robust cycle life over a wide temperature range particularly at the extreme high temperatures (e.g., 75°C). We demonstrate that our Li battery technology is ideally suited for many high energy density and safety demanding applications, such as, electric drive vehicles, consumer electronics, medical, space and military applications. References Peter Roth and Christopher J. Orendorff, Electrochem. Soc. Interface, Summer 2012, page 44.“FAA Grounds Boeing 787 Dreamliner for Battery Problems”, Aviation International News, January 2013Akira Yano, Masahiro Shikano, Atsushi Ueda, Hikari Sakaebe, and Zempachi Ogumi, Electrochem. Soc., 164, A6116 (2017). Figure 1

ABSTRACTThis paper proposes a nanowatt voltage reference (VR) with temperature coefficient compensation. All transistors work in the subthreshold region. The complementary‐to‐absolute‐temperature (CTAT) voltage and proportional‐to‐absolute‐temperature (PTAT) voltage are mainly generated by two NMOS transistors with different threshold voltages. At the same time, a simple temperature compensation circuit is designed to optimize the temperature coefficient at high temperatures, so that the proposed VR circuit can generate a reference voltage with a wider temperature range and a lower temperature coefficient. The proposed VR circuit is implemented using a standard 0.18‐μm CMOS process with an active area of only 0.022 mm2. The postlayout simulation results show that the proposed VR circuit generates a reference voltage of 308.21 mV at room temperature. Its temperature coefficient is 6.4 ppm/°C over a temperature range of −40°C°C–140°C, with a power consumption of 7.4 nW. The voltage line sensitivity (LS) is 0.098%/V, and the power supply ripple rejection (PSRR) is −72 dB @DC and −42 dB @10 MHz.

This paper presents a voltage reference that utilizes the virtually diode-connected MOS transistors, biased in the weak-inversion region. The proposed architecture increases the gain of the feedback loop that consequently reduces the system sensitivity, and hence improves the PSRR. The circuit is designed and simulated in a standard 0.18µm CMOS technology. The simulation results in HSPICE indicate the successful operation of the circuit as follows: the PSRR at DC frequency is 86dB and for the temperature range from -55°C to 125°C, the variation of the output reference voltage is less than 66ppm/°C.

Designing alloys with an accurate temperature-independent electrical response over a wide temperature range, specifically a low temperature coefficient of resistance (TCR), remains a big challenge from a material design point of view. More than a century after their discovery, Constantan (Cu-Ni) and Manganin (Cu-Mn-Ni) alloys remain the top choice for strain gauge applications and high-quality resistors up to 473-573 K. Here, an average TCR is demonstrated that is up to ≈800 times smaller in the temperature range 5-300 K and >800 times smaller than for any of these standard materials over a wide temperature range (5 K < T < 1200 K). This is achieved for selected compositions of Alx CoCrFeNi high-entropy alloys (HEAs), for which a strong correlation of the ultralow TCR is established with the underlying microstructure and its local composition. The exceptionally low electron-phonon coupling expected in these HEAs is crucial for developing novel devices, e.g., hot-electron detectors, high-Q resonant antennas, and materials in gravitational wave detectors.

This brief presents a CMOS voltage reference for ultra-low-power applications, such as in implementable medical devices and energy harvesting-based wireless sensor nodes. In these applications, excellent capabilities to reject interference from power sources and work in low voltage to extend survival periods are critical for the voltage references. A transistor size-ratio determined current generator with high process and voltage independence is implemented by two same-threshold-voltage NMOS transistors, hence obtaining the precise reference voltage with an active load. The proposed circuit is fabricated in a standard 0.18μm CMOS process. Measurement results show that the prototype design provides a 210-mV reference with only 0.027% line sensitivity with a supply voltage from 1.8 V down to 0.4 V. The power supply ripple rejection at 10 Hz, 1 KHz, and 1 MHz is -59, 47, and 53 dB, respectively. The temperature coefficient is 82 ppm/°C in the temperature range from -40°C to +140 °C. Furthermore, the power consumption is only 9.6 nW at room temperature and the active area is 0.021 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

A novel design for temperature-compensated CMOS voltage reference sources by using the 1st order voltage reference taking into account the property of the conventional current generator is proposed to minimize the temperature coefficient because the 2nd order voltage reference obtained by the compensated nonlinearity of the base-emitters in complementary to absolute temperature has inherent complex problems due to the large scale circuits. A temperature coefficient of the proposed voltage reference source is estimated by using the current generator, which operates at smaller or larger temperature in comparison with the optimized operating temperature. The proposed temperature-compensated CMOS voltage reference sources are simulated by using a SMIC 0.35 gm CMOS technology. The temperature coefficient, obtained from the SMIC 0.35 μm CMOS technology, is 8.35 ppm/°C in a temperature range between ’40 and 125°C. The simulated results indicate that the proposed temperature-compensated CMOS voltage reference sources by using the 1 st order voltage reference taking into account the property of the conventional current generator can be used to decrease the temperature coefficient.

High linear voltage reference circuitry is designed and implemented in TSMC 0.13 mum and 0.18 mum CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in conventional PTAT (proportional to absolute temperature) circuits. However, such solutions often have linearity problem in high temperature region due to the current leaking devices in modern deep sub micron and nano-scale CMOS technology. The proposed circuit utilized temperature complementation technique on two voltage references, PTAT and IOAT (independent of absolute temperature) references, to enhance the linearity and produce a more stable lOAT voltage reference. Base on the simulation results, the R-squares of both circuitries are better than 0.999 in a considerable wider temperature range from -55degC to 170degC. Thus, a fully integrated temperature sensor with wider temperature range is designed and easily to integrate to modern system-on-chip designs with minimal efforts.

Chapter 1 - Voltage References and Voltage Regulators

Sugar solutions such as sucrose, glucose and fructose are often used in osmotic dehydration processes. Thus, the experimental determination of their thermophysical properties is a must for designing purposes. Density, specific heat and thermal conductivity were determined in a wide range of solute concentration (10–60 °Brix) and temperature (273.15–358.15 K). Empirical equations were considered to fit the experimental data and to evaluate the data behavior. An assessment based on the Prandtl number was considered to correlate thermal and rheological data. Higher density and lower specific heat and thermal conductivity values were observed when temperature decreased and solute concentration increased. Prandtl number behaved similarly as density, indicating that momentum transfer is favored in comparison with heat transfer in more concentrated solutions at lower temperatures. A versatile polynomial model concerning the significant variables could predict the experimental values for all solutions with good accuracy (R2 &gt; .9863 and MRE &lt; 1.20%). Reported data and equations showed to be essential for engineering aspects and transport phenomena analysis.Practical ApplicationsSucrose, glucose and fructose solutions are commonly used in osmotic dehydration processes to promote solute incorporation, increasing shelf‐life and quality of food products. The availability of thermophysical properties in a wide range of solute concentration and temperature covers the most of conventional and nonconventional conditions for designing osmotic dehydration and many other food processes. Among the unit operations, it could be found pumping, mixing/stirring, pasteurization, sterilization, evaporation and so on. These data are useful to understand how properties change when the conditions are altered during the processes. They also provide important information about momentum and heat transfer through the fluid. By analyzing dimensionless parameters, as Prandtl number, one phenomenon or other can be favored under specific conditions. The presence of accurate mathematical models results in greater agility and reliability in the execution of processes, especially for those operating in wide ranges of temperature and solute concentration.

In the present work we apply the cBΩ thermodynamic model to study the diffusion of Si in stishovite crystal at high pressure and in a wide temperature range. According to this model, the point defect activation Gibbs free energy is expressed as a function of the bulk properties of the material, i.e., gact = cBΩ, where B is the isothermal bulk modulus, Ω is the mean atomic volume, and c is a dimensionless constant. In this way, other important point defect parameters, such as the activation volume vact, the activation entropy sact, and the activation enthalpy hact may be estimated if the thermoelastic properties of the material are known over a wide temperature and pressure range. Our calculations are based on previously reported self-diffusion coefficients in stishovite single crystals measured at 14 GPa and at temperatures from 1400 to 1800 °C, in the [110] and [001] directions, by Shatskiy et al. (Am. Mineral. 2010, 95, 135–43). Furthermore, the EOS of stishovite, proposed by Wang et al. (J. Geophys. Res. 2012, 117, B06209) has been used for the accurate implementation of the cBΩ model. Our results suggest that the aforementioned point defect parameters exhibit considerable temperature dependence over the studied temperature range (1000–2000 °C). The estimated activation volumes (4.4–5.3 cm3/mol, in the range of 1400–1800 °C) are in agreement with reported experimental results. Our study confirms the potential of the cBΩ model for the theoretical investigation of diffusion processes in minerals, in order to overcome the experimental difficulties and the lack of experimental diffusion data in mantle conditions.