memory address Research Articles (Page 10)

Distance labeling approaches are widely adopted to speed up the shortest-distance query performance. Due to the explosive growth of data graphs, a single machine can hardly satisfy the requirements of both computational power and memory capacity, which causes an urgent need for efficient distributed methods. As the graph is distributed across different machines, it is inevitable to frequently exchange messages among different machines when deploying the existing centralized distance labeling methods on the distributed environment, thereby producing serious communication costs and weakening the scalability. To alleviate this problem, we design a distributed hop-based indexDH-Index, which is designed based on a newly proposed boundary graph structure and restricts the index-based hop number of each connected vertex pair within 4 hops. In addition, we propose a hierarchical algorithm to accelerate the index construction and reduce the communication cost. Furthermore, a bidirectional searching strategy is proposed to efficiently resolve the query tasks based on DH-Index. The comprehensive experimental results on eight real-world graphs demonstrate that DH-Index achieves up to 65.5× and 3 orders of magnitude speedup than the existing methods in indexing time and query performance respectively, and exhibits superior capabilities on memory space, communication cost, and scalability.

Existing learning-based dehazing algorithms struggle to deal with real world hazy images for lack of paired clean data. Moreover, most dehazing methods require significant computation and memory. To address the above problems, we propose a joint dual-teacher knowledge distillation and unsupervised fusion framework for single image dehazing in this paper. First, considering the complex degradation factors in real-world hazy images, two synthetic-to-real dehazing networks are explored to generate two preliminary dehazing results with the heterogeneous distillation strategy. Second, to get more qualified ground truth, an unsupervised adversarial fusion network is proposed to refine the preliminary outputs of teachers with unpaired clean images. In particular, the unpaired clean images are enhanced to deal with the dim artifacts. Furthermore, to alleviate the structure distortion in the unsupervised adversarial training, we constructed an intermediate image to constrain the output of the fusion network. Finally, considering the memory storage and computation overhead, an end-to-end lightweight student network is trained to learn the mapping from the original hazy image to the output of the fusion network. Experimental results demonstrate that the proposed method achieves state-of-the-art performance on real-world hazy images in terms of no-reference image quality assessment and the parameters.

Brain-inspired neuromorphic computing has attracted widespread attention owing to its ability to perform parallel and energy-efficient computation. However, the synaptic weight of amorphous/polycrystalline oxide based memristor usually exhibits large nonlinear behavior with high asymmetry, which aggravates the complexity of peripheral circuit system. Controllable growth of conductive filaments is highly demanded for achieving the highly linear conductance modulation. However, the stochastic behavior of the filament growth in commonly used amorphous/polycrystalline oxide memristor makes it very challenging. Here, the epitaxially grown Hf0.5Zr0.5O2-based memristor with the linearity and symmetry approaching ideal case is reported. A layer of Cu nanoparticles is inserted into epitaxially grown Hf0.5Zr0.5O2 film to form the grain boundaries due to the breaking of the epitaxial growth. By combining with the local electric field enhancement, the growth of filament is confined in the grain boundaries due to the fact that the diffusion of oxygen vacancy in crystalline lattice is more difficult than that in the grain boundaries. Furthermore, the decimal operation and high-accuracy neural network are demonstrated by utilizing the highly linear and multi-level conductance modulation capacity. This method opens an avenue to control the filament growth for the application of resistance random access memory (RRAM) and neuromorphic computing.

Internet of Things intrusion detection: Research and practice of NSENet and LSTM fusion models

GeoTaichi: A Taichi-powered high-performance numerical simulator for multiscale geophysical problems

End-to-End Translation Validation is the problem of verifying the executable code generated by a compiler against the corresponding input source code for a single compilation. This becomes particularly hard in the presence of dynamically-allocated local memory where addresses of local memory may be observed by the program. In the context of validating the translation of a C procedure to executable code, a validator needs to tackle constant-length local arrays, address-taken local variables, address-taken formal parameters, variable-length local arrays, procedure-call arguments (including variadic arguments), and the alloca () operator. We provide an execution model, a definition of refinement, and an algorithm to soundly convert a refinement check into first-order logic queries that an off-the-shelf SMT solver can handle efficiently. In our experiments, we perform blackbox translation validation of C procedures (with up to 100+ SLOC), involving these local memory allocation constructs, against their corresponding assembly implementations (with up to 200+ instructions) generated by an optimizing compiler with complex loop and vectorizing transformations.

A multi-layer stacked Dynamic Random Access Memory (DRAM) platform is introduced to address the memory wall issue. This platform features high-density vertical interconnects established between DRAM units for high-capacity memory and logic units for computation, utilizing Wafer-on-Wafer (WoW) hybrid bonding and mini Through-Silicon Via (TSV) technologies. This 3DIC architecture includes commercial DRAM, logic, and 3DIC manufacturing processes. Their design documents typically come from different foundries, presenting challenges for signal integrity design and analysis. This paper establishes a lumped circuit based on 3DIC physical structure and calculates all values of the lumped elements in the circuit model with the transmission line model. A Cross-Process Signal Integrity Analysis (CPSIA) method is introduced, which integrates three different manufacturing processes by modeling vertical stacking cells and connecting DRAM and logic netlists in one simulation environment. In combination with the dedicated buffer driving method, the CPSIA method is used to analyze 3DIC impacts. Simulation results show that the timing uncertainty introduced by 3DIC crosstalk ranges from 31 ps to 62 ps. This analysis result explains the stable slight variation in the maximum frequency observed in vertically stacked memory arrays from different DRAM layers in the physical testing results, demonstrating the effectiveness of this CPSIA method.

Score distillation for anomaly detection

An isolated symmetrical 2T2R cell enabling high precision and high density for RRAM-based in-memory computing

Magnetite–Polyaniline Nanocomposite for Non-Volatile Memory and Neuromorphic Computing Applications

The recent discovery of ferroelectricity in pure ZrO2 has drawn much attention, but the information storage and processing performances of ferroelectric ZrO2-based nonvolatile devices remain open for further exploration. Here, a ZrO2 (∼8 nm)-based ferroelectric capacitor using RuO2 oxide electrodes is fabricated, and the ferroelectric orthorhombic phase evolution under electric field cycling is studied. A ferroelectric remnant polarization (2Pr) of >30 μC/cm2, leakage current density of ∼2.79 × 10-8 A/cm2 at 1 MV/cm, and estimated polarization retention of >10 years are achieved. When the ferroelectric capacitor is connected with a transistor, a memory window of ∼0.8 V and eight distinct states can be obtained in such a ferroelectric field-effect transistor (FeFET). Through the conductance manipulation of the FeFET, a high object image recognition accuracy of ∼93.32% is achieved on the basis of the CIFAR-10 dataset in the convolutional neural network (CNN) simulation, which is close to the result of ∼94.20% obtained by floating-point-based CNN software. These results demonstrate the potential of ferroelectric ZrO2 devices for nonvolatile memory and artificial neural network computing.

Problem statement. Currently, the main efforts in the development of the general theory of extrapolation and its practical applications are aimed at predicting processes, moments of time and fields. At the same time, as a result of increased processing quality requirements, it is necessary to take into account the effect of various kinds of interference and noise. Therefore, most of the existing approaches to solving extrapolation problems rely to some extent on analytical methods. At the same time, the formulation of tasks mainly concerns processes and sequences, the changes of which are largely determined by random components. Due to the fact that the mathematical description of objects and the environment (or their probabilistic characteristics) is often unknown in advance, and it is not possible to determine them, an adaptive approach is typical for solving such problems. With an adaptive approach, some suboptimal solution is sought, obtained, for example, by using maximum likelihood or minimum average risk criteria. It is from this point of view that the problems of filtering, interpolation and extrapolation are often considered. The main focus is on the application of the basic principles of the theory of systems and adaptive Kalman filtering. It is assumed that the Gaussian approximation, a linear model of the system, as well as linear processing of input sequences are used. The optimal joint assessment of the parameters of the state model leads to a nonlinear filter structure, the implementation of which is associated with high requirements for performance and computer memory. Therefore, preference is usually given to suboptimal methods, on the basis of which simplified algorithms are formed that do not require large amounts of computer memory. Goal – development of adaptive algorithms for the functioning of multidimensional linear and nonlinear extrapolators implemented in the time and private domain by digital signal processing (DSP) methods, as well as analysis of the quality characteristics of their functioning and application features. Algorithms for the functioning of multidimensional extrapolators are proposed using examples of the development of adaptive algorithms using the method of linear prediction "forward" and "backward" and their ombinations. Algorithms for the operation of nonlinear "forward" extrapolators based on Kolmogorov-Gabor series in the time and frequency domains have been developed. Adaptive algorithms of nonlinear extrapolators based on the use of partitioning methods for calculating convolution are proposed. It is shown that algorithms for the functioning of nonlinear extrapolators based on the use of partitioning methods for calculating convolution are more efficient than linear shift-invariant systems and at the same time require less memory. The features of creating adaptive filtering, interpolation and extrapolation algorithms using neurocomputers built on the basis of existing microchips of domestic and foreign production are considered.

In this paper, a new high-performance and memory-efficient contact and road model is developed. Specifically, the road is modeled as a rectangular structured grid of deformable springs in the vertical direction, thus enabling fast execution. The new road model stands out due to its ability to handle large road scenarios by allocating computer memory dynamically for each spring, resulting in efficient memory utilization. Furthermore, each spring represents a small road patch that entails various information, such as the soil elevation, the soil properties, and the soil compaction, allowing for complicated simulations incorporating spatially varying soil properties and phenomena related to the multi-pass effect. In addition, using the new contact model, complex terrain geometries are handled in a computationally efficient way by approximating locally the irregular road profile with a suitable equivalent plane. For this, two different strategies are proposed, namely the radial basis function (RBF) interpolation method and the 3D enveloping contact model. Finally, the proposed techniques are implemented in Altair MotionSolve, a comprehensive multi-body simulation software for complex mechanical systems. In particular, a single-wheel test bed is initially examined followed by a four-wheeled rover model and the next-generation NATO reference mobility model (NG-NRMM). In all cases, the proposed model is validated by using available experimental data. Lastly, a case involving both wheeled and tracked vehicles is also examined by using a shared road model.

Compute-in-memory (CIM) has recently emerged as a promising design paradigm to accelerate deep neural network (DNN) processing. Continuously better energy and area efficiency at the macrolevel had been reported through many testchips over the last few years. However, in those macro design-oriented studies, accelerator-level considerations, such as memory accesses and processing of entire DNN workloads have not been investigated in-depth. In this article, we aim to fill this gap starting with the characteristics of our latest CIM macro fabricated with cutting-edge FinFET CMOS technology at 4-nm node. We then study, through an accelerator simulator developed in-house, three key items that would determine the efficiency of our CIM macro in the accelerator context while running MLPerf Mobile suite: 1) dataflow optimization; 2) optimal selection of CIM macro dimensions to further improve macro utilization; and 3) optimal combination of multiple CIM macros. Although there is typically a stark contrast between macro-level peak and accelerator-level average throughput and energy efficiency, the aforementioned optimizations are shown to improve the macro utilization by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.04\times $ </tex-math></inline-formula> and reduce the energy-delay product (EDP) to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.34\times $ </tex-math></inline-formula> compared to the original macro on MLPerf Mobile inference workloads. While we exploit a digital CIM macro in this study, the findings and proposed methods remain valid for other types of CIM (such as analog CIM and analog–digital–hybrid CIM) as well.

Lightweight neural network designed for detecting anomalies in Electrocardiogram (ECG) and Electroencephalogram (EEG) signals at IoT edge sensors. By optimizing neural network architectures, we achieve high accuracy in anomaly detection while minimizing computational demands and memory usage. Experimental results validate the effectiveness of our approach in real-world scenarios, promising improved healthcare monitoring with early detection of abnormal ECG and EEG patterns at the edge.

Two-dimensional (2D) materials have received significant attention for their potential use in next-generation electronics, particularly in nonvolatile memory and neuromorphic computing. This is due to their simple metal-insulator-metal (MIM) sandwiched structure, excellent switching performance, high-density capability, and low power consumption. In this work, using comprehensive material simulations and device modeling, the thinnest monolayer hexagonal boron nitride (h-BN) atomristor is studied by using a MIM configuration with Ta electrodes. Our first-principles calculations predicted both a high resistance state (HRS) and a low resistance state (LRS) in this device. We observed that the presence of van der Waals (vdW) gaps between the Ta electrodes and monolayer h-BN with a boron vacancy (VB) contributes to the HRS. The combination of metal electrode contact and the adsorption of Ta atoms onto a single VB defect (TaB) can alter the interface barrier between the electrode and dielectric layer, as well as create band gap states within the band gap of monolayer h-BN. These band gap states can shorten the effective tunneling path for electron transport from the left electrode to the right electrode, resulting in an increase in the current transmission coefficient of the LRS. This resistive switching mechanism in monolayer h-BN atomristors can serve as a theoretical reference for device design and optimization, making them promising for the development of atomristor technology with ultra-high integration density and ultra-low power consumption.

DiffGAN: An adversarial diffusion model with local transformer for MRI reconstruction

Abstract Many simulation methods have been developed for P-waves in vertically transversely isotropic (VTI) media. These methods are based on the acoustic approximation. The finite-difference frequency-domain (FDFD) method stands out for its ability to simulate multi-shot or narrowband seismic data. It has no temporal dispersion, facilitates attenuation modelling, and enables parallelization. The optimal FDFD method is commonly used to simulate the acoustic VTI wave equation, but it applies the same FDFD coefficients for different frequencies and model velocities, which cannot fully minimize the numerical dispersion error. To enhance its accuracy and effectiveness, we develop an adaptive-coefficient FDFD method specifically for the acoustic VTI wave equation. The FDFD coefficients depend on two factors: the number of wavelengths in each grid and the Thomsen parameters. The dispersion analysis reveals that the proposed FDFD method can achieve a reduction in the necessary number of grid points from 4 to 2.5 compared to the optimal 9-point average derivative method (ADM), while maintaining a maximum dispersion error of 1%. From three numerical examples, the developed FDFD method can obtain more accurate wavefield results than the ADM optimal FDFD method, while taking comparable computational time and memory.

Deep learning has recently gained significant prominence in various real-world applications such as image recognition, natural language processing, and autonomous vehicles. While deep neural networks appear to have different architectures, the main operations within these models are matrix-vector multiplications (MVM). Compute-in-memory (CIM) architectures are promising solutions for accelerating the massive MVM operations by alleviating the frequent data movement issue in traditional processors. Analog CIM macros leverage current-accumulating or charge-sharing mechanisms to perform multiply-and-add (MAC) computations. Even though they can achieve high throughput and efficiency, the computing accuracy is sacrificed due to the analog nonidealities. To ensure precise MAC calculations, it is crucial to analyze the sources of nonidealities and identify their impacts, along with corresponding solutions. In this paper, comprehensive linearity analysis and dedicated calibration methods for charge domain static-random access memory (SRAM) based in-memory computing circuits are proposed. We analyze nonidealities from three areas based on the mechanism of charge domain computing: charge injection effect, temperature variations, and ADC reference voltage mismatch. By designing a 256×256 CIM macro and conducting investigations via post-layout simulation, we conclude that these nonidealities don't deteriorate the computing linearity, but only cause the scaling and bias drift. To mitigate the scaling and bias drift identified, we propose three calibration methods ranging from the circuit level to the algorithm level, all of which exhibit promising results. The comprehensive analysis and calibration methods can assist in designing CIM macros with more accurate MAC computations, thereby supporting more robust deep learning inference.

&lt;p&gt;Deep convolutional neural networks have achieved good performance in the application of computer vision, but there are also problems, such as a large amount of computation, time consuming, and high memory demand. In this paper, a depthwise separable convolution filter pruning method based on PCA is proposed. First, this paper uses depthwise separable convolution to replace the conventional convolution in ResNet to reduce the number of parameters and the amount of computation in the network. The specific operation process is to first use depthwise convolution to separate the spatial dimension to increase the network width and expand the range of feature extraction, and then use pointwise convolution to reduce the computational complexity of conventional convolution operation. Second, PCA is used to distinguish stacked similar filters and perform dimensionality reduction, which not only alleviates the dimensional disaster, but also achieves compression of data and minimizes information loss. Experimental results show that this method can significantly improve the calculation speed and accuracy of the deep convolutional neural network model, and further compress the model size. On the clinical Color Perception Test Chart, this method reduced the amount of model parameters and MACs on ResNet by about 91% while maintaining the test accuracy at about 95%. With almost no loss of accuracy, this method greatly shortened the running time of the model.&lt;/p&gt; &lt;p&gt;&amp;nbsp;&lt;/p&gt;