A low-voltage CMOS bandgap reference

Two original superior-order curvature-corrected voltage references was presented. In order to improve the temperature behavior of the circuits, double differential structures was used, implementing the linear and the superior-order curvature corrections. An original CTAT (complementary to absolute temperature) voltage generator was proposed, using exclusively MOS transistors biased in weak inversion for a low power operation of the voltage reference. The superior-order curvature-correction was implemented by taking the difference between two gate-source voltages of subthreshold-operated MOS transistors, biased at drain currents having different temperature dependencies: PTAT (proportional to absolute temperature) and PTAT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The SPICE simulations confirm the theoretical estimated results, showing temperature coefficients under 11 ppm/K for an extended input range 173K < T < 423K and for a supply voltage of 2.5V and a current consumption of about 1muA

In this paper, a Bandgap reference (BGR) with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is presented. On the basis of first-order temperature-compensated BGR, a complementary curvature-compensation technique (CCCT) is realized by using the saturation region current characteristics of PMOS transistors with proportional to absolute temperature (PTAT) bias voltage. Besides, in addition to the effect of cascode structure and the isolation of the current amplifier, the PSRR of proposed BGR is further improved by adopting self-bias power supply with feedback. The presented BGR is implemented in a standard 0.35 μm BCD process. The post-simulation results show that the TC of the BGR is 4.740 ppm/∘C with a 2.50V average output voltage, and the PSRR is up to -78.5dB.

SummaryVoltage references are typically designed by combining a complimentary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) voltage references. However, in contrast to conventional voltage references, the proposed circuit generates a voltage reference by subtracting two PTAT voltages, resulting in an extremely low process‐dependent voltage reference. A novel subtractor is also proposed for subtracting PTAT voltages, which is used to generate the reference voltage. The temperature coefficient of the proposed voltage reference is further improved using a novel PTAT slope compensation technique. The proposed voltage reference is a MOS‐only ultra‐low power circuit that works with sub‐bandgap supply voltage. Simulation results using UMC 0.18 m technology MOSFETs show that the proposed circuit has a line sensitivity of 0.5%/V, a temperature coefficient of 21.37 ppm/° C, a power consumption of 15.6 nW, and an output voltage variation of only 0.22% due to process variations.

The design of a novel all-MOS low-power bandgap reference in an open loop topology is described. A forward biased p-n junction with complementary to absolute temperature coefficient (CTAT) is combined with a cascade of Self-Cascode MOSFET (SCM) structures providing a proportional to absolute temperature (PTAT) voltage to create the bandgap voltage reference. Using the Advanced Compact MOSFET (ACM) model the design of the cascade of SCMs is fairly straightforward. The design methodology is based on the concept of inversion level using current as the main variable. At room temperature, the nominal output reference voltage is 1.32V, and the total current consumption is 65nA (20nA for the current generator and 45nA for the bandgap reference itself). The circuit has been integrated in a 0.18μm standard CMOS process, and occupies an area of 0.01mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Power supply sensitivity is +/-0.7% from 1.55V (minimum operation voltage) to 3.3V After trimming, temperature compensation is attained with a total bandgap voltage variation of 0.6% from -40°C to 125°C, equivalent to 36ppm/°C.

A new 1-V high precision second-order compensated bandgap voltage reference (BGR) is presented in this paper. It utilizes a conventional first-order current-mode BGR to balance the Complementary to Absolute Temperature (CTAT) voltage component of a forward biased BJT with a Proportional to Absolute Temperature (PTAT) voltage. The residual second-order error is corrected by the difference of two CTAT voltages with different non-linear terms through control of the collector currents of BJTs. All the circuits are designed using a standard 0.18μm CMOS process. The post-simulation results show that the maximum temperature coefficient (TC) of the proposed BGR at 1 V power supply is 2.5 ppm/°C over temperature range of −40 °C to 125 °C. The line regulation is 0.23 mV/V over supply range of 0.9 V–2 V. The low frequency power supply rejection of the circuit is −53 dB at 1 V power supply.

As a way of generating high precision voltage reference, bandgap voltage reference is a very important module in the analog integrated circuits and mixed-signal integrated circuits to provide a temperature and power supply insensitive output voltage. The bandgap voltage reference circuit presented here in this paper is an improved conventional bandgap reference circuit. A self-biasing structure and a current mirror structure are used. It can get the PTAT(Proportional to absolute temperature) current, and then get the voltage that is proportional to temperature. The output voltage of an Op-amp is adopted as the op-amp's offset voltage to make the power consumption lower, and high value polysilicon resistors of low temperature coefficient are used to reduce the impact of resistor drift on the circuit. The errors caused by current mismatch is eliminated in the improved CMOS bandgap, and at the same time the DC PSRR (power supply rejection ratio) is increased because of the increase of the feedback factor.

A complementary metal oxide semiconductor (CMOS) voltage reference with a logarithmic curvature-correction will be presented. The first-order compensation is realised using an original offset voltage follower (OVF) block as a proportional to absolute temperature (PTAT) voltage generator, with the advantages of reducing the silicon area and of increasing accuracy by replacing matched resistors with matched transistors. The new logarithmic curvature-correction technique will be implemented using an asymmetric differential amplifier (ADA) block for compensating the logarithmic temperature dependent term from the first-order compensated voltage reference. In order to increase the circuit accuracy, an original temperature-dependent current generator will be designed for computing the exact type of the implemented curvature-correction. The relatively small complexity of the current squarer allows an important increasing of the circuit accuracy that could be achieved by increasing the current generator complexity. As a result of operating most of the MOS transistors in weak inversion, the original proposed voltage reference could be valuable for low-power applications. The circuit is implemented in 0.35 μm CMOS technology and consumes only 60μA for t = 25°C, being supplied at the minimal supply voltage V DD = 1.75V. The temperature coefficient of the reference voltage is 8.7 ppm/°C, while the line sensitivity is 0.75 mV/V for a supply voltage between 1.75 V and 7 V.

This work presents a technique for temperature compensation of Silicon Piezoresistive Pressure Sensors (PPSs) based on a Proportional to Absolute Temperature (PTAT) Bias-Current circuit (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PTAT</sub> ). This technique is applied on the Multi-Stage Current-Mode Piezoresistive Pressure Sensor based on a 3-Terminal Pressure Sensor (3-TPS) that recently has been being studied as an alternative to the conventional Wheatstone Bridge and Transversal PPSs. The experimental maximum differential sensitivity of the sensor output current relative change, for 500μA constant bias current, amounts to 0.64%/psi @20°C. The sensor output current sensitivity temperature dependence, without compensation, amounts to 0.06μA/°C over a range from 20°C to 80°C. After compensation, the experimental results show a maximum deviation of 1.5% within the full scale output span. This efficient compensation was achieved using a PTAT bias current whose Temperature Coefficient (TC) amounts to 0.06μA/°C.

High linear voltage reference circuitry is designed and implemented in TSMC 0.13 mum and 0.18 mum CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in conventional PTAT (proportional to absolute temperature) circuits. However, such solutions often have linearity problem in high temperature region due to the current leaking devices in modern deep sub micron and nano-scale CMOS technology. The proposed circuit utilized temperature complementation technique on two voltage references, PTAT and IOAT (independent of absolute temperature) references, to enhance the linearity and produce a more stable lOAT voltage reference. Base on the simulation results, the R-squares of both circuitries are better than 0.999 in a considerable wider temperature range from -55degC to 170degC. Thus, a fully integrated temperature sensor with wider temperature range is designed and easily to integrate to modern system-on-chip designs with minimal efforts.

Ultra-low-power (ULP) sensor technologies for the future internet of things have presented challenges in ULP implementation of reference circuits while keeping traditional requirements of stable performance. For voltage reference circuits, as an essential block in SoCs to generate various internal supply voltages, the bandgap voltage-reference (BGVR) scheme has been widely used since it provides a well-defined value with strong immunity to process/voltage/temperature variations. Nanowatt-consuming BGVR circuits have been recently proposed using a capacitor network [4] and a leakage-based proportional-to-absolute-temperature (PTAT) circuit [5]. On the other hand, the current reference circuit that is required to set internal bias current still presents difficulties in achieving both stable performance and ULP consumption. The general approach to building a current reference is to use a BGVR with additional resistors for V-to-I conversion. Though it can provide a well-defined stable current reference, it also requires excessively large resistance for ULP consumption. Another approach is a CMOS-based current reference circuit that tries to make the exponential term in the subthreshold current equation constant or temperature-independent, hence reducing process and temperature dependencies. While CMOS reference circuits have achieved ULP implementations, the current is still determined by a number of process and design parameters, resulting in large sensitivity to process variations. This paper presents a sub-10nW bandgap-reference (BGR) circuit that implements both voltage and current references in one circuit. The BGR circuit is implemented with a 0.18µm CMOS process and generates voltage and a current references of 1.238V and 6.64nA while consuming 9.3nW. The voltage and current references show standard deviations of 0.43% and 1.19% with temperature coefficients of 26ppm/°C and 283ppm/°C, respectively.

In this paper, we describe a sub 1 V bandgap voltage reference (BGR) in CMOS technology. The proposed topology is based on a current-mode bandgap structure that uses a transimpedance amplifier. A feedback control in the bandgap produces temperature compensation between a PTAT (Proportional To Absolute Temperature) current and a CTAT (Conversely proportional To Absolute Temperature) current derived from a nMOS threshold voltage. The proposed circuit was verified by extensive circuit simulations, using models, of a standard 0.18 /spl mu/m CMOS technology, with a power supply of 1 V. The variations of the output voltage over a typical temperature range (0 to 100/spl deg/C) were simulated to be less than 1%.

A new sub-1-ppm/°C curvature-compensated bandgap voltage reference (BGR) is presented in this paper. The Complementary to Absolute Temperature (CTAT) voltage component of a forward biased BJT is first well balanced with a Proportional to Absolute Temperature (PTAT) voltage, leaving only a high order logarithmic error with the form of TlnT. This residual non-linear error is corrected by a difference of two CTAT voltages with different non-linear terms through controlling the collector currents of BJTs, which can achieve an ideal non-linear compensation. All the circuits are designed in a standard 0.35-pm CMOS process. The post-simulation results show the proposed BGR achieves temperature coefficient (TC) of 0.7 ppm/°C over temperature range of −40 °C to 125 °C and power supply rejection (PSR) of −104 dB at 3.6 V power supply. The line regulation of the output reference voltage is 0.1 mV/V in the supply range of 24.5 V. The maximum dissipating current from the supply is 25.45 μA.

To improve the performance of typical first-order bandgap references, a high precision bandgap voltage reference with second-order curvature correction is proposed in this paper. Utilizing a temperature independent current (has nothing to do with the temperature of first order) and a proportional to absolute temperature (PTAT) current, a proportional to the square of temperature (PTAT2) current can be generated, which can be further used to compensate the second-order term in the Taylor-series expansion of the diode voltage, and the precision of the voltage reference is improved. The design was verified in a Bi-CMOS process, and simulation results showed that the temperature of the designed voltage reference was 10 ppm/°C at the temperature range from −45°C to 125°C and the consumed current was 7 µA at 5V supply voltage.

This brief presents a low-noise, low-offset bandgap reference for the biomedical electronic systems application. In order to reduce the low-frequency noise and increase the accuracy, the low-frequency noise/offset elimination technique based on current-mode bandgap reference (BGR) is proposed. Besides, this BGR utilizes a proportional to absolute temperature (PTAT) resistor feedback technique to minimize the low-frequency noise and offset from the current mirror. The proposed BGR is implemented in a 180 nm deep n-well CMOS process occupying an active area of 0.0725 mm2. The measured results indicate that the BGR outputs 0.6 V voltage and consumes 69 μA current under 1.2 V supply voltage. It can achieve 3.5 μV(rms) noise from 0.1 to 10 Hz and a 0.21% DC accuracy.

Presents a new all-MOS circuit technique for very-low-voltage proportional-to-absolute temperature (PTAT) references. Optimization of supply scaling below the sum of threshold voltages is based on log companding and implemented by operating the MOSFET in weak inversion. The key design equations for current (/spl mu/A) and voltage (sub-100 mV) references and their standard deviations (around 5%) are derived by analytical analysis. Two sub-1-V sub-5-/spl mu/W integrated PTAT references are presented and exhaustively tested for 1.2- and 0.35-/spl mu/m very large scale integration technologies. Both designs report good agreement between analytical, simulated, and experimental data, exhibiting PSRR(DC)+>60 dB. Hence, the resulting PTAT circuits are suitable for very-low-voltage system-on-a-chip applications in digital CMOS technologies.