An Innovations Approach to Viterbi Decoding of Convolutional Codes

Convolutional coding and Viterbi decoding, along with binary phase-shift keyed modulation, is presented as an efficient system for reliable communication on power limited satellite and space channels. Performance results, obtained theoretically and through computer simulation, are given for optimum short constraint length codes for a range of code constraint lengths and code rates. System efficiency is compared for hard receiver quantization and 4 and 8 level soft quantization. The effects on performance of varying of certain parameters relevant to decoder complexity and cost is examined. Quantitative performance degradation due to imperfect carrier phase coherence is evaluated and compared to that of an uncoded system. As an example of decoder performance versus complexity, a recently implemented 2-Mbit/s constraint length 7 Viterbi decoder is discussed. Finally a comparison is made between Viterbi and sequential decoding in terms of suitability to various system requirements.

In 1995, Best etal. published a formula for the exact bit error probability for Viterbi decoding of the rate R =1/2, memory m = 1 (two-state) convolutional encoder with generator matrix G(D) = (1 1 + D) when used to communicate over the binary symmetric channel. Their formula was later extended to the rate R = 1/2, memory m = 2 (four-state) convolutional encoder with generator matrix G(D) = (1 + D2 1 + D + D2) by Lentmaier et al. In this paper, a different approach to derive the exact bit error probability is described. A general recurrent matrix equation, connecting the average information weight at the current and previous states of a trellis section of the Viterbi decoder, is derived and solved. The general solution of this matrix equation yields a closed-form expression for the exact bit error probability. As special cases, the expressions obtained by Best et al. for the two-state encoder and by Lentmaier et al. for a four-state encoder are used. The closed-form expression derived in this paper is evaluated for various realizations of encoders, including rate R = 1/2 and R = 2/3 encoders, of as many as 16 states. Moreover, it is shown that it is straightforward to extend the approach to communication over the quantized additive white Gaussian noise channel.

In this paper, we propose a parallel block-based Viterbi decoder (PBVD) on the graphic processing unit (GPU) platform for the decoding of convolutional codes. The decoding procedure is simplified and parallelized, and the characteristic of the trellis is exploited to reduce the metric computation. Based on the compute unified device architecture (CUDA), two kernels with different parallelism are designed to map two decoding phases. Moreover, the optimal design of data structures for several kinds of intermediate information are presented, to improve the efficiency of internal memory transactions. Experimental results demonstrate that the proposed decoder achieves high throughput of 598Mbps on NVIDIA GTX580 and 1802Mbps on GTX980 for the 64-state convolutional code, which are 1.5 times speedup compared to the existing fastest works on GPUs.

In this work, anew approach of designing channel codes for partial band interference channels based on hidden puncturing is introduced that is not requiring explicit estimation of the interferer. We investigate the performance of specially designed rate 1/2 Viterbi decoding of convolutional codes and rate 1/2 turbo codes in an example scenario with partial band FM interference. We show by means of simulations that for Gaussian as well as for a variety of multipath fading profiles, a significant channel coding gain compared to a conventional system can be achieved. Thereby the performance of optimal combining, that is requiring optimal estimation of the interferer, can be approached very closely in various scenarios.

Maximum likelihood decoding of convolutional codes by Viterbi decoding method is an effective error correcting technique. However, little study on Viterbi decoding of high rate codes has been done since the number of paths entering each trellis state increases as the code rate increases. This paper presents a new maximum likelihood decoding of convolutional codes of rate (n ‐ 1)/n using a trellis. the trellis is drawn according to the state transitions of the syndrome former of the code, and has only one or two paths entering each state rather than 2n‐1 paths as in the case of conventional trellises. Thus, we can replace the 2n‐1‐ary comparisons at each state needed in the conventional Viterbi decoding for the code of rate (n ‐ 1)/n by binary comparisons. the implementation of maximum likelihood decoders for high rate convolutional codes is simplified greatly by this approach. Moreover, this decoding method shows the same performance as that of conventional Viterbi decoding method from the viewpoint of selecting the maximum likelihood code sequence.

An erasure-free sequential decoding algorithm for trellis codes, called the buffer looking algorithm (BLA), is introduced. Several versions of the algorithm can be obtained by choosing certain parameters and selecting a resynchronization scheme. These can be categorized as block decoding or continuous decoding, depending on the resynchronization scheme. Block decoding is guaranteed to resynchronize at the beginning of each block, but suffers some rate loss when the block length is relatively short. The performance of a typical block decoding scheme is analyzed, and we show that significant coding gains over Viterbi decoding can be achieved with much less computational effort. A resynchronization scheme is proposed for continuous sequential decoding. It is shown by analysis and simulation that continuous sequential decoding using this scheme has a high probability of resynchronizing successfully. This new resynchronization scheme solves the rate loss problem resulting from block decoding. The channel cutoff rate, demodulator quantization, and the tail's influence on performance are also discussed. Although this paper considers only the decoding of trellis codes, the algorithm can also be applied to the decoding of convolutional codes.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

This paper relates to the application method of channel state information (CSI) to the Viterbi (maximum likelihood) decoder in the digital terrestrial television broadcasting system. The proposed Viterbi decoder uses the CSI derived from the pilots inserted in the transmitter of the COFDM (coded orthogonal frequency division multiplexing) system. The CSI is calculated by interpolation using the pilots in the receiver. The active real (I) and imaginary (Q) data after equalization are transferred to the branch metric calculation block that decides the euclidean distance for soft decision decoding and also the estimated CSI values are transferred to the same block. After calculating the euclidean distance for the soft decision decoding, the euclidean distance of the branch metric is multiplied by CSI. To do so, new branch metric values that consider each carrier state information are obtained. We simulated this method in Rayleigh fading defined in the ETSI standard. From the simulation, this method has better performance of about 0.15 dB to 0.7 dB and 2.2 dB to 2.9 dB in the Rayleigh channel than that of conventional soft decision Viterbi decoding with or without a bit interleaver where the constellation is QPSK, l6-QAM and 64-QAM.

A Viterbi decoding algorithm with a scarce-state transition-type circuit configuration, namely the probability selecting states (PSS) mode decoder, is presented. The algorithm has reduced complexity compared to a conventional Viterbi decoder. It is shown that this method has three advantages over the general Viterbi algorithm: it is suitable to the quick look-in code, it applies the optimum decoding in a PSS-type decoder, and it makes full use of the likelihood concentration property. The bit-error-rate (BER) performance of a r=1/2, k=7 (147,135) code and PSS-type Viterbi decoder approximates the optimum performance of the standard Viterbi decoder and reduces the hardware of the conventional Viterbi decoder to about half.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The author provides an overview of various key features of De Bruijn graph-based VLSI architectures. The advantages of De Bruijn architectures over such other architectures as cube and shuffle-exchange are discussed. Important differences between De Bruijn interconnects and others are also described. The evolution of the De Bruijn interconnect is described. The FFT architecture and the Viterbi decoder for convolutional codes are examined in detail. The issues of routing and fault tolerance are addressed. >

A parallelisation algorithm of decoding convolutional codes with the Viterbi algorithm is presented. The architecture of parallel decoding analysed here suits the VLSI realisation very well and allows high-speed decoding.

In this paper, we show that Scarce State Transition (SST) Viterbi decoding is equivalent to syndrome decoding by transforming the code trellis module for the main decoder in an SST Viterbi de- coder to a syndrom6 trellis module.

In this study, a power-efficient very large-scale integration (VLSI) implementation for the convolutional code decoder is presented. Based on the state transparent convolutional code definition, the receiving codewords are classified into non-erroneous and erroneous segments separately. Different from the conventional Viterbi decoder (VD), the authors use a low-complexity decoder, denoted as bit reverse decoder, to recover the non-erroneous segments using reverse operation with a little power consumption and present the segment-based VD to decode the erroneous codeword segments. Then, the clock-gating technique is employed to switch between segment-based VD and bit reverse decoder for power saving. To further reduce the power consumption, the authors group registers into several segments in the survivor memory unit of the segment-based VD and also apply clock gating to each segment individually. According to the number of consecutive erroneous codeword segments, the corresponding numbers of register segments in the survivor memory unit are enabled and other register segments are clock-gated to reduce the switching activities. Besides, our design determines the start and terminal states of the survivor path to obtain correct results of erroneous segments without bit-error rate degradation. As compared with other decoders, our design requires less power without decreasing the decoding performance.

The authors propose a novel control channel quality improvement scheme for satellite communication systems using a majority decision method over convolutional coding and Viterbi decoding channels. To improve majority decision performance, which is degraded by burst errors due to Viterbi decoding in conventional serial transmission methods, a parallel transmission method is proposed. The performance of the parallel and serial transmission methods has been analyzed, and experimenta have been carried out using rate 1/2 convolutional encoding and Viterbi decoding (constraint length 4 and 7). It is shown that the parallel transmission method has about 10/sup 10/ times lower block error performance at P/sub e/=1*10/sup -4/ than the conventional method. >

When a scarce state transition (SST) Viterbi decoder is used to decode general nonsystematic convolutional codes (not included among quick look‐in (QLI) codes), metrics based on the maximum a posteriori probability (MAP) estimation method must be computed in order for the main decoder to operate under the criterion of minimizing the decoding error probability. In this case, however, it becomes necessary to extend the original code trellis structure by introducing augmented trellis states in order to incorporate the newly induced correlation among the apparent information sequence.This paper shows that the extended trellis degenerates into the original one as the channel error probability q approaches one‐half. By performing an equivalent transformation of metrics, it is shown also that the branch metrics derived based on the MAP estimation method converge to those computed using the conventional one as q approaches one‐half.

Tighter upper bounds on the error event and the bit error probabilities, respectively, for maximum-likelihood decoding of binary convolutional codes on the binary symmetric channel are derived from upper bounds previously published by Viterbi [1]. The measured bit error rate <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P_b</tex> for a constraint length 3 decoder has been plotted versus the channel transition probability <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</tex> and shows close agreement with the improved bound on the bit error probability.