Design Automation Technique of Silicon Bandgap Voltage Reference

In this paper, a high PSRR bandgap voltage reference (BGR) is designed for DC-DC converter by adopting pre-regulator technique. The designed BGR is analyzed and simulated in CSMC 0.5μm CMOS mixed signal process. When temperature is in the range from -30°C to 75°C, the temperature coefficient of the BGR output voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ref</sub> is only 19ppm/°C. V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ref</sub> has only deviation of 0.29mV when power supply voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> changes from 2.5V to 9V. By adopting pre-regulator technique, the PSRR of the designed BGR output voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ref</sub> at 10Hz, 100Hz, 1kHz, 10kHz and 100kHz achieves -98.41dB, -98.38dB, -96.28dB, -78.24dB and -43.39dB respectively.

In order to meet the market demand for wide temperature range and high precision bandgap voltage reference, this paper designs a bandgap reference with wide temperature range and low temperature coefficient. In this paper, the basic implementation principle of the bandgap reference is analyzed.On the basis of the traditional bandgap reference circuit structure,this design adds a trimming network and a temperature compensation network. A new Gaussian bell curve compensation technique is adopted to compensate the low temperature section, and the normal temperature section and the high temperature section respectively. Compared with the existing compensation technology, the versatility and the compensation effect is better. The designed circuit is designed and manufactured based on the Huahong HHNECGE0.35um process. The results show that the output voltage is 2.5V at 2.7V supply voltage and temperature range of -40-125°C.at typical process angle ,the temperature coefficient is 0.54618 PPm/°C,and is within 1PPm/°C at other process angles.

The reference voltage is a core part of RFID tags, its performance directly determines the whole chip's life and performance. The temperature coefficient is one of the important performances of the reference voltage source and the high-order temperature compensation is an effective method to reduce the temperature coefficient of the reference source. A low temperature coefficient bandgap reference is designed based on the standard 65nm CMOS process, and the low-supply voltage operation with bandgap reference circuit with current mode structure. The designed CMOS bandgap voltage reference is in the range of -20°C to 100°C with temperature coefficient of 9.6 ppm/°C and provides a good Power Supply Rejection Ratio(PSRR) of 79dB in the low frequency. The results of simulation show that the design improve the performance of the bandgap reference voltage source effectively.

ABSTRACTA bulk-isolated curvature-compensated bandgap voltage reference (BGR) compatible with triple-well CMOS technologies is presented in this paper. Verification results of the proposed BGR implemented in a 0.35-µm 3.3-V triple-well CMOS technology demonstrate that the BGR achieves a reference voltage of 220.4 mV with an average temperature coefficient (TC) of 3.7 ppm/°C in the −40 to 130°C range with 8-bit trimming. The measured current consumption and power supply rejection of the circuit are 33.15 µA and −69.51 dB at 100 Hz, respectively (VDD = 3.3 V). The circuit is capable of operating with supply voltages down to 2 V and its line regulation is 0.16%/V over a voltage range from 2 to 3.6 V. The root mean square output noise voltage in the 0.1–10 Hz frequency range is 2.54 µV. Moreover, measurement results show that the substrate noise sensitivity at the BGR output improved more than 30 dB for frequencies up to 50 kHz, thanks to the employed block bulk isolation strategy, although the effective improvement is expected to be more than 75 dB without the coupling from the electrostatic discharge diode in the I/O pad.

A novel current reference with low temperature and supply sensitivity and without any external component has been developed in a 0.25 /spl mu/m mixed-mode process. The circuit is based on a bandgap reference (BGR) voltage and a CMOS circuit similar to a beta multiplier. An NMOS transistor in triode region has been used in place of a resistor in conventional beta multiplier to achieve a current which has a negative temperature coefficient and only oxide thickness dependent. The BGR voltage has a positive temperature coefficient to cancel the negative temperature coefficient of the beta multiplier. The simulation results using Bsim3v3 model show max-to-min fluctuation of less than 1% over a temperature range of -20/spl deg/C to +100/spl deg/C and a supply voltage range of 1.4 V to 3 V with /spl plusmn/30% tolerance for all of the used on- chip resistors. The maximum current variation is slightly less than the oxide thickness variation in the process corners.

This article presents a low-power bandgap reference (BGR) featuring high power supply rejection ratio (PSRR) and fast start-up capability, operating across a wide supply voltage range of 1.3–5 V. A novel prebiased pulse current injection technique is proposed in the start-up circuit, achieving a 1% settling time of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$50~\mu $</tex-math> </inline-formula>s and a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$25\times $</tex-math> </inline-formula> speed gain during start-up. To enhance supply noise immunity, the proposed BGR employs a preregulated (PR)-based amplifier that effectively decouples the reference voltage from supply voltage fluctuations. Fabricated in a 0.18-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m BCD process, the proposed reference occupies an active area of 0.0394 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Under a 5 V supply, the circuit generates a 1.2 V reference voltage while consuming only 48 nA quiescent current. Operating down to a minimum supply voltage of 1.3 V, it maintains a low power consumption of 57.2 nW at room temperature. The reference exhibits an average temperature coefficient (TC) of 5.95 ppm/°C across a wide temperature range (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$- 40~^{\circ }$</tex-math> </inline-formula>C to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$125~^{\circ }$</tex-math> </inline-formula>C) and achieves an outstanding line sensitivity (LS) of 0.00308%/V over the 1.3–5 V supply range. Furthermore, the measured PSRR reaches −85 dB at 100 Hz.

A design of a low voltage bandgap reference (BGR), for SOC application with high accuracy, is described and the chip layout is presented. To compensate the error caused by the current-mirror mismatch, the chopper modulator is used in the BGR to decrease the offset of the opamp. The design features a reference voltage of 0.256V/spl sim/0.768V with supply voltage range from 1 V to 1.5 V and temperature range from -20 /spl deg/C to 60 /spl deg/C. The maximum supply current is 4 /spl mu/A and the area of layout is 0.3 /spl times/ 0.4 mm/sup 2/ with a standard 0.25 /spl mu/m 2P5M n-well CMOS process.

The design of CMOS bandgap voltage references focusing on high accuracy and low temperature coefficient methodologies is discussed in this paper. Several solutions of total bandgap voltage reference error minimization are considered. As a summary it is proposed bandgap voltage reference with output voltage accuracy 1.2V ± 0.08% in temperature range -40...125°C.

A circuit for generating reference voltages for an A/D converter is presented. The circuit consisting of a bandgap reference and a driver circuit capable of operating on sub 1-volt supply voltages. The circuit is designed using a standard 0.5 /spl mu/m CMOS technology. Simulations show maximum 0.24% variation in the generated reference voltage over a temperature range from -20/spl deg/C to 100/spl deg/C and a supply voltage range from 0.95 V to 1.50 V. The circuit is capable of driving a 2 pF switched capacitor load at 5 MHz clock rate while consuming 450 /spl mu/W of power from a 1.0 V supply.

Ultra-low-power (ULP) sensor technologies for the future internet of things have presented challenges in ULP implementation of reference circuits while keeping traditional requirements of stable performance. For voltage reference circuits, as an essential block in SoCs to generate various internal supply voltages, the bandgap voltage-reference (BGVR) scheme has been widely used since it provides a well-defined value with strong immunity to process/voltage/temperature variations. Nanowatt-consuming BGVR circuits have been recently proposed using a capacitor network [4] and a leakage-based proportional-to-absolute-temperature (PTAT) circuit [5]. On the other hand, the current reference circuit that is required to set internal bias current still presents difficulties in achieving both stable performance and ULP consumption. The general approach to building a current reference is to use a BGVR with additional resistors for V-to-I conversion. Though it can provide a well-defined stable current reference, it also requires excessively large resistance for ULP consumption. Another approach is a CMOS-based current reference circuit that tries to make the exponential term in the subthreshold current equation constant or temperature-independent, hence reducing process and temperature dependencies. While CMOS reference circuits have achieved ULP implementations, the current is still determined by a number of process and design parameters, resulting in large sensitivity to process variations. This paper presents a sub-10nW bandgap-reference (BGR) circuit that implements both voltage and current references in one circuit. The BGR circuit is implemented with a 0.18µm CMOS process and generates voltage and a current references of 1.238V and 6.64nA while consuming 9.3nW. The voltage and current references show standard deviations of 0.43% and 1.19% with temperature coefficients of 26ppm/°C and 283ppm/°C, respectively.

A novel high-order curvature-compensated CMOS bandgap voltage reference (BGR) is proposed in CSMC 0.5μm CMOS process. By adding a piecewise-curvature current in the low temperature region and a piecewise-curvature current in the high temperature region to a conventional BGR, the proposed high-order curvature-compensated BGR achieves a reference voltage with lower temperature coefficient (TC). Simulation results show that the TC of the proposed high-order curvature-compensated BGR is only 0.62ppm/°C while the TC of the conventional BGR is about 2.82ppm/°C. The proposed high-order curvature-compensated BGR achieves the power supply rejection ratio (PSRR) of −53.98dB, −53.97dB, −52.84dB, −39.097dB and −21.75dB at 10Hz, 1kHz, 10kHz, 100kHz and 1MHz respectively.

This work presents a 0.4-V supply, 12-nW reverse bandgap voltage reference (BGR) with single BJT and indirect curvature compensation. To achieve sub-0.5V operation, the proposed BGR employs the reverse BGR based complementary-to-absolute-temperature (CTAT) voltage generator, which does not suffer from the settling error and thus reducing the biasing current for the BJT. The reduction in BJT biasing current can reduce the power consumption, thus relieving the burden on the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times $ </tex-math></inline-formula> charge pump as well, in which the minimum supply voltage of the proposed BGR decreases down to 0.4 V. In this paper, we employ a differential pair proportional-to-absolute-temperature (PTAT) voltage generator to provide a sufficiently large PTAT voltage. To suppress the temperature coefficient (TC) under limited power and voltage budgets, we propose using a nA level PTAT plus nonlinear current to bias both the BJT and PTAT voltage generator. This approach provides an indirect voltage curvature compensation. The proposed reverse BGR fabricated in 65 nm CMOS, occupies an active area of 0.0470 mm2. Measurement results from 8 chips show an average reference voltage of 487.4 mV under 0.4 V supply, with an average TC of 28.4 ppm/°C over a temperature range from -40°C to 100°C, while consuming only 12 nW power.

Based on the 0.18‐μm BCD process, this paper proposes a novel high‐order bandgap reference. Building on the original concave‐curve bandgap reference, high‐order compensation for the concave‐curve voltage‐mode bandgap reference is realized through β compensation and a piecewise compensation mechanism for source/sink currents. Under a 5‐V supply voltage and an ambient temperature range of −40°C to 125°C, the reference voltage is 1.205 V. The best temperature drift coefficient can reach as low as 0.875 ppm/°C, the power supply rejection ratio is 64.11 dB, the phase margin is 65.6°, the bandwidth can reach 6.2 MHz, and the total power consumption is 60.2 μA. With a power‐on time of 10 μs, the start‐up time of the bandgap reference is only 6.4 μs.

In this paper, a novel CMOS bandgap reference (BGR) with high-order curvature compensation by employing only a MOS transistor operating in strong-inversion deep-triode region is proposed. The mechanism of the compensation technique is analyzed in detail and the BGR is designed in standard 65-nm CMOS process. The simulation results show that the presented BGR achieves a temperature coefficient (TC) of 9.8 ppm/°C over the temperature range of -20°C to 150°C at 2.5V supply voltage. And a high precision reference voltage of 1.2V is obtained under room temperature (27°C). The line regulation is 0.33%/V in the supply voltage ranging from 1.8 to 3.6V. Comparing with the conventional circuit, the proposed architecture improves the accuracy over temperature and saves the chip area effectively.

A novel bandgap reference (BGR) with low temperature and supply voltage sensitivity without any resistor, which is compatible with standard CMOS process, is presented in this article. The proposed BGR utilises a differential amplifier with an offset voltage proportional to absolute temperature to compensate the temperature drift of emitter–base voltage. Besides, a self-biased current source with feedback is used to provide the bias current of the BGR core for reducing current mirror errors dependent on supply voltage and temperature further. Verification results of the proposed BGR implemented with 0.35 µm CMOS process demonstrate that a temperature coefficient of 10.2 ppm/°C is realised with temperature ranging from −40°C to 140°C, and a power supply rejection ratio of 58 dB is achieved with a maximum supply current of 27 µA. The active area of the presented BGR is 160 × 140 µm2.