Diagnosing resistive bridges using adaptive techniques

Delay faults are an increasingly important test challenge. Modeling bridge faults as delay faults helps delay tests to detect more bridge faults. Traditional bridge fault models are incomplete because these models only model the logic faults or these models are not efficient to use in delay tests for large circuits. In this article, we propose a physically realistic yet economical resistive bridge fault model to model delay faults as well as logic faults. An accurate yet simple delay calculation method is proposed. We also enumerate all possible fault behaviors and present the relationship between input patterns and output behaviors, which is useful in ATPG. Our fault simulation results show the benefit of at-speed tests.

A reliable method for delay fault diagnosis, based on critical path tracing from symbolic simulation of the fault-free circuit, is presented. It does not require timing evaluations and may be very accurate. The diagnosis method consists of simulation of the fault-free circuit with a six-valued logic algebra and a tracing of critical paths from primary outputs to primary inputs. The proposed method is an alternative to fault simulation. It requires no delay size based fault models and considers only the fault-free circuit. Consequently, this approach is faster, reliable, and requires less memory than conventional fault simulation. To improve the diagnosis accuracy, the concept of sensitive lines has been developed. Based on the method presented, a fast algorithm has been implemented in C++ on a SUN-SPARC workstation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Critical path tracing has been shown to be faster than traditional fault simulation methods, but it produces pessimistic results in some cases involving reconvergent fanout. It is shown that the pessimistic nature of critical path tracing in combinational circuits can lead to incorrect results that are not necessarily pessimistic in sequential circuits. A modification of the method for removing the approximation is proposed, and a critical path tracing algorithm for synchronous sequential circuits is presented. >

This paper presents a diagnosis methodology targeting most of the fault models used in practice today. This methodology is intended to be used to diagnose faulty behaviors in nanometric circuits for which the classical stuck-at fault model is far to cover all the realistic failures. The first phase of this methodology consists in the application of an Effect-Cause approach which relies on the two following main operations. The first one is based on critical path tracing (CPT) and consists in identifying lines in the Circuit Under Test (CUT) which can be the source of observed errors. The second one consists in allocating a set of possible fault models to each suspected line. In a second phase, we resort to a Cause-Effect approach applied on the set of suspects previously identified to prune the unlikely candidates and thus improve diagnosis resolution. The main advantage of this method is that it considers logical effects of the faults and does not need to handle each specific fault model explicitly during the diagnosis process. Experiments on ISCAS'89 and ITC'99 benchmark circuits show the efficiency of the proposed method in terms of diagnosis resolution.

The authors discuss possibilities of delay fault diagnosis based on fault simulation. They detail the proposed approach based on critical path tracing. A path tracing process is presented with information provided by a logic simulation. Due to the limitations induced by such a simulation, a reliable approach is described based on a six-valued logic simulation. It requires no delay size based fault models and considers only the fault-free circuit. This method is an alternative to fault simulation based approaches and provides perfectly reliable results. It does not require timing evaluations and can be very accurate. >

This paper presents accurate fault models, an accurate fault simulation technique, and a new fault coverage metric for resistive bridging faults in gate level combinational circuits at nominal and reduced power supply voltages. We show that some faults have unusual behavior, which has been observed in practice. On the ISCAS85 benchmark circuits we show that a zeroohm bridge fault model can be quite optimistic in terms of coverage of voltage-testable bridging faults.

During the SARS-Cov-2 pandemic, mask-wearing became an effective tool to prevent spreading and contracting the virus. The ability to monitor the mask-wearing rate in the population would be useful for determining public health strategies against the virus. However, artificial intelligence technologies for detecting face masks have not been deployed at a large scale in real-life to measure the mask-wearing rate in public. In this paper, we present a two-step face mask detection approach consisting of two separate modules: 1) face detection and alignment and 2) face mask classification. This approach allowed us to experiment with different combinations of face detection and face mask classification modules. More specifically, we experimented with PyramidKey and RetinaFace as face detectors while maintaining a lightweight backbone for the face mask classification module. Moreover, we also provide a relabeled annotation of the test set of the AIZOO dataset, where we rectified the incorrect labels for some face images. The evaluation results on the AIZOO and Moxa 3K datasets showed that the proposed face mask detection pipeline surpassed the state-of-the-art methods. The proposed pipeline also yielded a higher mAP on the relabeled test set of the AIZOO dataset than the original test set. Since we trained the proposed model using in-the-wild face images, we can successfully deploy our model to monitor the mask-wearing rate using public CCTV images.

An important aspect of chemoinformatics and material-informatics is the usage of machine learning algorithms to build Quantitative Structure Activity Relationship (QSAR) models. The RANdom SAmple Consensus (RANSAC) algorithm is a predictive modeling tool widely used in the image processing field for cleaning datasets from noise. RANSAC could be used as a “one stop shop” algorithm for developing and validating QSAR models, performing outlier removal, descriptors selection, model development and predictions for test set samples using applicability domain. For “future” predictions (i.e., for samples not included in the original test set) RANSAC provides a statistical estimate for the probability of obtaining reliable predictions, i.e., predictions within a pre-defined number of standard deviations from the true values. In this work we describe the first application of RNASAC in material informatics, focusing on the analysis of solar cells. We demonstrate that for three datasets representing different metal oxide (MO) based solar cell libraries RANSAC-derived models select descriptors previously shown to correlate with key photovoltaic properties and lead to good predictive statistics for these properties. These models were subsequently used to predict the properties of virtual solar cells libraries highlighting interesting dependencies of PV properties on MO compositions.

We present an application of sentiment analysis using natural language toolkit (NLTK) for measuring customer service representative (CSR) productivity in real estate call centers. The study describes in details the decisions made, step by step, in building an Arabic system for evaluation and measuring. The system includes transcription method, feature extraction, training process and analysis. The results are analyzed subjectively based on the original test set. The corpus consists of 7 h real estate corpus collected from three different call centers located in Egypt. We draw the baseline of productivity measurement in real estate sector.

This paper presents a new bridge fault model, suitable for IP blocks, that is based on a multiple layer feedforward neural network and implemented within the framework of a VHDL saboteur cell. Empirical evidence and experimental results show that it satisfies a prescribed set of bridge fault model criteria better than any existing approach. The new model computes bridged node voltages and propagation delay times with due attention to surrounding circuit elements. This is especially significant since, with the exception of full analog defect simulation, no other technique even attempts to model the delay effects of bridge defects. Yet, compared to these analog simulations, the new approach is several orders of magnitude faster and, for a 0.35u cell library, is able to compute bridged node voltages with an average error near 0.006 volts and propagation delay times with an average error near 14 ps. Furthermore, dealing with a concept that has not previously been considered in related research, the new model is validated with respect to deep-submicron technologies for limited gate-count circuit modules.

Generally, desired training set is used to make a neural network learn nonlinear relations properly. The training set consists of multiple pairs of an input vector and output one. Each input vector is given to the input layer for forward calculation, and the corresponding output vector is compared with the vector yielded from the output layer. Weights between neurons are updated based on the errors using a back propagation algorithm in backward calculation. The time required for the learning process of a neural network depends on the number of total weights and that of the input-output pairs in the training set. In the proposed learning process, after the learning is progressed, e.g., 1000 iterations, input-output pairs having had worse errors are extracted from the original training set and form a new temporary set. From the next iteration, the temporary set is applied instead of the original set. This means that only pairs with worse errors are used for updating the weights until the mean value of errors decreases to a level. After the learning using the temporary set, the original set is applied again instead of the temporary set. By alternately applying the two types of sets for learning that the calculation load for convergence can be efficiently reduced. The effectiveness of the proposed method is proved by applying to an inverse kinematics problem of an industrial robot. Generally, desired training set is used to make a neural network learn nonlinear relations properly. The training set consists of multiple pairs of an input vector and output one. Each input vector is given to the input layer for forward calculation, and the corresponding output vector is compared with the vector yielded from the output layer. Weights between neurons are updated based on the errors using a back propagation algorithm in backward calculation. The time required for the learning process of a neural network depends on the number of total weights and that of the input-output pairs in the training set. In the proposed learning process, after the learning is progressed, e.g., 1000 iterations, input-output pairs having had worse errors are extracted from the original training set and form a new temporary set. From the next iteration, the temporary set is applied instead of the original set. This means that only pairs with worse errors are used for updating the weights until the mean value of errors decreases to a level. After the learning using the temporary set, the original set is applied again instead of the temporary set. By alternately applying the two types of sets for learning that the calculation load for convergence can be efficiently reduced. The effectiveness of the proposed method is proved by applying to an inverse kinematics problem of an industrial robot.

The paper presents a concept of single event equivalence to be used in the sequential circuit fault simulator. The concept dynamically identifies the equivalent faults for a simulated pattern. It combines advantages of the fanout-free region, critical path tracing and the dominator concept, which were applicable only to combinational circuit fault simulation. The implemented fault simulator, SEESIM, based on the concept, demonstrated a performance superior to that of a state-of-the-art concurrent fault simulator, and comparable to that of parallel-pattern single-fault propagation simulators. It requires a minimal amount of memory and, because of its simplicity, can be easily extended to multilogic or higher level simulation.

SummaryTesting for small‐delay defects (SDDs) has become an important component of integrated circuit testing. In this paper, an efficient small‐delay fault simulator, a hybrid method combining forward serial simulation and backward critical path tracing simulation for SDDs is proposed, which aims to determine the coverage of small‐delay defects for a given test set fast and accurately. In our proposed method, a unit delay model is employed, and reconvergent sensitization as well as hazard‐based detection is considered. Signal waveforms are expressed by bitmap data forms. In addition to providing an accurate result for fault simulation, the proposed simulator can well assist test generation. Experimental results demonstrate that the proposed simulator can further accelerate the simulation by one or two orders of magnitude compared with previous works. Copyright © 2014 John Wiley &amp; Sons, Ltd.

Test set size minimization and fault detection effectiveness: A case study in a space application

During the past two decades, many evolutionary algorithms have been proposed to solve nonlinear equation systems (NESs). However, the benchmark test sets have not received enough attention. Some features of NESs (e.g., high dimension, large search range, the connectivity of the feasible region) are rarely considered in the original benchmark test sets, which results in that they cannot represent the real-world problems well. Thus, a general toolkit is proposed to generate artificial test problems and 18 test instances with diverse characteristics are constructed in this article, which is the first attempt to design NESs. The experimental results indicate that the current algorithms perform poorly on this new benchmark test set. Furthermore, we develop a transformation method that transforms a NES into a new single-objective optimization problem and design a two-phase method to solve this transformed multimodal optimization problem. Compared to other algorithms, the proposed method has a superior or at least competitive performance.