Optimum nonlinear model predictive controller design for Flyback PFC rectifiers

Two new types of control method have been developed based on model predictive control for stable-target tracking of a nonholonomic mobile robot. One method (Method 1) is a new nonlinear control method. This was developed based on model predictive control (predictive nonlinear control) to predict the next position of a mobile robot using the current velocities of the right and left wheels. This technique uses a tuning guideline in predictive nonlinear control. The other method (Method 2) is a combination of Method 1 and proportional control (predictive proportional nonlinear control). Method 2 involves a tuning guideline not only in a predictive nonlinear controller, but also in a proportional controller. In this technique, the selection of a tuning guideline in the proportional controller is enhanced, and thereby increases the control action in closed-loop responses. In Method 1, the nonlinear controller is derived from Liapunov stability theory, and is used to control the linear and angular velocities for locomotion control. Tuning parameters in the nonlinear controller (in Method 1) are selected to satisfy various design criteria, such as stability, performance, and robustness. Method 1 has certain limitations that result in a decrease of the performance criteria specified. Strong nonlinearities in the mobile robot system result in accumulated errors. To enhance performance further, we developed Method 2 as the solution for decreasing cumulative errors. Hence, the proportional controller is added to Method 1 in the closed-loop form in order to eliminate errors. The advantage of Method 2 is that it can cope with strong nonlinearities in the mobile vehicle system. The results of the performances of Method 1 and Method 2 are shown to demonstrate the effectiveness of both methods, and also the better performance of Method 2. The two new methods are effective in stable-target tracking, yielding an increase in performance and stability.

Single-phase rectifier systems often require simultaneously high power factor, efficiency, and power density but can be difficult to implement with conventional solutions. In this work, a 1.5 kW, universal (95 to 265 $\mathbf{V}_{rms}$ ) ac input, 400 V dc output power factor correction (PFC) rectifier with a flying capacitor multilevel (FCML) boost front-end and a series-stacked buffer (SSB) for twice-line frequency energy buffering is implemented to meet these stringent high performance design requirements. Specifically, a PLL-based SSB control method is proposed and characterized for system integration with a generalized PFC front-end. The impacts of the SSB on the PFC front-end performance as well as the impacts of the PFC front-end behavior on SSB performance are analyzed and discussed. The interdependence of this SSB control and the PFC control architecture are validated through appropriate system modeling and experimental verification.

In this paper, a new single-phase Power Factor Corrector (PFC) based on the Sheppard-Taylor topology is studied. Compared to conventional buck, boost or buck-boost PFCs, this topology allows a better current tracking at the AC side, with a relatively reduced voltage at the DC side. Consequently, the high frequency AC filters required by the buck PFCs are avoided, and the voltage stresses on the boost switches are significantly reduced. Furthermore, the control detuning phenomenon, from which suffer most of the conventional PFCs, especially at very low input voltage, is avoided. This yields major improvements in the source current waveform. Compared to the conventional Sheppard-Taylor converter, this new topology allows lower voltage stresses across the capacitors and larger output voltage range for the same operating area. The converter is integrated as a PFC at the DC-end of a single-phase diode bridge. Pulse-Width-Modulated (PWM) multi-loops control schemes are proposed and developed in order to ensure a unity power factor at the AC-source side and a regulated voltage at the DC-load side. The first one uses the simple and robust hysteretic-based controller, the second one employs a conventional PI regulator, whereas the third one is based on the model nonlinearity compensation approach. The design of the last two control methods is based on the state-space averaged model of the converter. The performance of the different control strategies is evaluated through simulation experiments carried out on a numerical version of the converter. The implemented model of the converter is obtained by using the switching function technique. The control system is tested under both rated and disturbed operating conditions. The system performance is evaluated in terms of source current Total Harmonic Distortion (THD), input power factor, DC voltage stabilization, and regulation following load variations.

Bridging the gap between the linear and nonlinear predictive control: Adaptations for efficient building climate control

This paper presents a Scott transformer based three-phase, two-switch PFC (Power Factor Correction) boost rectifier for improving the power quality in a three-level diode clamped inverter (DCI) feeding indirect rotor field oriented control (FOC) based induction motor drive (IMD). Sinusoidal unity power factor source current and dc-link voltage regulation are achieved in the proposed rectifier only with two-switches. The three-level DCI is supplied by a split dc-link obtained from a Scott connected transformer feeding a rectifier. It is shown that a three-level DCI achieves reduced stator current with lower voltage harmonic content even at a lower switching frequency as compared to a two-level inverter. This results in reduction of voltage stress on motor windings for the same amount of torque ripple when indirect rotor FOC algorithm is implemented for the IMD. A MATLAB based simulation model of proposed PFC rectifier is developed for validating the design and to verify that the power quality issues in three-level DCI fed IMD are adequately addressed. The performance of the system is studied and compared with a conventional diode rectifier fed vector controlled IMD for different operating conditions of the drive.

Nonlinear Model Predictive Control (NMPC) algorithms are based on various nonlinear models. Recently, an on-line optimization approach for stochastic NMPC based on a Gaussian process model was proposed. A significant advantage of the Gaussian process models is that they provide information about prediction uncertainties, which would be of help in NMPC design. On the other hand, an explicit solution to the stochastic NMPC problem based on Gaussian process model would allow efficient on-line computations as well as verifiability of the implementation. This paper suggests an approximate multi-parametric Nonlinear Programming approach to explicit solution of stochastic NMPC problems for constrained nonlinear systems based on Gaussian process model. In particular, the reference tracking problem is considered. The approach builds an orthogonal search tree structure of the state space partition and consists in constructing a feasible PWL approximation to the optimal control sequence.

In the first part of this paper, three-phase power factor correction (PFC) rectifier topologies with sinusoidal input currents and controlled output voltage are derived from known single-phase PFC rectifier systems and/or passive three-phase diode rectifiers. The systems are classified into hybrid and fully active pulsewidth modulation boost-type or buck-type rectifiers, and their functionality and basic control concepts are briefly described. This facilitates the understanding of the operating principle of three-phase PFC rectifiers starting from single-phase systems, and organizes and completes the knowledge base with a new hybrid three-phase buck-type PFC rectifier topology denominated as Swiss Rectifier. Finally, core topics of future research on three-phase PFC rectifier systems are discussed, such as the analysis of novel hybrid buck-type PFC rectifier topologies, the direct input current control of buck-type systems, and the multi-objective optimization of PFC rectifier systems. The second part of this paper is dedicated to a comparative evaluation of four rectifier systems offering a high potential for industrial applications based on simple and demonstrative performance metrics concerning the semiconductor stresses, the loading and volume of the main passive components, the differential mode and common mode electromagnetic interference noise level, and ultimately the achievable converter efficiency and power density. The results are substantiated with selected examples of hardware prototypes that are optimized for efficiency and/or power density.

In this paper, a bee colony optimization (BCO) algorithm is adapted to the current control strategy of power factor (PF) correction for a Sheppard-Taylor converter. The control approach is developed to eliminate the input current harmonics in the converter. The BCO algorithm is a new population-based search algorithm which is one of the metaheuristic techniques based on swarm intelligence. This algorithm depends on modeling the natural behavior of real honey bees. In this approach, duty cycles are generated by the BCO algorithm for the Sheppard-Taylor converter switch to obtain unity PF (UPF) and lower total harmonic distortion of the input current. The duty cycles for half a line period are calculated and stored in a lookup table. By synchronizing the memory with the line, near-unity PFs can be achieved in an operating point. The feedforward is also used into the control algorithm with the maximum value of the input voltage. The implementation of feedforward improves the converter performance. The input current of the converter is operated in continuous conduction mode. The simulation and experimental results show that the proposed control strategy works well and the UPF can be achieved with wide input voltage, load, and parameter variation. The results are compatible with the International Electrotechnical Commission (IEC) 61000-3-2 current harmonic standard.

The paper presents a single-stage high-power-factor electronic ballast for metal halide lamps. The proposed ballast integrates a buck-boost converter, a buck converter and a full-bridge inverter into a single power conversion circuit. The buck-boost converter served as a power-factor corrector (PFC) is designed to operate at discontinuous conduction mode (DCM) to achieve nearly a unity power factor at the input line. By adjusting the duty-ratio of the active switches of the PFC, the lamp power is remained at rated value for universal input voltage ranged from 90 V rms to 264 V rms . The four active switches of the full-bridge inverter, an inductor and a capacitor form a bidirectional buck converter which supplies a low frequency square-wave current for the lamp at to avoid the lamp from happing acoustic resonance. The circuit operation is analyzed in detail to derive the design equations. A prototype electronic ballast for a 70 W metal halide lamp is built and tested. Experimental measurements are provided to verify that the proposed ballast has the merits of a nearly unity input power factor, high circuit efficiency and the metal halide lamp is free of acoustic resonance.

In this paper, a single stage power factor corrected (PFC) fourth-order dc-dc buck converter, having inductor at the source side, is proposed as a driver for LED lighting application. Converter is designed in accordance with IEC 61000-3-2 standards. Discrete time model of the converter is developed and is used for controller design; validate the stability and time-domain performance. A three-loop power factor correction control strategy is implemented to regulate the output voltage and source current to maintain unity power factor. An additional feed-forward control loop is implemented to eliminate flicker caused due to variation in source voltage. Performance of the proposed PFC LED driver is analyzed for a 24 V, 30 W LED string operating close to unity power factor. The PFC fourth-order buck converter is implemented as a universal bus for 24 V, 20 W to 24 V, 60 W. The presented simulation results are in accordance with the analytic studies made in the paper.

A novel approach of power factor correction (PFC) with a high-frequency resonant energy tank for the DC-link inverter is proposed. As compared with the conventional PFC techniques, this approach is advantageous of lower current stress, lower switching losses, and higher control flexibility. With carefully designed circuit parameters, the proposed topology can exhibit high power factor. The adopted PFC circuit is implemented on a series-parallel load resonant inverter as an illustrative example. The experimental results are provided to validate the theoretical analyses. It is proven that the PFC circuit can achieve nearly unity power factor and very low harmonic distortion

Conventional single-stage Power Factor Correction (PFC) rectifiers struggle with extreme duty ratio operation for low-voltage applications, like Low-speed Electric Vehicles (LSEV). This worsens the performance of the converter and degrades the operation with time. High-gain single-switch PFC rectifiers offer better performance in terms of the duty ratio, reduced size and cost due to single-stage operation, and increasing the power density, all while meeting the required standards and regulations. This paper presents a performance assessment of PFC for AC-DC rectifiers using various high-gain single-switch DC-DC converters for LSEVs, where the battery’s voltage is 48V. Particularly, conventional SEPIC, quadratic SEPIC, quadratic Buck, and B5 converters are compared. MATLAB/Simulink software tool was used for the validity of performance assessments. The performance of the converters assesses the converters’ gain, stresses, component count, and overall cost. Results show that the B5 converter has the best behavior in terms of these specifications.

ISSN:2168-6777

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn- on of part power switch and soft turn- off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis.

In this paper, a new bridgeless single phase ac-dc power factor correction (PFC) rectifiers based on Buck topology operating in Discontinuous Capacitor Voltage Mode (DCVM) is proposed. The bridgeless topology and the presence of only one or two semiconductor switches in the current flowing path during each interval of the switching cycle result in lower conduction losses compared to the conventional DCVM Buck PFC rectifier. The DCVM operation offers additional advantages such as: zero-voltage turn-off in the power switches, zero-voltage turn-on in the output diode, and continuous input current. Hence, the electromagnetic interference (EMI) noise emission is minimized. The converter achieves high power factor naturally with low total harmonic distortion (THD) in the input current. Theoretical analysis and experimental results for 100 W/48 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> at 100 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> line voltage are provided to evaluate the performance of the proposed scheme. The measured conversion efficiency reached 96.4%.