Using Cycle-Approximate Simulation for Bus Based Multi-Processor System-On Chip Analysis

As clock speed increases taper off and hardware designers struggle to scale parallelism within a chip, software developers and researchers must face the challenge of writing portable software with no clear architectural target. On the hardware side, energy considerations will dominate many of the design decisions, and will ultimately limit what systems and applications can be built. This is especially true at the high end, where the next major milestone of exascale computing will be unattainable without major improvements in efficiency.Although hardware designers have long worried about the efficiency of their designs, especially for battery-operated devices, software developers in general have not. To illustrate this point, I will describe some of the top ways to waste time and therefore energy waiting for communication, synchronization, or interactions with users or other systems. Data movement, rather than computation, is the big consumer of energy, yet software often moves data up and down the memory hierarchy or across a network multiple times. At the same time, hardware designers need to take into account the constraints of the computational problems that will run on their systems, as a design that is poorly matched to the computational requirements will end up being inefficient. Drawing on my own experience in scientific computing, I will give examples of how to make the combination of hardware, algorithms and software more efficient, but also describe some of the challenges that are inherent in the application problems we want to solve. The community needs to take an integrated approach to the problem, and consider how much business or science can be done per Joule, rather than optimizing a particular component of the system in isolation. This will require rethinking the algorithms, programming models, and hardware in concert, and therefore an unprecedented level of collaboration and cooperation between hardware and software designers.

The development of digital designs today is much more complex than before, as they now impose more severe demands and require greater number of functionalities to be conceived. The current approach, based on the register transfer level (RTL) design methods, can result in extremely long simulation time compounded with time-consuming verification process. Hence, today digital system design begins with modelling at a higher level of design abstraction, that is, the electronic system level (ESL). This paper presents a hardware-software (HW/SW) co-simulation environment based on SystemC for application in the design of system-on-chip (SoC). We discuss the SystemC modelling of the hardware and the software parts of the system, and the interprocess communication module of the co-simulation platform. Its objective is to help designers obtain an appropriate HW/SW partitioning that satisfy specified area-speed design tradeoffs. Besides, an early system verification can also be carried out with a high simulation speed. A case study of a SoC implementing elliptic curve cryptography (ECC) is presented to validate the co-simulation platform in terms of system functionality verification and design space exploration.

Embedded systems have become very important in our life; they pervade all fields in today's advanced technology. With the increasing importance of these systems, designers need to estimate the performance metrics such as Delay which includes processing and communication and Power consumption. This procedure is very critical and even crucial at an early stage of design and implementation. Using GPUs and parallelization schemes together shows a promising sight to enhance the delay in a system under investigation with trade-off in power consumption and code size. In this paper, we will analyze that system using Hierarchical Performance Modeling (HPM) to estimate the improvement in the delay by using GPUs and parallelization methods on different hardware architectures and software platforms. The experimental results showed an improvement in the delay each time we used more threads and maximum reduction obtained when GPU was invoked to perform all graphical tasks.

With the introduction of the Industrial/sup IT/ vision at ABB, the coordination of hardware and software development is a crucial aspect that the organization needs to address. Software development and hardware production processes need to be coordinated into one coherent lifecycle model to optimize development. This paper presents some basic concepts in software and hardware development lifecycles and paves the road for a more comprehensive approach for a system development lifecycle.

Ever increasing embedded system design complexity combined with a very tight time-to-market window has revolutionized the embedded-system design process. The concurrent design of hardware and software has displaced traditional sequential design. Further, hardware and software design now begins before the system architecture (or even the specification) is finalised. System architects, customers, and marketing departments develop requirement definitions and system specifications together. System architects define a system architecture consisting of cooperating system functions that form the basis of concurrent hardware and software design. Interface design requires the participation of both hardware and software developers. The next step integrates and tests hardware and software-this phase consists of many individual steps. Reusing components taken from previous designs or acquired from outside the design group is a main design goal to improve productivity and reduce design risk. It is argued that new methodologies and AD tools support an integrated hardware software codesign process.

The paper examined the problem of modeling and design of software computer systems. The article briefly describes the content aspects of the various stages of the implementation of software complexes and systems. The methodology of research and analysis of systems, which uses the method of computer simulation modeling, is given. The aim of the work is to create a new universal approach to the design and implementation of software systems of various levels of complexity. During the study, the following general scientific methods were used: system analysis, synthesis, formalization, modeling, decomposition, structuring, description, comparison. The materials used in the study were: computers and software development tools. As a result of the study proposed a universal agent-module approach to the design and implementation of software systems based on simulation agent-based modeling. The study presents the processes of modeling and designing software systems, their stages, and the possibility of their integration within the described approach. Examples of formal model and structure of the software system under design based on the agent-module approach are presented. The proposed approach can be used in the process of software development at the initial stages related to modeling and designing of software systems. Integration of modeling and design stages in the proposed approach will significantly reduce software development time and simplify the design process by making it clearer and more formalized. Materials of the article are of scientific and practical value for a wide range of specialists interested in system analysis, modeling, design and implementation of software systems.

Many regular business operations are transforming into digital services, increasing advanced multi-platforms, rapid operational alignment, flexibility, and environmental impact through energy consumption, hardware waste, and technology investments. Flexible and sustainable system development models emphasizing energy efficiency can help innovate software development as digital servicing applications shift. This research is motivated by the need to improve energy consumption in early software design and development due to rising technological efficiency and sustainability demands. Although effective in iterative development and stakeholder engagement, traditional Agile methodologies often struggle with long-term sustainability and energy efficiency. Extended Agile, combining Agile, layered architecture, and aspect-oriented frameworks (ALAI), promises to improve system modularity, flexibility, maintainability, and sustainability. This study’s findings are not just theoretical, but also practically relevant, as they explore the energy efficiency of ALAI software development methodologies, using graduate admission information system services (GAISS) as an example. GAISS is a complex system that handles the entire process of graduate admissions, from application submission to final decision. The study quantifies the energy usage of a student-list webpage by analyzing Microsoft IIS server logs from February 2022 to May 2024. Directly applicable findings show that the GAISS based on the ALAI framework reduces energy consumption by 10.7914% compared to traditional Agile software developments. ALAI used 892.80 kWh versus Agile’s 1000.80 kWh during operations, saving energy. These findings demonstrate the benefits of integrating aspect-oriented frameworks and layering approaches into Agile methodologies, contributing to sustainable software development discourse. The study emphasizes the importance of energy-efficient frameworks such as ALAI to reduce software systems’ environmental impact and promote software development sustainability. The findings of this study, with their practical relevance, assist software developers and organizations in choosing software design and development methods that maximize operational efficiency and environmental sustainability.

Reconfigurable computing (RC) is rapidly emerging as a promising technology for the future of high-performance and embedded computing, enabling systems with the computational density and power of custom-logic hardware and the versatility of software-driven hardware in an optimal mix. Novel methods for rapid virtual prototyping, performance prediction, and evaluation are of critical importance in the engineering of complex reconfigurable systems and applications. These techniques can yield insightful tradeoff analyses while saving valuable time and resources for researchers and engineers alike. The research described herein provides a methodology for mapping arbitrary applications to targeted reconfigurable platforms in a simulation environment called RCSE. By splitting the process into two domains, the application and simulation domains, characterization of each element can occur independently and in parallel, leading to fast and accurate performance prediction results for large and complex systems. This article presents the design of a novel framework for system-level simulative performance prediction of RC systems and applications. The article also presents a set of case studies analyzing two applications, Hyperspectral Imaging (HSI) and Molecular Dynamics (MD), across three disparate RC platforms within the simulation framework. The validation results using each of these applications and systems show that our framework can quickly obtain performance prediction results with reasonable accuracy on a variety of platforms. Finally, a set of simulative case studies are presented to illustrate the various capabilities of the framework to quickly obtain a wide range of performance prediction results and power consumption estimates.

Benchmarks capture the essence of many important real-world applications and allow performance, and power analysis while developing new systems. Synthetic benchmarks are a miniaturized form of benchmarks that allow high simulation speeds and act as proxies to proprietary applications. Software architecture principles guide the development of new applications and benchmarks. We leverage software architectural patterns in developing synthetic benchmarks for embedded multicore systems. We developed an automated framework complete with characterization and synthesis components and performed experiments on PARSEC and Rodinia benchmarks. Our benchmarks can be run on any given infrastructure, that is, SMP or message passing, unlike previously developed benchmarks. Hence, this allows us to target heterogeneous embedded multicore systems. Our results show that the synthetic benchmarks and the real applications are similar with respect to various micro-architecture dependent as well as independent metrics.

Moscow Institute of Physics and Technology (National Research University) The paper advocates the need to move from separate stages of the product life cycle (LC; R&D, production, operation) to a single project implemented in a new paradigm of system design based on software and methodological tools of model-based systems engineering (MBSE). Currently available in Russia foreign software (SW) and methodological MBSE tools for the design and development (D&D) of systems (including space instruments) are expensive and complex. This paper formulates and considers the question: «Is it possible to reduce the cost and simplify the use of software and methodological MBSE tools by means that are available to a wide audience of users?». To answer this question, the authors analyzed SysML, QFD method, HoQ method, and the SW for their application. As the result of literature review, it is shown that in the leading countries, the relevance of implementing these tools in the design and development of hardware and software systems is increasing. For the use of SysML, QFD, HoQ by a wide audience of potential users from Russian Federation were defined software tools. 13 disadvantages that prevent the application of SysML, QFD and HoQ, as well as SW for their use were identified. In order to overcome the identified disadvantages, was developed SW and methodological MBSE tool based on modernization, specification and synthesis of SysML, QFD, HoQ and SW for their application. The developed MBSE SW and methodological tool allows for a wide audience of users to D&D systems in accordance with MBSE approach (QFD, HoQ, SysML), to identify critical requirements of different development elements, to develop automatically (in a few hours instead of several days) and update SysML models of requirements, to reduce labor costs for the implementation of the D&D LC stages of future analog products by 5-10%. As a result of validation of SysML models, it is proved that their repeated use reduces the planning time of the LC stages of analog products by up to 60%, increases the compliance of the reporting documentation of the LC stages with the requirements of regulatory and technical documents by 10%.

10 - Hardware and software development tools

: This report presents the design and development of a robotic tentacle manipulator research platform as a tool to explore new methods of enhancing the capabilities of remotely operated manipulators, autonomous manipulation, and autonomous search. We review the current state of dexterous manipulators and past milestones, choose manipulator morphology based on this review, and evaluate the morphology on the basis of design, control, and manufacturing constraints. A feasible architecture for a robotic tentacle manipulator research platform is conceived, designed, and built. Design and development of software, hardware, and mechanical components is presented. Applications of the robotic tentacle manipulator in autonomous robots are investigated. Potential effects of various design decisions are evaluated and strategies for platform improvements are suggested.

the University of Amsterdam, May 20-31, 1974.This Tract collects the lecture notes of five of the courses given.The sixth course, given by Dr. R. Kowalski on Predicate Logic as a Programming Language in Artificial Intelligence, is scheduled to appear elsewhere.We are very grateful to the Netherlands Organization for the Advancement of Pure Research (Z.W.O.)

Design management systems have been developed and researched for traditional product and service industries. For interaction design little research has been performed on design management. The objective of this paper is to describe aspects of and provisions for industrial interaction design that influence approaches to design management within system and software development. We discuss whether there are specific conditions for design management of interaction design within the software and system development industries. The research is based on three short case studies from industrial software development. We identify some of these specific conditions; the difference between a usage and a product perspective, the design tools and practices, and the modularized and distributed processes. These issues point towards challenges facing design management within the software and system development context, as well as the need for interaction design to clarify its position as a strategic resource in software companies. The conclusions point towards the need for continued research on strategic possibilities and alternatives to organize and manage design work in software and system development.

The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to the "design verification crisis ", as it is known among engineers. Today's verification challenges require powerful testbenches and high-performance simulation solutions such as Hardware Simulation Accelerators and Hardware Emulators that have been in use in hardware and electronic system design centers for approximately the last decade. In particular, in order to accelerate functional simulation, hardware emulation is used so as to offload calculation-intensive tasks from the software simulator. However, the communication overhead between the software simulator and hardware emulator is becoming a new critical bottleneck. We tackle this problem by partitioning the code running on the software simulator into two sections: the testbench HDL (hardware description language) code that communicates directly with the design under test (DUT) and the rest C-like testbench code. The former section is transformed into synthesizable code while the latter runs in a general purpose CPU. Our experiments demonstrate that the proposed method reduces the communication overhead by a factor of about 5 compared to a conventional hardware emulated simulation